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Nicolai Hähnle [Fri, 11 Mar 2016 02:19:56 +0000 (21:19 -0500)]
r600g: clear compressed_depthtex/colortex_mask when binding buffer texture
Found by inspection of the source based on a bisected bug report.
This bug has been in the code for a long time, but the more recent PBO upload
feature exposed it because it leads to more uses of buffer textures.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94388
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "11.0 11.1 11.2" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Sat, 20 Feb 2016 04:18:33 +0000 (23:18 -0500)]
st/mesa: add GL_ARB_shader_atomic_counter_ops support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ilia Mirkin [Sat, 20 Feb 2016 04:07:38 +0000 (23:07 -0500)]
mesa: add GL_ARB_shader_atomic_counter_ops support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ilia Mirkin [Wed, 9 Mar 2016 06:04:58 +0000 (01:04 -0500)]
nvc0: add support for TGSI FMA ops
This will allow the nouveau backend to not try and split up ops that are
fused in GLSL.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Nicolai Hähnle [Wed, 9 Mar 2016 20:42:31 +0000 (15:42 -0500)]
radeonsi: update compressed_colortex_masks when a cmask is created or disabled
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 8 Feb 2016 03:27:17 +0000 (22:27 -0500)]
radeonsi: move si_decompress_textures to si_blit.c
Since it is all about calling into blitter functions, it makes more
sense here. This change also reduces the size of the interfaces between
.c files.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 9 Mar 2016 22:48:31 +0000 (17:48 -0500)]
r600g: update compressed_colortex_masks when a cmask is created or disabled
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 8 Feb 2016 04:33:44 +0000 (23:33 -0500)]
gallium/radeon: notify all contexts when cmasks are enabled/disabled
There is an annoying corner case that I stumbled across while looking into
piglit's arb_shader_image_load_store/execution/load-from-cleared-image.shader_test
(which can be easily adapted to demonstrate the bug without the
ARB_shader_image_load_store extension)
When we bind a texture and then clear it using glClear (by attaching it
to the current framebuffer) for the first time, we allocate a separate
cmask for the texture to do fast clear, but the corresponding bit in
compressed_colortex_mask is not set. Subsequent rendering will use
incorrect data.
Conversely, when a currently bound texture with an existing cmask is
exported leading to that cmask being disabled, the compressed_colortex_mask
bit will remain set, leading to an assertion later on in debug builds.
Since iterating through all contexts and/or remembering where every
texture is bound would be costly, and cmask enable/disable should be
rare, we will maintain a global counter to signal contexts that they
must update their compressed_colortex_masks.
This patch introduces the global counter, and subsequent patches will
do the mask update.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Wed, 9 Mar 2016 04:00:06 +0000 (20:00 -0800)]
i965: Set a proper _BaseFormat for window system renderbuffers in ES.
intel_alloc_private_renderbuffer_storage did:
rb->_BaseFormat = _mesa_base_fbo_format(ctx, internalFormat);
Unfortunately, internalFormat was usually an unsized format (such as
GL_DEPTH_COMPONENT). In OpenGL ES, _mesa_base_fbo_format() refuses to
accept unsized formats, and returns 0 rather than a real base format.
This meant that we ended up with a completely bogus rb->_BaseFormat for
window system buffers on OpenGL ES. All other renderbuffer allocation
functions in intel_fbo.c instead use the mesa_format, and do:
rb->_BaseFormat = _mesa_get_format_base_format(...);
We can do likewise, using rb->Format. This appears to work just fine.
dEQP-GLES3.functional.state_query.fbo.framebuffer_attachment_x_size_initial
failed, as it tried to perform a GL_FRAMEBUFFER_ATTACHMENT_DEPTH_SIZE query
on the window system depth buffer. That query relies on a proper
rb->_BaseFormat being set, so it broke because rb->_BaseFormat was 0 due
to the above bug.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94458
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Kenneth Graunke [Wed, 9 Mar 2016 03:03:11 +0000 (19:03 -0800)]
glcpp: Fix locations when encounting "#<NEWLINE>".
We were failing to reset our location tracking when encountering a
NEWLINE in the <HASH> state. Rip the code from the <*>{NEWLINE} rule,
which handles this properly.
Also, update 146-version-first-hash.c to have proper expectations.
When I introduced the test, I didn't verify that the line/column
numbers were correct, and it turns out they varied based on the type
of newline ending.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94447
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Tim Rowley [Tue, 8 Mar 2016 17:22:54 +0000 (11:22 -0600)]
gallium/swr: remove use of BYTE from swr driver
Remove use of a win32-style type leaked from the swr rasterizer.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Samuel Pitoiset [Wed, 9 Mar 2016 22:58:09 +0000 (23:58 +0100)]
nvc0: expose SM35 perf counters to AMD_performance_monitor
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Wed, 9 Mar 2016 22:59:05 +0000 (23:59 +0100)]
nvc0: add driver metrics for SM35 (GK110)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Wed, 9 Mar 2016 22:05:35 +0000 (23:05 +0100)]
nvc0: add MP performance counters for SM35 (GK110)
Because compute support is not enabled by default for these chipsets,
NVF0_COMPUTE=1 needs to be used, along with GALLIUM_HUD to enable
performance counters.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Wed, 9 Mar 2016 21:22:45 +0000 (22:22 +0100)]
nvc0: explode config of Kepler hardware SM events
This is really verbose but most of the configuration will be reused
for SM35 (GK110).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Wed, 9 Mar 2016 22:24:39 +0000 (23:24 +0100)]
nvc0: rework the driver metrics infrastructure
This follows the same design as MP perf counters.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Wed, 9 Mar 2016 20:13:22 +0000 (21:13 +0100)]
nvc0: rework the MP counters infrastructure
This mainly improves how we define the different list of queries.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Marek Olšák [Thu, 3 Mar 2016 13:21:49 +0000 (14:21 +0100)]
egl: clean up typedef madness in the backend API
let's use the dd.h format
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Iago Toral Quiroga [Wed, 9 Mar 2016 10:48:25 +0000 (11:48 +0100)]
glsl: report correct number of allowed vertex inputs and fragment outputs
Before we would always report 16 for both and we would only fail if either
one exceeded 16. Now we fail if the maximum for each is exceeded, even if
it is smaller than 16 and we report the correct maximum.
Also, expand the size of to_assign[] to 32. There is code at the top
of the function handling max_index up to 32, so this just makes the
code more consistent.
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Vinson Lee [Wed, 9 Mar 2016 08:53:02 +0000 (00:53 -0800)]
nouveau: Fix clang reserved-user-defined-literal error.
CXX codegen/nv50_ir.lo
In file included from codegen/nv50_ir.cpp:28:
./nouveau_debug.h:19:30: error: invalid suffix on literal; C++11 requires a space between literal and identifier
[-Wreserved-user-defined-literal]
fprintf(stderr, "%s:%d - "fmt, __FUNCTION__, __LINE__, ##args)
^
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Kenneth Graunke [Wed, 9 Mar 2016 04:45:26 +0000 (20:45 -0800)]
mesa: Make glGetInteger64v convert float/doubles to 32-bit integers.
According to the GL 4.4 core specification, section 2.2.2 ("Data
Conversions For State Query Commands"):
"If a command returning integer data is called, such as GetIntegerv or
GetInteger64v, a boolean value of TRUE or FALSE is interpreted as one
or zero, respectively. A floating-point value is rounded to the nearest
integer, unless the value is an RGBA color component, a DepthRange
value, or a depth buffer clear value. In these cases, the query command
converts the floating-point value to an integer according to the INT
entry of table 18.2; a value not in [−1, 1] converts to an undefined
value."
The INT entry of table 18.2 shows that b = 32, meaning the expectation
is to convert it to a 32-bit integer value.
Fixes:
dEQP-GLES3.functional.state_query.floats.blend_color_getinteger64
dEQP-GLES3.functional.state_query.floats.color_clear_value_getinteger64
dEQP-GLES3.functional.state_query.floats.depth_clear_value_getinteger64
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94456
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Emil Velikov [Tue, 8 Mar 2016 10:55:19 +0000 (10:55 +0000)]
gallium/radeon: use explicit drm_major, drm_minor check
Just like everywhere else in the radeon codebase.
v2: Don't forget about drm_major == 3 (Alex)
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Emil Velikov [Sat, 5 Mar 2016 21:25:44 +0000 (21:25 +0000)]
egl/x11: check the return value of xcb_dri2_get_buffers_reply()
... before using it. The function can return NULL, which we should check
prior to refererencing it in the next function(s).
Cc: Fabian Vogt <fvogt@suse.com>
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93667
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Emil Velikov [Wed, 25 Nov 2015 20:43:03 +0000 (20:43 +0000)]
gallium: do not wrap header inclusion in
Add one missing extern C guard within include/pipe/p_video_enums.h, and
remove the wrapping throughout gallium.
On Haiku one could even use the gallium debug_printf() although
that's another topic.
v2: Leave dbghelp.h as is (Jose)
Cc: Jose Fonseca <jfonseca@vmware.com>
Cc: Brian Paul <brianp@vmware.com>
Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Dieter Nützel [Sun, 6 Mar 2016 19:37:57 +0000 (20:37 +0100)]
opencl: fix .gitignore for .install-gallium-links
Fixes:
0b6157e9713 "install-gallium-links: port changes from install-lib-links"
v2: move this to the top level .gitignore and added Fixes:
like Emil Velikov <emil.l.velikov@gmail.com> suggested
Signed-off-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Wed, 10 Feb 2016 12:21:31 +0000 (12:21 +0000)]
egl: remove remnants of MESA_drm_display
Last set in st/egl, unused in mesa-demos and superseded by
EGL_KHR_platform_gbm.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Wed, 10 Feb 2016 12:21:30 +0000 (12:21 +0000)]
egl: remove final pieces of KHR_vg_parent_image
Similar to previous commit - unused/unset for a long time.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Tue, 24 Nov 2015 22:16:54 +0000 (22:16 +0000)]
glapi: remove the final function offset tags
A commit earlier this year reworked out python scripts to use a separate
file for these. Followed by removing support from the parser, and
removing all of the offset tags.
Seems like we either missed a few, or people added them by mistake.
Either way let's nuke the ones that are still around.
Cc: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Tue, 24 Nov 2015 16:29:28 +0000 (16:29 +0000)]
winsys/amdgpu/addrlib: do not wrap header inclusion in extern "C"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Emil Velikov [Tue, 24 Nov 2015 16:29:26 +0000 (16:29 +0000)]
mesa/main: do not wrap header inclusion in extern "C"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Tue, 24 Nov 2015 16:29:23 +0000 (16:29 +0000)]
i915: limit extern "C" hack only for libdrm headers
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Tue, 24 Nov 2015 16:29:22 +0000 (16:29 +0000)]
xmesa: do not wrap header inclusion in extern "C"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Tue, 24 Nov 2015 16:29:21 +0000 (16:29 +0000)]
util/sha: do not wrap header inclusion in extern "C"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Tue, 24 Nov 2015 16:29:19 +0000 (16:29 +0000)]
egl/wayland: do not wrap header inclusion in extern "C"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Tue, 24 Nov 2015 16:29:18 +0000 (16:29 +0000)]
gbm: do not wrap header inclusion in extern "C"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Nicolai Hähnle [Tue, 16 Feb 2016 03:49:58 +0000 (22:49 -0500)]
st/mesa: shader image atoms must be before framebuffer update
The reason is that the shader image atoms call st_finalize_texture, which
may set ST_NEW_FRAMEBUFFER.
This fixes an assertion triggered by a subtest of piglit's
arb_shader_image_load_store-invalid.
v2: add comment explaining order constraints (suggested by Ilia)
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 9 Feb 2016 18:02:34 +0000 (13:02 -0500)]
gallivm: special case TGSI_OPCODE_STORE
This instruction has the resource (buffer or image) as a destination to
represent the writemask for SSBO writes. However, this is obviously not
a "real" destination for the purpose of emitting LLVM IR.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Sun, 7 Feb 2016 01:34:20 +0000 (20:34 -0500)]
tgsi: set correct output mode for RESQ
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Mon, 29 Feb 2016 19:22:37 +0000 (20:22 +0100)]
gallium: add CAPs returning PCI device location
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Mon, 22 Feb 2016 21:58:18 +0000 (22:58 +0100)]
winsys/amdgpu: get PCI info
This will be queried by the OpenCL stack using an interop call.
I have tested that the values match lspci.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 25 Feb 2016 21:32:26 +0000 (22:32 +0100)]
radeonsi: set amdgpu metadata before exporting a texture
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Nicolai Hähnle [Sat, 6 Feb 2016 22:34:04 +0000 (17:34 -0500)]
radeonsi: extract the texture descriptor computation into its own function
This will allow this code to be re-used for shader images.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Nicolai Hähnle [Sat, 6 Feb 2016 22:08:12 +0000 (17:08 -0500)]
radeonsi: extract the buffer descriptor computation into its own function
This will allow it to be re-used for shader image descriptors.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Nicolai Hähnle [Sat, 6 Feb 2016 21:21:52 +0000 (16:21 -0500)]
radeonsi: remove resource field from si_sampler_view
view->resource is redundant with view->base.texture, so get rid of it.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Fri, 26 Feb 2016 12:28:31 +0000 (13:28 +0100)]
radeonsi: accept pipe_resource in si_sampler_view_add_buffer
and rename .._buffers -> .._buffer
Based loosely on Nicolai's patch. This will make it easier to cherry-pick
Nicolai's patches from his image support branch.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 21:04:47 +0000 (22:04 +0100)]
radeonsi: disable DCC on handle export if expecting write access
This should be okay except that sampler views and images are not re-set.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Bas Nieuwenhuizen [Tue, 20 Oct 2015 22:10:41 +0000 (00:10 +0200)]
radeonsi: add DCC decompression (v2)
This is currently not needed but will be necessary when we have
features that do not work with DCC enabled, such as image stores
and sharing non-scanout surfaces.
v2: Marek: rebase, remove decompression from si_flush_resource (not needed)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sun, 21 Feb 2016 21:49:38 +0000 (22:49 +0100)]
radeonsi: allocate DCC in the same backing buffer as the texture
To allow sharing textures with DCC enabled.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 21:04:47 +0000 (22:04 +0100)]
gallium/radeon: disable CMASK on handle export if sharing doesn't allow it (v2)
v2: remove the list of all contexts
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 1 Mar 2016 20:50:25 +0000 (21:50 +0100)]
gallium/radeon: eliminate fast color clear before sharing
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 20:36:19 +0000 (21:36 +0100)]
gallium/radeon: don't use fast color clear if sharing doesn't allow it
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 19:17:50 +0000 (20:17 +0100)]
gallium/radeon: disallow handle export for MSAA & depth textures
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 23:23:21 +0000 (00:23 +0100)]
gallium/radeon: remember that texture_from_handle was called and its flags
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 19:04:31 +0000 (20:04 +0100)]
gallium/radeon: check that handle usage doesn't change for a resource
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 22:45:33 +0000 (23:45 +0100)]
gallium/radeon: disallow reallocation of shared buffers
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 25 Feb 2016 22:42:59 +0000 (23:42 +0100)]
gallium/radeon: if we can't discard a whole resource, discard the range instead
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 16:36:52 +0000 (17:36 +0100)]
gallium/radeon: buffer valid range tracking only works with unshared buffers
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 16:33:28 +0000 (17:33 +0100)]
gallium/radeon: don't set texture metadata for buffers
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 16:32:53 +0000 (17:32 +0100)]
gallium/radeon: set texture metadata only once
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 16:30:09 +0000 (17:30 +0100)]
gallium/radeon: clean up r600_texture_get_handle
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 16:03:11 +0000 (17:03 +0100)]
gallium/radeon: move code initializing texture metadata to its own function
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 00:24:06 +0000 (01:24 +0100)]
winsys/amdgpu: allow drivers to set/get opaque metadata
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 00:13:22 +0000 (01:13 +0100)]
gallium/radeon: rename winsys buffer_get/set_tiling to buffer_get/set_metadata
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 23 Feb 2016 23:58:38 +0000 (00:58 +0100)]
gallium/radeon: remove rcs parameter from radeon_winsys::buffer_set_tiling
This was needed for DRM < 2.12.0 where the kernel was rewriting tiling flags
in IBs.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 23 Feb 2016 23:54:11 +0000 (00:54 +0100)]
gallium/radeon: use a structure for passing tiling flags from/to winsys
and call it radeon_bo_metadata
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 24 Feb 2016 17:51:15 +0000 (18:51 +0100)]
gallium: add external usage flags to resource_from(get)_handle (v2)
This will allow drivers to make better decisions about texture sharing
for DRI2, DRI3, Wayland, and OpenCL.
v2: add read/write flags, take advantage of __DRI_IMAGE_USE_BACKBUFFER
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Axel Davy [Wed, 21 Oct 2015 10:28:00 +0000 (12:28 +0200)]
dri: add backbuffer use flag
This will be used by the next commit.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Timothy Arceri [Tue, 8 Mar 2016 09:35:41 +0000 (20:35 +1100)]
glsl: dont allow undefined array sizes in ES
This applies the rule to empty declarations.
Fixes:
dEQP-GLES3.functional.shaders.arrays.invalid.empty_declaration_without_var_name_vertex
dEQP-GLES3.functional.shaders.arrays.invalid.empty_declaration_without_var_name_fragment
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tamil velan [Mon, 7 Mar 2016 09:47:29 +0000 (15:17 +0530)]
radeon/uvd: increase max height to 4096 for VI and newer
With this issue 'mpv --hwdec=vdpau --vo=vdpau <stream>' fails
for vdpau decode if the stream height is 4096. Vdpau decode of
height upto 4096 is necessary usecase on amdgpu driver for VI
and newer platforms.
The fix is in driver specific implementation of "Decoder
Query Capabilities" API to return 4096 for VI and newer
platforms. With this fix vdpauinfo reports height support as
4096 and mpv for vdpau decode works fine for 4096 height streams.
Signed-off-by: Tamil velan <Tamil-Velan.Jayakumar@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Bas Nieuwenhuizen [Tue, 8 Mar 2016 15:01:47 +0000 (16:01 +0100)]
winsys/amdgpu: enlarge buffer_indices_hashlist
Enlarge the buffer hashlist to prevent large numbers of misses
due to adding more buffers than can be cached in the hashlist.
The game I tested had CS's with up to 1500 buffers and the overhead
of amdgpu_lookup_buffer for various sizes was:
4096 1.97% (new value)
2048 4.37%
1024 6.92%
512 9.47% (old value)
(percentage of CPU usage in render thread as determined by perf)
The time spent in amdgpu_add_buffer self is ~4.2% in all cases and
for 4096 the time needed to clear the hashlist is still < 0.10%,
so I am not expecting significant regressions.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Samuel Pitoiset [Tue, 8 Mar 2016 20:36:07 +0000 (21:36 +0100)]
nvc0: add a new validation path for compute
This makes use of the new state validation interface to be consistent
with 3d.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Tue, 8 Mar 2016 20:36:06 +0000 (21:36 +0100)]
nvc0: rework the validation path for 3D
This exposes an interface for state validation that will be also used
to rework the compute validation path.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Jordan Justen [Sat, 20 Feb 2016 09:22:08 +0000 (01:22 -0800)]
i965/hsw: Initialize SLM index in state register
For Haswell, we need to initialize the SLM index in the state
register. This can be copied out of the CS header dword 0.
v2:
* Use UW move to avoid changing upper 16-bits of sr0.1 (mattst88)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94081
Fixes: piglit arb_compute_shader/execution/shared-atomics.shader_test
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "11.2" <mesa-stable@lists.freedesktop.org>
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu> (v1)
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jordan Justen [Mon, 22 Feb 2016 18:42:07 +0000 (10:42 -0800)]
i965/compute: Skip SIMD8 generation if it can't be used
If the local workgroup size is sufficiently large, then the SIMD8
program can't be used. In this case we can skip generating the SIMD8
program. For complex programs this can save a significant amount of
time.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jordan Justen [Mon, 22 Feb 2016 04:55:09 +0000 (20:55 -0800)]
i965/fs: Allow spilling for SIMD16 compute shaders
For fragment shaders, we can always use a SIMD8 program. Therefore, if
we detect spilling with a SIMD16 program, then it is better to skip
generating a SIMD16 program to only rely on a SIMD8 program.
Unfortunately, this doesn't work for compute shaders. For a compute
shader, we may be required to use SIMD16 if the local workgroup size
is bigger than a certain size. For example, on gen7, if the local
workgroup size is larger than 512, then a SIMD16 program is required.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93840
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Timothy Arceri [Tue, 8 Mar 2016 11:25:58 +0000 (22:25 +1100)]
glsl: don't always reject shaders with mismatching ifc blocks
Since we store some member qualifiers in the interface type
we need to be more careful about rejecting shaders just because
the pointer doesn't match. Its perfectly valid for some qualifiers
such as precision to not match across shader interfaces.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Timothy Arceri [Tue, 8 Mar 2016 11:33:44 +0000 (22:33 +1100)]
glsl: make interstage_match() static
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Timothy Arceri [Tue, 8 Mar 2016 12:53:37 +0000 (23:53 +1100)]
glsl: don't validate ifc blocks using validation meant for variables
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Kenneth Graunke [Tue, 8 Mar 2016 00:43:35 +0000 (16:43 -0800)]
mesa: Fix error code for GetFramebufferAttachmentParameter in ES 3.0+.
The ES 3.0+ specifications contain the exact same text as the OpenGL
specification, which says that we should return GL_INVALID_OPERATION.
ES 2.0 contains different text saying we should return GL_INVALID_ENUM.
Previously, Mesa chose the error code based on API (GL vs. ES).
This patch makes ES 3.0+ follow the GL behavior. ES 2 remains as is.
Fixes dEQP-GLES3.functional.fbo.api.attachment_query_empty_fbo.
However, breaks the dEQP-GLES2 variant of the same test for drivers
which silently promote to ES 3.0. This can be worked around by
exporting MESA_GLES_VERSION_OVERRIDE=2.0, but is a bug in dEQP-GLES2.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Sat, 5 Mar 2016 05:43:37 +0000 (21:43 -0800)]
mesa: Add GL_RED and GL_RG to ES3 effective internal format mapping.
The dEQP-GLES3.functional.fbo.completeness.renderable.texture.
{color0,depth,stencil}.{red,rg}_unsigned_byte tests appear to expect
GL_RED/GL_RG and GL_UNSIGNED_BYTE to map to GL_R8/GL_RG8, rather than
returning an INVALID_OPERATION error.
This makes perfect sense. However, RED and RG are strangely missing
from the ES 3.0/3.1/3.2 spec's "Effective internal format corresponding
to external format and type" tables. It may be worth filing a spec bug.
Fixes the 6 dEQP tests mentioned above.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Samuel Pitoiset [Tue, 8 Mar 2016 18:01:13 +0000 (19:01 +0100)]
nv50,nvc0: make sure to destroy the mutex used for blits
This mutex is initialized when the blitter is created, but it is never
destroyed. This doesn't hurt anything but it makes sense to destroy it
at blitter deletion.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Marek Olšák [Thu, 25 Feb 2016 22:39:42 +0000 (23:39 +0100)]
gallium/radeon: don't use temporary buffers for persistent mappings
Cc: 11.1 11.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Jason Ekstrand [Sun, 14 Feb 2016 01:45:37 +0000 (17:45 -0800)]
nir: Add a pass for lower indirect variable dereferences
This new pass lowers load/store_var intrinsics that act on indirect derefs
to if-ladder of direct load/store_var intrinsics. The if-ladders perform a
simple binary search on the indirect.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Alejandro Piñeiro [Fri, 4 Mar 2016 19:38:41 +0000 (20:38 +0100)]
i965/fs/nir: "surface_access::" prefix not needed
"using namespace brw::surface_access" is already present at the
top of the source file.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Brian Paul [Tue, 8 Mar 2016 01:57:33 +0000 (18:57 -0700)]
mesa: fix malformed assertion in _image_format_class_to_glenum()
Reviewed-by: Vinson Lee <vlee@freedesktop.org>
Brian Paul [Mon, 7 Mar 2016 18:10:45 +0000 (11:10 -0700)]
program: minor whitespace clean-ups in program_parse_extra.c
Christian König [Wed, 20 Jan 2016 15:19:08 +0000 (16:19 +0100)]
st/mesa: conditionally enable GL_NV_vdpau_interop
Only enable it when we compile the state tracker as well.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Christian König [Fri, 5 Feb 2016 08:25:59 +0000 (09:25 +0100)]
radeon/uvd: disable MPEG1
The hardware simply doesn't support that correctly.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Alejandro Piñeiro [Fri, 4 Mar 2016 17:20:09 +0000 (18:20 +0100)]
i965/vec4/nir: no need to use surface_access:: to call emit_untyped_atomic
Now that brw_vec4_visitor::emit_untyped_atomic was removed, there is no need
to explicitly set it.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Alejandro Piñeiro [Fri, 4 Mar 2016 16:32:08 +0000 (17:32 +0100)]
i965/vec4/nir: remove emit_untyped_surface_read and emit_untyped_atomic at brw_vec4_visitor
surface_access emit_untyped_read and emit_untyped_atomic provides the same
functionality.
v2: surface parameter of emit_untyped_atomic is a const, no need to
specify default predicate on emit_untyped_atomic, use retype
(Francisco Jerez).
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Alejandro Piñeiro [Fri, 4 Mar 2016 18:20:27 +0000 (19:20 +0100)]
i965/vec4: pass the correct src_sz to emit_send at emit_untyped_atomic
If the src is invalid, so src size is zero, the src_sz passed to emit
send should be zero too, instead of a default 1 if we are in a simd4x2
case. This can happens if using emit_untyped_atomic for an atomic
dec/inc.
v2: use the proper src_sz when calling emit_send, instead of just
avoid loading src at emit_send if BAD_FILE (Francisco Jerez)
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Kenneth Graunke [Sat, 5 Mar 2016 02:52:47 +0000 (18:52 -0800)]
glcpp: Remove empty mid-rule action which changes test behavior.
Apparently this causes a slight difference in the parser's token
expectations, leading to a different error message.
It seems harmless, but I wanted to be cautious and separate it out.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Sat, 5 Mar 2016 02:47:39 +0000 (18:47 -0800)]
glcpp: Clean up most empty mid-rule actions left by previous commit.
I didn't want to pollute the previous patch with all the $4 -> $3
changes.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Sat, 5 Mar 2016 02:45:35 +0000 (18:45 -0800)]
glcpp: Delete unnecessary implicit version resolves.
We now have a bigger hammer. The HASH_TOKEN NEWLINE rule still needs
to exist to ensure the 146-version-hash-first.c test still passes.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Sat, 5 Mar 2016 02:26:00 +0000 (18:26 -0800)]
glcpp: Implicitly resolve version after the first non-space/hash token.
We resolved the implicit version directive when processing control lines,
such as #ifdef, to ensure any built-in macros exist. However, we failed
to resolve it when handling ordinary text.
For example,
int x = __VERSION__;
should resolve __VERSION__ to 110, but since we never resolved the implicit
version, none of the built-in macros exist, so it was left as is.
This also meant we allowed the following shader to slop through:
123
#version 120
Nothing would cause the implicit version to take effect, so when we saw
the #version directive, we thought everything was peachy.
This patch makes the lexer's per-token action resolve the implicit
version on the first non-space/newline/hash token that isn't part of
a #version directive, fulfilling the GLSL language spec:
"The #version directive must occur in a shader before anything else,
except for comments and white space."
Because we emit #version as HASH_TOKEN then VERSION_TOKEN, we have to
allow HASH_TOKEN to slop through as well, so we don't resolve the
implicit version as soon as we see the # character. However, this is
fine, because the parser's HASH_TOKEN NEWLINE rule does resolve the
version, disallowing cases like:
#
#version 120
This patch also adds the above shaders as new glcpp tests.
Fixes dEQP-GLES2.functional.shaders.preprocessor.predefined_macros.
{gl_es_1_vertex,gl_es_1_fragment}.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tim Rowley [Fri, 4 Mar 2016 19:28:33 +0000 (13:28 -0600)]
gallium/swr: fix issues preventing a 32-bit build
Not a currently tested configuration, but these couple of small changes
allow a 32-bit build.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94383
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Brian Paul <brianp@vmware.com>
Tim Rowley [Mon, 7 Mar 2016 20:59:34 +0000 (14:59 -0600)]
gallium/swr: remove use of UINT64 from swr_fence
Remove use of a win32-style type leaked from the swr rasterizer.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 5 Mar 2016 05:19:49 +0000 (21:19 -0800)]
glsl: Add function parameters to the parser symbol table.
In a shader such as:
struct S { float f; }
float identity(float S) { return S; }
we would think that "S" in "return S" referred to a structure, even
though it's shadowed by the "float S" parameter in the inner struct.
This led to the parser's grammar seeing TYPE_IDENTIFIER and getting
confused.
Fixes dEQP-GLES2.functional.shaders.scoping.valid.
function_parameter_hides_struct_type_{vertex,fragment}.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Kenneth Graunke [Sat, 5 Mar 2016 04:32:26 +0000 (20:32 -0800)]
glsl: Add single declaration variables to the symbol table too.
The lexer/parser use a symbol table to classify identifiers as
variables, functions, or structure types.
For some reason, we neglected to add variables in simple declarations
such as
int x = 5;
but did add subsequent variables in multi-declarations:
int x = 5, y = 6; // y gets added, but not x, for some reason
Fixes four dEQP-GLES2.functional.shaders.scoping.valid subcases:
- local_int_variable_hides_struct_type_vertex
- local_int_variable_hides_struct_type_fragment
- local_struct_variable_hides_struct_type_vertex
- local_struct_variable_hides_struct_type_fragment
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Kenneth Graunke [Fri, 4 Mar 2016 05:38:32 +0000 (21:38 -0800)]
mesa: Change GLboolean to bool in GenerateMipmap target checker.
This is not API facing, so just use bool.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>