OSDN Git Service
Craig Topper [Mon, 30 Oct 2017 04:39:18 +0000 (04:39 +0000)]
[X86] Rearrange code in X86InstrInfo.cpp to put all the foldMemoryOperandImpl methods together without partial/undef register handling in the middle. NFC
I have a future patch that wants to make use of the one of the partial functions in one of the earlier memory folding methods and the current ordering prevents that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316883
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Craig Topper [Mon, 30 Oct 2017 03:35:44 +0000 (03:35 +0000)]
[X86] Simplify code by removing an unnecessary temporary variable. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316882
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Craig Topper [Mon, 30 Oct 2017 03:35:43 +0000 (03:35 +0000)]
[X86] Move some EVEX->VEX code to a helper function to prepare for a future patch. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316881
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Simon Pilgrim [Sun, 29 Oct 2017 22:03:37 +0000 (22:03 +0000)]
[SelectionDAG] Add SEXT/AND/XOR/Or demanded elts support to ComputeNumSignBits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316875
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Simon Pilgrim [Sun, 29 Oct 2017 21:35:28 +0000 (21:35 +0000)]
[X86][SSE] Split ComputeNumSignBits SEXT/AND/XOR/OR demandedelts test
Max depth was being exceeded which could prevent some combines working
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316871
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Sanjay Patel [Sun, 29 Oct 2017 20:49:31 +0000 (20:49 +0000)]
[(new) Pass Manager] instantiate SimplifyCFG with the same options as the old PM
The old PM sets the options of what used to be known as "latesimplifycfg" on the
instantiation after the vectorizers have run, so that's what we'redoing here.
FWIW, there's a later SimplifyCFGPass instantiation in both PMs where we do not
set the "late" options. I'm not sure if that's intentional or not.
Differential Revision: https://reviews.llvm.org/D39407
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316869
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Simon Pilgrim [Sun, 29 Oct 2017 20:49:27 +0000 (20:49 +0000)]
[X86][SSE] ComputeNumSignBits tests showing missing SEXT/AND/XOR/OR demandedelts support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316868
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Simon Pilgrim [Sun, 29 Oct 2017 18:19:37 +0000 (18:19 +0000)]
[SelectionDAG] Add SRA/SHL demanded elts support to ComputeNumSignBits
Introduce a isConstOrDemandedConstSplat helper function that can recognise a constant splat build vector for at least the demanded elts we care about.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316866
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Simon Pilgrim [Sun, 29 Oct 2017 18:01:31 +0000 (18:01 +0000)]
[X86][SSE] ComputeNumSignBits tests showing missing SHL/SRA demandedelts support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316865
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Craig Topper [Sun, 29 Oct 2017 17:15:09 +0000 (17:15 +0000)]
[X86] Add a slow-incdec command line to atomic-eflags-reuse.ll
I believe the test_sub_1_cmp_1_setcc_ugt test case is being miscompiled in the fast inc/dec case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316864
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Craig Topper [Sun, 29 Oct 2017 06:51:04 +0000 (06:51 +0000)]
[X86] Remove combine that turns X86ISD::LSUB into X86ISD::LADD. Update patterns that depended on this.
If the carry flag is being used, this transformation isn't safe.
This does prevent some test cases from using DEC now, but I'll try to look into that separately.
Fixes PR35068.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316860
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Craig Topper [Sun, 29 Oct 2017 06:51:02 +0000 (06:51 +0000)]
[X86] Fix typo in comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316859
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Craig Topper [Sun, 29 Oct 2017 05:14:26 +0000 (05:14 +0000)]
[X86] Use the extended vector register classes in fast isel with AVX512F/VL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316857
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Craig Topper [Sun, 29 Oct 2017 02:50:31 +0000 (02:50 +0000)]
[X86] Add AVX512 support to X86FastISel::X86SelectFPExt and X86FastISel::X86SelectFPTrunc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316856
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Craig Topper [Sun, 29 Oct 2017 02:25:48 +0000 (02:25 +0000)]
[X86] Use update_llc_test_checks.py to regenerate fast-isel-int-float-conversion.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316855
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Craig Topper [Sun, 29 Oct 2017 02:18:43 +0000 (02:18 +0000)]
[X86] Use update_llc_test_checks.py to regenerate fast-isel-fptrunc-fpext.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316854
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Craig Topper [Sun, 29 Oct 2017 02:18:41 +0000 (02:18 +0000)]
[X86] Add AVX512 support to X86FastISel::X86MaterializeFP
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316853
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Craig Topper [Sat, 28 Oct 2017 23:10:13 +0000 (23:10 +0000)]
[X86] Remove invalid code from LowerVSELECT.
This code attempted to say that v8i16/v16i16 VSELECT is legal if BWI and VLX are enabled, but the only way we could reach this point is if the condition was not a vXi1 type. Which means it really wasn't legal.
We don't have any tests that exercise this code. So I'm hoping it wasn't really reachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316851
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Simon Pilgrim [Sat, 28 Oct 2017 22:10:40 +0000 (22:10 +0000)]
[SelectionDAG] Add support for INSERT_SUBVECTOR to computeKnownBits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316847
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Simon Pilgrim [Sat, 28 Oct 2017 20:51:27 +0000 (20:51 +0000)]
[X86][SSE] Combine 128-bit target shuffles to PACKSS/PACKUS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316845
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Simon Pilgrim [Sat, 28 Oct 2017 20:27:22 +0000 (20:27 +0000)]
[X86][SSE] Split off matchVectorShuffleWithPACK. NFCI.
Split matchVectorShuffleWithPACK from lowerVectorShuffleWithPACK so that we can reuse it for target shuffle combines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316844
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Craig Topper [Sat, 28 Oct 2017 19:56:57 +0000 (19:56 +0000)]
[X86] Fix a mistake in the X86ISelDAGToDAG.cpp code for MUL8r/IMUL8r.
I think this code is unreachable due to some promotions that occur elsewhere. I'll look into that to be sure, but for now I thought I should at least fix the obvious typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316840
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Craig Topper [Sat, 28 Oct 2017 19:56:56 +0000 (19:56 +0000)]
[X86] Replace some default cases in X86SelectShift with llvm_unreachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316839
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Saleem Abdulrasool [Sat, 28 Oct 2017 19:15:05 +0000 (19:15 +0000)]
ADT: add a helper to check if the Triple is ARM64
Add a trivial helper for checking if the architecture is AArch64 Little
Endian or Big Endian.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316837
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Sanjay Patel [Sat, 28 Oct 2017 18:43:07 +0000 (18:43 +0000)]
[SimplifyCFG] use pass options and remove the latesimplifycfg pass
This is no-functional-change-intended.
This is repackaging the functionality of D30333 (defer switch-to-lookup-tables) and
D35411 (defer folding unconditional branches) with pass parameters rather than a named
"latesimplifycfg" pass. Now that we have individual options to control the functionality,
we could decouple when these fire (but that's an independent patch if desired).
The next planned step would be to add another option bit to disable the sinking transform
mentioned in D38566. This should also make it clear that the new pass manager needs to
be updated to limit simplifycfg in the same way as the old pass manager.
Differential Revision: https://reviews.llvm.org/D38631
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316835
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Simon Pilgrim [Sat, 28 Oct 2017 17:59:56 +0000 (17:59 +0000)]
[X86][SSE] Rename truncateVectorCompareWithPACKSS to truncateVectorWithPACKSS. NFC.
We no longer rely on the vector source being a comparison result, just have sufficient sign bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316834
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Craig Topper [Sat, 28 Oct 2017 17:37:51 +0000 (17:37 +0000)]
[X86] Correct the alignments on the aligned test cases in fast-isel-vecload.ll to make sure they test selection of aligned loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316833
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Simon Pilgrim [Sat, 28 Oct 2017 14:27:53 +0000 (14:27 +0000)]
[SelectionDAG] Support 'bit preserving' floating points bitcasts on computeKnownBits/ComputeNumSignBits
For cases where we know the floating point representations match the bitcasted integer equivalent, allow bitcasting to these types.
This is especially useful for the X86 floating point compare results which return all/zero bits but as a floating point type.
Differential Revision: https://reviews.llvm.org/D39289
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316831
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Craig Topper [Sat, 28 Oct 2017 06:31:48 +0000 (06:31 +0000)]
[X86] Add avx command lines to fast-isel-constpool.ll to improve coverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316829
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Craig Topper [Sat, 28 Oct 2017 06:31:46 +0000 (06:31 +0000)]
[X86] Use update_llc_test_checks.py to regenerate fast-isel-constpool.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316828
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Craig Topper [Sat, 28 Oct 2017 06:10:03 +0000 (06:10 +0000)]
[X86] Add a fast-isel test for the i8 pseudo cmov.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316827
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Craig Topper [Sat, 28 Oct 2017 05:52:23 +0000 (05:52 +0000)]
[X86] Remove unneeded MVT::i1 related code from fast isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316825
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Haicheng Wu [Sat, 28 Oct 2017 02:27:14 +0000 (02:27 +0000)]
[ConstantFold] Fix a crash when folding a GEP that has vector index
LLVM crashes when factoring out an out-of-bound index into preceding dimension
and the preceding dimension uses vector index. Simply bail out now when this
case happens.
Differential Revision: https://reviews.llvm.org/D38677
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316824
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Craig Topper [Sat, 28 Oct 2017 02:03:59 +0000 (02:03 +0000)]
[X86] Add avx command lines to two fast-isel tests to get coverage of selecting vucomiss/vucomisd.
The selection of these shows up as a code coverage hole when looking at the llvm-cov link on llvm.org
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316823
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Craig Topper [Sat, 28 Oct 2017 02:03:58 +0000 (02:03 +0000)]
[X86] Use update_llc_test_checks.py to regenerate fast-isel-select-cmov2.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316822
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Craig Topper [Sat, 28 Oct 2017 00:36:58 +0000 (00:36 +0000)]
[PartialInlineLibCalls] Teach PartialInlineLibCalls to honor nobuiltin, properly check the function signature, and check TLI::has
Summary:
We shouldn't do this transformation if the function is marked nobuitlin.
We were only checking that the return type is floating point, we really should be checking the argument types and argument count as well. This can be accomplished by using the other version of getLibFunc that takes the Function and not just the name.
We should also be checking TLI::has since sqrtf is a macro on Windows.
Fixes PR32559.
Reviewers: hfinkel, spatel, davide, efriedma
Reviewed By: davide, efriedma
Subscribers: efriedma, llvm-commits, eraman
Differential Revision: https://reviews.llvm.org/D39381
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316819
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Eugene Zelenko [Sat, 28 Oct 2017 00:24:26 +0000 (00:24 +0000)]
[ADT] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316818
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Tom Stellard [Fri, 27 Oct 2017 23:57:41 +0000 (23:57 +0000)]
AMDGPU/GlobalISel: Mark 32-bit G_FADD as legal
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D38439
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316815
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Bob Haarman [Fri, 27 Oct 2017 23:41:17 +0000 (23:41 +0000)]
[support] remove tautological comparison in Support/Windows/Path.inc
Summary:
The removed code checks that we are able to handle a 64-bit number, but
the code we're calling takes two dwords (for a total of 64 bits), so this
is always true.
Reviewers: zturner, rnk, majnemer, compnerd
Reviewed By: zturner
Subscribers: amccarth, hiraditya, lebedev.ri, llvm-commits
Differential Revision: https://reviews.llvm.org/D39263
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316814
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Jake Ehrlich [Fri, 27 Oct 2017 23:39:31 +0000 (23:39 +0000)]
Revert "Add support for writing 64-bit symbol tables for archives when offsets become too large for 32-bit"
This reverts commit r316805.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316813
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Jake Ehrlich [Fri, 27 Oct 2017 22:26:37 +0000 (22:26 +0000)]
Add support for writing 64-bit symbol tables for archives when offsets become too large for 32-bit
This should fix https://bugs.llvm.org//show_bug.cgi?id=34189
This change makes it so that if writing a K_GNU style archive, you need
to output a > 32-bit offset it should output in K_GNU64 style instead.
Differential Revision: https://reviews.llvm.org/D36812
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316805
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Krzysztof Parzyszek [Fri, 27 Oct 2017 22:24:49 +0000 (22:24 +0000)]
[Hexagon] Adjust patterns to reflect instruction selection preferences
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316804
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David Blaikie [Fri, 27 Oct 2017 22:12:46 +0000 (22:12 +0000)]
Add a few missing headers for modularization/IWYU/etc
Several cases where class definitions are required for DenseMap pointer
traits handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316803
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Guozhi Wei [Fri, 27 Oct 2017 21:54:24 +0000 (21:54 +0000)]
[DAGCombine] Don't combine sext with extload if sextload is not supported and extload has multi users
In function DAGCombiner::visitSIGN_EXTEND_INREG, sext can be combined with extload even if sextload is not supported by target, then
if sext is the only user of extload, there is no big difference, no harm no benefit.
if extload has more than one user, the combined sextload may block extload from combining with other zext, causes extra zext instructions generated. As demonstrated by the attached test case.
This patch add the constraint that when sextload is not supported by target, sext can only be combined with extload if it is the only user of extload.
Differential Revision: https://reviews.llvm.org/D39108
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316802
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Jake Ehrlich [Fri, 27 Oct 2017 21:47:38 +0000 (21:47 +0000)]
Make 32-bit member offset in Archive::Symbol::getMember 64-bit
When accessing a member for a symbol with an offset greater than 2^32 -
1 the current Archive::Symbol::getMember implementation will overflow
and cause unexpected behavior. This change simply fixes that. In
particular if you call "llvm-nm --print-armap" on an archive that has
this behavior you'll get an error.
Differential Revision: https://reviews.llvm.org/D39379
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316801
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Rafael Espindola [Fri, 27 Oct 2017 21:18:48 +0000 (21:18 +0000)]
Handle undefined weak hidden symbols on all architectures.
We were handling the non-hidden case in lib/Target/TargetMachine.cpp,
but the hidden case was handled in architecture dependent code and
only X86_64 and AArch64 were covered.
While it is true that some code sequences in some ABIs might be able
to produce the correct value at runtime, that doesn't seem to be the
common case.
I left the AArch64 code in place since it also forces a got access for
non-pic code. It is not clear if that is needed, but it is probably
better to change that in another commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316799
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Zachary Turner [Fri, 27 Oct 2017 21:12:28 +0000 (21:12 +0000)]
Force #define GTEST_LANG_CXX11.
gtest depends on this #define to determine whether it can
use various classes like std::tuple, or whether it has to fall
back to experimental classes in the std::tr1 namespace. The
check in the current version of gtest relies on the value of
the `__cplusplus` macro, but MSVC provides a non-conformant
value of this macro, making it effectively impossible to detect
C++11. In short, LLVM compiled with MSVC has been silently
using the tr1 versions of several classes since the beginning of
time.
This would normally be pretty benign, except that in the latest
preview of MSVC they have marked all of the tr1 classes
deprecated, so it spews thousands of warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316798
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Craig Topper [Fri, 27 Oct 2017 21:00:59 +0000 (21:00 +0000)]
[X86] Remove fast-isel code for handling i8 shifts. This is handled by auto generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316797
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Craig Topper [Fri, 27 Oct 2017 21:00:56 +0000 (21:00 +0000)]
[X86] Add fast-isel tests for integer shifts. We definitely had no coverage of i16 and i32/i64 are only tested by larger tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316796
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Artur Gainullin [Fri, 27 Oct 2017 20:53:41 +0000 (20:53 +0000)]
Improve clamp recognition in ValueTracking.
Summary:
ValueTracking was recognizing not all variations of clamp. Swapping of
true value and false value of select was added to fix this problem. The
first patch was reverted because it caused miscompile in NVPTX target.
Added corresponding test cases.
Reviewers: spatel, majnemer, efriedma, reames
Subscribers: llvm-commits, jholewinski
Differential Revision: https://reviews.llvm.org/D39240
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316795
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Craig Topper [Fri, 27 Oct 2017 20:13:10 +0000 (20:13 +0000)]
[X86] Teach fastisel to use VLX VMOVNTDQA for v4f64 and 256-bit integers when available.
This looks to have been missed from r280682.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316790
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Craig Topper [Fri, 27 Oct 2017 20:13:06 +0000 (20:13 +0000)]
[X86] Add avx512vl command line to fast-isel-nontemporal.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316789
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Vlad Tsyrklevich [Fri, 27 Oct 2017 19:15:13 +0000 (19:15 +0000)]
Fix llvm-special-case-list-fuzzer regexp exception
Summary:
Original oss-fuzz report:
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=3727#c2
The minimized test case that causes this failure:
5b 5b 5b 3d 47 53 00 5b 3d 5d 5b 5d 0a [[[=GS.[=][].
Note the string "=GS\x00". The failure happens because the code is
searching the string against an array of known collated names. "GS\x00"
is a hit, but since len takes into account an extra NUL byte, indexing
into cp->name[len] goes one byte past it's allocated memory. Fix this to
use a strlen(cp->name) comparison to account for NUL bytes in the input.
Reviewers: pcc
Reviewed By: pcc
Subscribers: hctim, kcc
Differential Revision: https://reviews.llvm.org/D39380
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316786
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Krzysztof Parzyszek [Fri, 27 Oct 2017 18:52:28 +0000 (18:52 +0000)]
[Hexagon] Fix an incorrect assertion in HexagonConstExtenders.cpp
Making sure that an instruction has fewer operands than required, then
attempting to access one out of range is going to fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316785
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Simon Pilgrim [Fri, 27 Oct 2017 18:14:12 +0000 (18:14 +0000)]
[X86][SSE] Add tests for inserting all-bits (-1) into a vector
We should be able to do this by re-materializing an all-bits vector and then blending with it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316779
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Peter Collingbourne [Fri, 27 Oct 2017 17:49:40 +0000 (17:49 +0000)]
ELF: Add support for emitting dynamic relocations in the Android relocation packing format.
The Android relocation packing format is a more compact
format for dynamic relocations in executables and DSOs
that is based on delta encoding and SLEBs. An overview
of the format can be found in the Android source code:
https://android.googlesource.com/platform/bionic/+/refs/heads/master/tools/relocation_packer/src/delta_encoder.h
This patch implements relocation packing using that format.
This implementation uses a more intelligent algorithm for compressing
relative relocations than Android's own relocation packer. As a
result it can generally create smaller relocation sections than
that packer. If I link Chromium for Android targeting ARM32 I get a
.rel.dyn of size 174693 bytes, as compared to 371832 bytes with gold
and the Android packer.
Differential Revision: https://reviews.llvm.org/D39152
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316775
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Simon Pilgrim [Fri, 27 Oct 2017 16:34:58 +0000 (16:34 +0000)]
[X86][F16C] Fix btver2 AGU pipe scheduling
Use the store AGU for stores, and the load AGU needs to be the first pipe for loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316771
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Artur Pilipenko [Fri, 27 Oct 2017 14:46:17 +0000 (14:46 +0000)]
[LoopPredication] Handle the case when the guard and the latch IV have different offsets
This is a follow up change for D37569.
Currently the transformation is limited to the case when:
* The loop has a single latch with the condition of the form: ++i <pred> latchLimit, where <pred> is u<, u<=, s<, or s<=.
* The step of the IV used in the latch condition is 1.
* The IV of the latch condition is the same as the post increment IV of the guard condition.
* The guard condition is of the form i u< guardLimit.
This patch enables the transform in the case when the latch is
latchStart + i <pred> latchLimit, where <pred> is u<, u<=, s<, or s<=.
And the guard is
guardStart + i u< guardLimit
Reviewed By: anna
Differential Revision: https://reviews.llvm.org/D39097
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316768
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Clement Courbet [Fri, 27 Oct 2017 13:34:41 +0000 (13:34 +0000)]
[CodeGen] Fix -Wunused-private-field warning on lld-x86_64-darwin13.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316765
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Clement Courbet [Fri, 27 Oct 2017 12:34:18 +0000 (12:34 +0000)]
[CodeGen][ExpandMemCmp][NFC] Simplify load sequence generation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316763
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whitequark [Fri, 27 Oct 2017 11:51:40 +0000 (11:51 +0000)]
[LLVM-C] Publicly expose getters of MetadataType, TokenType
Patch by Robert Widmann.
Expose getters for MetadataType and TokenType publicly in the C API.
Discovered a need for these while trying to wrap the intrinsics API.
Differential Revision: https://reviews.llvm.org/D38809
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316762
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George Rimar [Fri, 27 Oct 2017 10:58:04 +0000 (10:58 +0000)]
Fix BB after r316756 "[llvm-dwarfdump] - Teach verifier to report broken DWARF expressions."
Bot:
http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/6255
Changed format of this message by mistake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316757
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George Rimar [Fri, 27 Oct 2017 10:42:04 +0000 (10:42 +0000)]
[llvm-dwarfdump] - Teach verifier to report broken DWARF expressions.
Patch improves next things:
* Fixes assert/crash in getOpDesc when giving it a invalid expression op code.
* DWARFExpression::print() called DWARFExpression::Operation::getEndOffset() which
returned and used uninitialized field EndOffset. Patch fixes that.
* Teaches verifier to verify DW_AT_location and error out on broken expressions.
Differential revision: https://reviews.llvm.org/D39294
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316756
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Matt Arsenault [Fri, 27 Oct 2017 09:06:07 +0000 (09:06 +0000)]
DAG: Fold fma (fneg x), K, y -> fma x, -K, y
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316753
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Clement Courbet [Fri, 27 Oct 2017 08:33:51 +0000 (08:33 +0000)]
[CodeGen][ExpandMemcmp][NFC] Make tests more complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316749
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Max Kazantsev [Fri, 27 Oct 2017 08:19:35 +0000 (08:19 +0000)]
[GVN][NFC] Refactor loop iteration with foreach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316748
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NAKAMURA Takumi [Fri, 27 Oct 2017 05:45:11 +0000 (05:45 +0000)]
llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h: Fix -fmodules build introduced in rL316715.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316743
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Max Kazantsev [Fri, 27 Oct 2017 04:17:44 +0000 (04:17 +0000)]
Revert rL316568 because of sudden performance drop on ARM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316739
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Sean Fertile [Fri, 27 Oct 2017 04:02:51 +0000 (04:02 +0000)]
Add subclass data to the FoldingSetNode for MemIntrinsicSDNodes.
Not having the subclass data on an MemIntrinsicSDNodes means it was possible
to try to fold 2 nodes with the same operands but differing MMO flags. This
would trip an assertion when trying to refine the alignment between the 2
MachineMemOperands.
Differential Revision: https://reviews.llvm.org/D38898
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316737
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Eugene Zelenko [Fri, 27 Oct 2017 01:09:08 +0000 (01:09 +0000)]
[Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316724
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Reid Kleckner [Fri, 27 Oct 2017 00:45:51 +0000 (00:45 +0000)]
[PDB] Handle an empty globals hash table with no buckets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316722
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Balaram Makam [Fri, 27 Oct 2017 00:35:18 +0000 (00:35 +0000)]
Revert "[CGP] Merge empty case blocks if no extra moves are added."
This reverts commit r316711. The domtree isn't getting updated correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316721
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Sam Clegg [Fri, 27 Oct 2017 00:08:55 +0000 (00:08 +0000)]
[WebAssembly] MC: Don't allow zero sized data segments
This ensures that each segment has a unique address.
Without this, consecutive zero sized symbols would
end up with the same address and the linker cannot
map symbols to unique data segments.
Differential Revision: https://reviews.llvm.org/D39107
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316717
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David Blaikie [Thu, 26 Oct 2017 23:39:54 +0000 (23:39 +0000)]
InstructionSelectorImpl.h: Modularize/remove ODR violations by using a static member function to expose the debug name
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316715
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David Blaikie [Thu, 26 Oct 2017 23:39:52 +0000 (23:39 +0000)]
MCCodePadder.h: Include definition of type for use with DenseMap
Pointer traits require a full definition of a type to function
correctly, so the header must be included rather than only a forward
declaration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316714
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Balaram Makam [Thu, 26 Oct 2017 22:34:01 +0000 (22:34 +0000)]
[CGP] Merge empty case blocks if no extra moves are added.
Summary:
Currently we skip merging when extra moves may be added in the header of switch instead of the case block, if the case block is used as an incoming
block of a PHI. If all the incoming values of the PHIs are non-constants and the destination block is dominated by the switch block then extra moves are likely not added by ISel, so there is no need to skip merging in this case.
Reviewers: efriedma, junbuml, davidxl, hfinkel, qcolombet
Reviewed By: efriedma
Subscribers: dberlin, kuhar, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D37343
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316711
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Philip Reames [Thu, 26 Oct 2017 22:02:16 +0000 (22:02 +0000)]
[SimplifyIndVars] Shorten code by using SCEV helper [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316709
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Eli Friedman [Thu, 26 Oct 2017 21:42:32 +0000 (21:42 +0000)]
[ARM] Honor -mfloat-abi for libcall calling convention
As far as I can tell, this matches gcc: -mfloat-abi determines the
calling convention for all functions except those explicitly defined as
soft-float in the ARM RTABI.
This change only affects cases where the user specifies -mfloat-abi to
override the default calling convention derived from the target triple.
Fixes https://bugs.llvm.org//show_bug.cgi?id=34530.
Differential Revision: https://reviews.llvm.org/D38299
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316708
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David Blaikie [Thu, 26 Oct 2017 21:32:58 +0000 (21:32 +0000)]
Support/reg*: Roll some non-modular headers into their singular uses
These headers have static variables in them, which would easily create
ODR violations if the header was included in another header, and the
constants were used by an inline function, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316706
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Dehao Chen [Thu, 26 Oct 2017 21:20:52 +0000 (21:20 +0000)]
Do not add discriminator encoding for debug intrinsics.
Summary: There are certain requirements for debug location of debug intrinsics, e.g. the scope of the DILocalVariable should be the same as the scope of its debug location. As a result, we should not add discriminator encoding for debug intrinsics.
Reviewers: dblaikie, aprantl
Reviewed By: aprantl
Subscribers: JDevlieghere, aprantl, bjope, sanjoy, llvm-commits
Differential Revision: https://reviews.llvm.org/D39343
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316703
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Craig Topper [Thu, 26 Oct 2017 21:12:03 +0000 (21:12 +0000)]
[X86] Improve handling of UDIVREM8_ZEXT_HREG/SDIVREM8_SEXT_HREG to support 64-bit extensions.
If the extend type is 64-bits, emit a 32-bit -> 64-bit extend after the UDIVREM8_ZEXT_HREG/UDIVREM8_SEXT_HREG operation.
This gives a shorter encoding for the second extend in the sext case, and allows us to completely remove the second extend in the zext case.
This also adds known bit and num sign bits support for UDIVREM8_ZEXT_HREG/SDIVREM8_SEXT_HREG.
Differential Revision: https://reviews.llvm.org/D38275
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316702
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Craig Topper [Thu, 26 Oct 2017 21:03:54 +0000 (21:03 +0000)]
[X86] Teach the assembly parser to warn on duplicate registers in gather instructions.
Fixes PR32238.
Differential Revision: https://reviews.llvm.org/D39077
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316700
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Philip Reames [Thu, 26 Oct 2017 21:00:15 +0000 (21:00 +0000)]
[LICM] Restructure implicit exit handling to be more clear [NFCI]
When going to explain this to someone else, I got tripped up by the complicated meaning of IsKnownNonEscapingObject in load-store promotion. Extract a helper routine and clarify naming/scopes to make this a bit more obvious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316699
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Craig Topper [Thu, 26 Oct 2017 20:49:36 +0000 (20:49 +0000)]
[TableGen] Use Twine instead of std::string concatenation in two calls to PrintFatalError.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316697
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David Blaikie [Thu, 26 Oct 2017 20:23:11 +0000 (20:23 +0000)]
Support/reg*.h: Make headers include their dependencies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316696
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Aditya Nandakumar [Thu, 26 Oct 2017 20:13:54 +0000 (20:13 +0000)]
[GISel]: Missed checking if it's okay to create a G_CONSTANT of DstTy in the legalizationCombiner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316694
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Martin Storsjo [Thu, 26 Oct 2017 20:11:32 +0000 (20:11 +0000)]
[COFF] Support ordinals in def files with space between @ and the number
Both GNU ld and MS link.exe support declaring ordinals this way.
A test will be added in lld.
Differential Revision: https://reviews.llvm.org/D39327
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316690
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Sanjay Patel [Thu, 26 Oct 2017 18:27:55 +0000 (18:27 +0000)]
[x86] use an insert op to put one variable element into a constant of vectors
Instead of loading (a potential ton of) scalar constants, load those as a vector and then insert into it.
Differential Revision: https://reviews.llvm.org/D38756
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316685
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Vedant Kumar [Thu, 26 Oct 2017 17:58:05 +0000 (17:58 +0000)]
[docs] Fix a small typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316682
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Konstantin Zhuravlyov [Thu, 26 Oct 2017 17:54:09 +0000 (17:54 +0000)]
AMDGPU: Commit missing fence-barrier test
This should have been committed with memory model implementation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316680
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Yichao Yu [Thu, 26 Oct 2017 17:36:43 +0000 (17:36 +0000)]
Clear LastMappingSymbols and LastEMS(Info) when resetting the ARM(AArch64)ELFStreamer
Summary:
This causes a segfault on ARM when (I think) the pass manager is used multiple times.
Reset set the (last) current section to NULL without saving the corresponding LastEMSInfo back into the map. The next use of the streamer then save the LastEMSInfo for the NULL section leaving the LastEMSInfo mapping for the last current section (the one that was there before the reset) NULL which cause the LastEMSInfo to be set to NULL when the section is being used again.
The reuse of the section (pointer) might mean that the map was holding dangling pointers previously which is why I went for clearing the map and resetting the info, making it as similar to the state right after the constructor run as possible. The AArch64 one doesn't have segfault (since LastEMS isn't a pointer) but it seems to have the same issue.
The segfault is likely caused by https://reviews.llvm.org/D30724 which turns LastEMSInfo into a pointer. As mentioned above, it seems that the actual issue was older though.
No test is included since the test is believed to be too complicated for such an obvious fix and not worth doing.
Reviewers: llvm-commits, shankare, t.p.northover, peter.smith, rengolin
Reviewed By: rengolin
Subscribers: mgorny, aemerson, rengolin, javed.absar, kristof.beyls
Differential Revision: https://reviews.llvm.org/D38588
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316679
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Keno Fischer [Thu, 26 Oct 2017 17:31:33 +0000 (17:31 +0000)]
[dsymutil] Check AttrInfo.Name validity before using it
Summary:
This upstreams a patch from the osxcross [1] toolchain.
It appears that llvm-dsymutil crashes at this place during GCC
bootstrap. Adding the check here seems reasonable, since it operates
on arbitrary input DWARF, not necessarily generated by the LLVM
toolchain, and it seems the un-mangled name need not necessarily exist.
Patch by Thomas Pöchtrager
[1] https://github.com/tpoechtrager/osxcross
Reviewed By: aprantl
Differential Revision: https://reviews.llvm.org/D39336
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316678
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Keno Fischer [Thu, 26 Oct 2017 16:44:13 +0000 (16:44 +0000)]
[DynamicLibrary] Fix build on musl libc
Summary:
On musl libc, stdin/out/err are defined as `FILE* const` globals,
and their address is not implicitly convertible to void *,
or at least gcc 6 doesn't allow it, giving errors like:
```
error: cannot initialize return object of type 'void *' with an rvalue of type 'FILE *const *' (aka '_IO_FILE *const *')
EXPLICIT_SYMBOL(stderr);
^~~~~~~~~~~~~~~~~~~~~~~
```
Add an explicit cast to fix that problem.
Reviewers: marsupial, krytarowski, dim
Reviewed By: dim
Differential Revision: https://reviews.llvm.org/D39297
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316672
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Mandeep Singh Grang [Thu, 26 Oct 2017 16:07:20 +0000 (16:07 +0000)]
[MachineModuleInfoImpls] Replace qsort with array_pod_sort
Summary:
This seems to be the only place in llvm we directly call qsort. We can replace
this with a call to array_pod_sort. Also minor cleanup of the sorting function.
Reviewers: bkramer, Eugene.Zelenko, rafael
Reviewed By: bkramer
Subscribers: efriedma, llvm-commits
Differential Revision: https://reviews.llvm.org/D39214
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316671
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Balaram Makam [Thu, 26 Oct 2017 15:04:53 +0000 (15:04 +0000)]
Reapply r316582 [Local] Fix a bug in the domtree update logic for MergeBasicBlockIntoOnlyPred.
Summary: This reverts r316612 to reapply r316582. The buildbot failure was unrelated to this commit.
Reviewers:
Subscribers:
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316669
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Sean Fertile [Thu, 26 Oct 2017 15:00:26 +0000 (15:00 +0000)]
Represent runtime preemption in the IR.
Currently we do not represent runtime preemption in the IR, which has several
drawbacks:
1) The semantics of GlobalValues differ depending on the object file format
you are targeting (as well as the relocation-model and -fPIE value).
2) We have no way of disabling inlining of run time interposable functions,
since in the IR we only know if a function is link-time interposable.
Because of this llvm cannot support elf-interposition semantics.
3) In LTO builds of executables we will have extra knowledge that a symbol
resolved to a local definition and can't be preemptable, but have no way to
propagate that knowledge through the compiler.
This patch adds preemptability specifiers to the IR with the following meaning:
dso_local --> means the compiler may assume the symbol will resolve to a
definition within the current linkage unit and the symbol may be accessed
directly even if the definition is not within this compilation unit.
dso_preemptable --> means that the compiler must assume the GlobalValue may be
replaced with a definition from outside the current linkage unit at runtime.
To ease transitioning dso_preemptable is treated as a 'default' in that
low-level codegen will still do the same checks it did previously to see if a
symbol should be accessed indirectly. Eventually when IR producers emit the
specifiers on all Globalvalues we can change dso_preemptable to mean 'always
access indirectly', and remove the current logic.
Differential Revision: https://reviews.llvm.org/D20217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316668
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Marek Olsak [Thu, 26 Oct 2017 14:43:02 +0000 (14:43 +0000)]
AMDGPU: Handle s_buffer_load_dword hazard on SI
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D39171
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316666
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Bjorn Pettersson [Thu, 26 Oct 2017 13:59:15 +0000 (13:59 +0000)]
[LSV] Avoid adding vectors of pointers as candidates
Summary:
We no longer add vectors of pointers as candidates for
load/store vectorization. It does not seem to work anyway,
but without this patch we can end up in asserts when trying
to create casts between an integer type and the pointer of
vectors type.
The test case I've added used to assert like this when trying to
cast between i64 and <2 x i16*>:
opt: ../lib/IR/Instructions.cpp:2565: Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed.
#0 PrintStackTraceSignalHandler(void*)
#1 SignalHandler(int)
#2 __restore_rt
#3 __GI_raise
#4 __GI_abort
#5 __GI___assert_fail
#6 llvm::CastInst::Create(llvm::Instruction::CastOps, llvm::Value*, llvm::Type*, llvm::Twine const&, llvm::Instruction*)
#7 llvm::IRBuilder<llvm::ConstantFolder, llvm::IRBuilderDefaultInserter>::CreateBitOrPointerCast(llvm::Value*, llvm::Type*, llvm::Twine const&)
#8 Vectorizer::vectorizeStoreChain(llvm::ArrayRef<llvm::Instruction*>, llvm::SmallPtrSet<llvm::Instruction*, 16u>*)
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: nhaehnle, llvm-commits
Differential Revision: https://reviews.llvm.org/D39296
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316665
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Bjorn Pettersson [Thu, 26 Oct 2017 13:42:55 +0000 (13:42 +0000)]
[LSV] Skip all non-byte sizes, not only less than eight bits
Summary:
The code comments indicate that no effort has been spent on
handling load/stores when the size isn't a multiple of the
byte size correctly. However, the code only avoided types
smaller than 8 bits. So for example a load of an i28 could
still be considered as a candidate for vectorization.
This patch adjusts the code to behave according to the code
comment.
The test case used to hit the following assert when
trying to use "cast" an i32 to i28 using CreateBitOrPointerCast:
opt: ../lib/IR/Instructions.cpp:2565: Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed.
#0 PrintStackTraceSignalHandler(void*)
#1 SignalHandler(int)
#2 __restore_rt
#3 __GI_raise
#4 __GI_abort
#5 __GI___assert_fail
#6 llvm::CastInst::Create(llvm::Instruction::CastOps, llvm::Value*, llvm::Type*, llvm::Twine const&, llvm::Instruction*)
#7 llvm::IRBuilder<llvm::ConstantFolder, llvm::IRBuilderDefaultInserter>::CreateBitOrPointerCast(llvm::Value*, llvm::Type*, llvm::Twine const&)
#8 (anonymous namespace)::Vectorizer::vectorizeLoadChain(llvm::ArrayRef<llvm::Instruction*>, llvm::SmallPtrSet<llvm::Instruction*, 16u>*)
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39295
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316663
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Dardis [Thu, 26 Oct 2017 11:36:54 +0000 (11:36 +0000)]
[mips] Fix (dis)assembly of abs.fmt for micromips
These instructions were previously marked as codegen only preventing
them from being assembled as microMIPS or disassembled.
Reviewers: atanasyan, abeserminji
Differential Revision: https://reviews.llvm.org/D39123
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316656
91177308-0d34-0410-b5e6-
96231b3b80d8