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Juergen Ributzka [Fri, 29 Aug 2014 23:48:06 +0000 (23:48 +0000)]
[FastISel][AArch64] Use the correct register class for branches.
Also constrain the register class for branches.
This fixes rdar://problem/
18181496.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216804
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Juergen Ributzka [Fri, 29 Aug 2014 23:48:03 +0000 (23:48 +0000)]
[MachineSinking] Clear kill flag of all operands at all their uses.
When sinking an instruction it might be moved past the original last use of one
of its operands. This last use has the kill flag set and the verifier will
obviously complain about this.
Before Machine Sinking (AArch64):
%vreg3<def> = ASRVXr %vreg1, %vreg2<kill>
%XZR<def> = SUBSXrs %vreg4, %vreg1<kill>, 160, %NZCV<imp-def>
...
After Machine Sinking:
%XZR<def> = SUBSXrs %vreg4, %vreg1<kill>, 160, %NZCV<imp-def>
...
%vreg3<def> = ASRVXr %vreg1, %vreg2<kill>
This fix clears all the kill flags in all instruction that use the same operands
as the instruction that is being sunk.
This fixes rdar://problem/
18180996.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216803
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Lang Hames [Fri, 29 Aug 2014 23:17:47 +0000 (23:17 +0000)]
[MCJIT] Move endian-aware read/writes from RuntimeDyldMachO into
RuntimeDyldImpl.
These are platform independent, and moving them to the base class allows
RuntimeDyldChecker to use them too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216801
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Adrian Prantl [Fri, 29 Aug 2014 22:44:07 +0000 (22:44 +0000)]
Debug info: Add a new explicit DIDescriptor flag for the "public" access
specifier and change the default behavior to only emit the
DW_AT_accessibility(public) attribute when the isPublic() is explicitly
set.
rdar://problem/
18154959
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216799
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Jean-Luc Duprat [Fri, 29 Aug 2014 22:43:30 +0000 (22:43 +0000)]
Comment only: Annotate loop as per mailing list discussion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216798
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Alexey Samsonov [Fri, 29 Aug 2014 22:34:28 +0000 (22:34 +0000)]
Make isValidMCLOHType take unsigned instead of enum to avoid loading invalid enum values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216797
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Kevin Enderby [Fri, 29 Aug 2014 22:30:52 +0000 (22:30 +0000)]
Next bit of support for llvm-objdump’s -private-headers for Mach-O files.
This adds the printing of the LC_SEGMENT load command and sections,
LC_SYMTAB and LC_DYSYMTAB load commands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216795
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Reid Kleckner [Fri, 29 Aug 2014 22:14:26 +0000 (22:14 +0000)]
AArch64: Silence -Wabsolute-value warning with std::abs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216794
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Reid Kleckner [Fri, 29 Aug 2014 22:12:08 +0000 (22:12 +0000)]
Speculative build fix for const, gcc, and ArrayRef overloads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216793
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David Blaikie [Fri, 29 Aug 2014 22:10:52 +0000 (22:10 +0000)]
Revert accidentally committed patches r216787-r216789
Rushed when I realized I hadn't committed the FreeDeleter for a clang
change I'd committed, and didn't check that I had things lying around in
my client.
Apologies for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216792
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David Blaikie [Fri, 29 Aug 2014 22:05:31 +0000 (22:05 +0000)]
Add a trivial functor for use with unique_ptrs managing memory that needs to be freed rather than deleted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216790
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David Blaikie [Fri, 29 Aug 2014 22:05:29 +0000 (22:05 +0000)]
Omit DW_AT_artificial, DW_AT_external, and similar attributes under -gmlt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216789
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David Blaikie [Fri, 29 Aug 2014 22:05:27 +0000 (22:05 +0000)]
Omit dwarf::DW_AT_frame_base under -gmlt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216788
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David Blaikie [Fri, 29 Aug 2014 22:05:26 +0000 (22:05 +0000)]
Stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216787
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Robin Morisset [Fri, 29 Aug 2014 21:53:01 +0000 (21:53 +0000)]
Fix typos in comments, NFC
Summary: Just fixing comments, no functional change.
Test Plan: N/A
Reviewers: jfb
Subscribers: mcrosier, llvm-commits
Differential Revision: http://reviews.llvm.org/D5130
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216784
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Reid Kleckner [Fri, 29 Aug 2014 21:42:21 +0000 (21:42 +0000)]
Add a const and munge some comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216781
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Reid Kleckner [Fri, 29 Aug 2014 21:42:08 +0000 (21:42 +0000)]
musttail: Forward regparms of variadic functions on x86_64
Summary:
If a variadic function body contains a musttail call, then we copy all
of the remaining register parameters into virtual registers in the
function prologue. We track the virtual registers through the function
body, and add them as additional registers to pass to the call. Because
this is all done in virtual registers, the register allocator usually
gives us good code. If the function does a call, however, it will have
to spill and reload all argument registers (ew).
Forwarding regparms on x86_32 is not implemented because most compilers
don't support varargs in 32-bit with regparms.
Reviewers: majnemer
Subscribers: aemerson, llvm-commits
Differential Revision: http://reviews.llvm.org/D5060
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216780
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Reid Kleckner [Fri, 29 Aug 2014 21:25:28 +0000 (21:25 +0000)]
Verifier: Don't reject varargs callee cleanup functions
We've rejected these kinds of functions since r28405 in 2006 because
it's impossible to lower the return of a callee cleanup varargs
function. However there are lots of legal ways to leave such a function
without returning, such as aborting. Today we can leave a function with
a musttail call to another function with the correct prototype, and
everything works out.
I'm removing the verifier check declaring that a normal return from such
a function is UB.
Reviewed By: nlewycky
Differential Revision: http://reviews.llvm.org/D5059
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216779
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Louis Gerbarg [Fri, 29 Aug 2014 21:00:22 +0000 (21:00 +0000)]
Remove spurious mask operations from AArch64 add->compares on 16 and 8 bit values
This patch checks for DAG patterns that are an add or a sub followed by a
compare on 16 and 8 bit inputs. Since AArch64 does not support those types
natively they are legalized into 32 bit values, which means that mask operations
are inserted into the DAG to emulate overflow behaviour. In many cases those
masks do not change the result of the processing and just introduce a dependent
operation, often in the middle of a hot loop.
This patch detects the relevent DAG patterns and then tests to see if the
transforms are equivalent with and without the mask, removing the mask if
possible. The exact mechanism of this patch was discusses in
http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-July/074444.html
There is a reasonably good chance there are missed oppurtunities due to similiar
(but not identical) DAG patterns that could be funneled into this test, adding
them should be simple if we see test cases.
Tests included.
rdar://
13754426
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216776
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Reid Kleckner [Fri, 29 Aug 2014 20:50:31 +0000 (20:50 +0000)]
X86: Fix conflict over ESI between base register and rep;movsl
The new solution is to not use this lowering if there are any dynamic
allocas in the current function. We know up front if there are dynamic
allocas, but we don't know if we'll need to create stack temporaries
with large alignment during lowering. Conservatively assume that we will
need such temporaries.
Reviewed By: hans
Differential Revision: http://reviews.llvm.org/D5128
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216775
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Sanjay Patel [Fri, 29 Aug 2014 20:35:00 +0000 (20:35 +0000)]
another typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216774
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Sanjay Patel [Fri, 29 Aug 2014 20:34:17 +0000 (20:34 +0000)]
typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216773
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Robin Morisset [Fri, 29 Aug 2014 20:32:58 +0000 (20:32 +0000)]
Relax the constraint more in MemoryDependencyAnalysis.cpp
Even loads/stores that have a stronger ordering than monotonic can be safe.
The rule is no release-acquire pair on the path from the QueryInst, assuming that
the QueryInst is not atomic itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216771
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Robin Morisset [Fri, 29 Aug 2014 20:19:23 +0000 (20:19 +0000)]
[X86] Refactor X86ISelDAGToDAG::SelectAtomicLoadArith - NFC
Summary:
Mostly renaming the (not very explicit) variables Tmp0, .. Tmp4, and grouping
related statements together, along with a few lines of comments for the
surprising parts.
No functional change intended.
Test Plan: make check-all
Reviewers: jfb
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D5088
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216768
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Nick Kledzik [Fri, 29 Aug 2014 19:55:55 +0000 (19:55 +0000)]
Add missing mach-o EXPORT_SYMBOL_FLAG_KIND_ABSOLUTE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216759
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Jean-Luc Duprat [Fri, 29 Aug 2014 19:41:04 +0000 (19:41 +0000)]
Tablegen fixes for new syntax when initializing bits from variables.
Followup to r215086.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216757
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Juergen Ributzka [Fri, 29 Aug 2014 17:58:16 +0000 (17:58 +0000)]
[FastISel][AArch64] Fix an incorrect kill flag due to a bug in SelectTrunc.
When we select a trunc instruction we don't emit any code if the type is already
i32 or smaller. This is because the instruction that uses the truncated value
will deal with it.
This behavior can incorrectly transfer a kill flag, which was meant for the
result of the truncate, onto the source register.
%2 = trunc i32 %1 to i16
... = ... %2 -> ... = ... vreg1 <kill>
... = ... %1 ... = ... vreg1
This commit fixes this by emitting a COPY instruction, so that the result and
source register are distinct virtual registers.
This fixes rdar://problem/
18178188.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216750
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Tilmann Scheller [Fri, 29 Aug 2014 17:19:00 +0000 (17:19 +0000)]
[ARM] Add Thumb-2 code size optimization test for ASR (register).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216746
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Tilmann Scheller [Fri, 29 Aug 2014 17:02:28 +0000 (17:02 +0000)]
[ARM] Add Thumb-2 code size optimization test for ASR (immediate).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216744
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Hal Finkel [Fri, 29 Aug 2014 16:33:41 +0000 (16:33 +0000)]
Fix a typo in AddAliasScopeMetadata
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216741
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Matt Arsenault [Fri, 29 Aug 2014 16:01:17 +0000 (16:01 +0000)]
Make fabs safe to speculatively execute
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216736
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Matt Arsenault [Fri, 29 Aug 2014 16:01:14 +0000 (16:01 +0000)]
R600/SI: Use mad for fsub + fmul
We can use a negate source modifier to match
this for fsub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216735
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Tim Northover [Fri, 29 Aug 2014 15:34:58 +0000 (15:34 +0000)]
AArch64: only try to get operand of a known node.
A bug in r216725 meant we tried to discover the type of a SETCC before
confirming the node actually was a SETCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216734
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Frederic Riss [Fri, 29 Aug 2014 15:32:15 +0000 (15:32 +0000)]
Remove unnecessary regex in test pattern per dblaikie suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216733
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Sanjay Patel [Fri, 29 Aug 2014 15:32:09 +0000 (15:32 +0000)]
typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216732
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Jingyue Wu [Fri, 29 Aug 2014 15:30:20 +0000 (15:30 +0000)]
[NVPTX] Make the alignment an explicit argument to ldu/ldg
Summary:
Instead of specifying the alignment as metadata which may be destroyed by
transformation passes, make the alignment the second argument to ldu/ldg
intrinsic calls.
Test Plan:
ldu-ldg.ll
ldu-i8.ll
ldu-reg-plus-offset.ll
Reviewers: eliben, meheff, jholewinski
Reviewed By: meheff, jholewinski
Subscribers: jholewinski, llvm-commits
Differential Revision: http://reviews.llvm.org/D5093
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216731
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Tilmann Scheller [Fri, 29 Aug 2014 15:13:35 +0000 (15:13 +0000)]
[ARM] Make Thumb-2 code size optimization test more strict.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216729
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Tilmann Scheller [Fri, 29 Aug 2014 15:04:40 +0000 (15:04 +0000)]
[ARM] Add a first test for the Thumb-2 code size optimization pass.
While working on a Thumb-2 code size optimization I just realized that we don't have any regression tests for it.
So here's a first test case, I plan to increase the coverage over time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216728
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Tim Northover [Fri, 29 Aug 2014 13:05:18 +0000 (13:05 +0000)]
AArch64: skip select/setcc combine in complex case.
In an llvm-stress generated test, we were trying to create a v0iN type and
asserting when that failed. This case could probably be handled by the
function, but not without added complexity and the situation it arises in is
sufficiently odd that there's probably no benefit anyway.
Should fix PR20775.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216725
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Arnaud A. de Grandmaison [Fri, 29 Aug 2014 09:54:11 +0000 (09:54 +0000)]
[AArch64] FPLoadBalancing: move ownership of the chain to its current accumulator register
and forget about the previously used accumulator.
Coming up with a simple testcase is not easy, as this highly depends on
what the register allocator is doing: this issue showed up while working
with the PBQP allocator, which produced a different allocation scheme.
A testcase would need to come up with chain starting in D[0-7], then
moving to D[8-15], followed by a call to a function whose regmask
clobbers the starting accumulator in D[0-7], then another use of the chain.
Fixed some formatting, added some invariant checks while there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216721
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Frederic Riss [Fri, 29 Aug 2014 09:00:26 +0000 (09:00 +0000)]
Use DwarfDebug::attachLowHighPC for the compilation unit DIE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216719
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Robert Khasanov [Fri, 29 Aug 2014 08:46:04 +0000 (08:46 +0000)]
[SKX] Enable lowering of integer CMP operations.
Added new types to Legalizer.
Fixed getSetCCResultType function
Added lowering tests.
Reviewed by Elena Demikhovsky.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216717
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Job Noorman [Fri, 29 Aug 2014 08:23:53 +0000 (08:23 +0000)]
Do not assume the value passed to memset is an i32.
The code in SelectionDAG::getMemset for some reason assumes the value passed to
memset is an i32. This breaks the generated code for targets that only have
registers smaller than 32 bits because the value might get split into multiple
registers by the calling convention. See the test for the MSP430 target included
in the patch for an example.
This patch ensures that nothing is assumed about the type of the value. Instead,
the type is taken from the selected overload of the llvm.memset intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216716
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Craig Topper [Fri, 29 Aug 2014 06:01:43 +0000 (06:01 +0000)]
Add conversion constructor to convert ArrayRef<T*> to ArrayRef<const T*>. Reviewed with Chandler and David Blaikie.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216709
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Jiangning Liu [Fri, 29 Aug 2014 01:31:42 +0000 (01:31 +0000)]
[AArch64] Fix some failures exposed by value type v4f16 and v8f16.
1) Add some missing bitcast patterns for v8f16.
2) Add type promotion for operand of ld/st operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216706
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Chris Bieneman [Fri, 29 Aug 2014 01:05:16 +0000 (01:05 +0000)]
Cleaning up static initializers in Signals.inc
Reviewed by: Chandlerc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216704
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Chris Bieneman [Fri, 29 Aug 2014 01:05:12 +0000 (01:05 +0000)]
Cleaning up static initializers in TimeValue.
Code reviewed by Chandlerc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216703
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Alexey Samsonov [Fri, 29 Aug 2014 00:50:36 +0000 (00:50 +0000)]
Introduce -DLLVM_USE_SANITIZER=Undefined CMake option to build UBSan-ified version of LLVM/Clang.
I've fixed most of the simple bugs and currently "check-llvm" test suite
has 26 failures, and "check-clang" suite has 5 failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216701
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Juergen Ributzka [Fri, 29 Aug 2014 00:19:21 +0000 (00:19 +0000)]
[FastISel][AArch64] Don't fold instructions that are not in the same basic block.
This fix checks first if the instruction to be folded (e.g. sign-/zero-extend,
or shift) is in the same machine basic block as the instruction we are folding
into.
Not doing so can result in incorrect code, because the value might not be
live-out of the basic block, where the value is defined.
This fixes rdar://problem/
18169495.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216700
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David Majnemer [Fri, 29 Aug 2014 00:06:43 +0000 (00:06 +0000)]
Revert two GEP-related InstCombine commits
This reverts commit r216523 and r216598; people have reported
regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216698
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Reid Kleckner [Thu, 28 Aug 2014 22:42:00 +0000 (22:42 +0000)]
Don't promote byval pointer arguments when padding matters
Don't promote byval pointer arguments when when their size in bits is
not equal to their alloc size in bits. This can happen for x86_fp80,
where the size in bits is 80 but the alloca size in bits in 128.
Promoting these types can break passing unions of x86_fp80s and other
types.
Patch by Thomas Jablin!
Reviewed By: rnk
Differential Revision: http://reviews.llvm.org/D5057
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216693
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Jim Grosbach [Thu, 28 Aug 2014 22:08:28 +0000 (22:08 +0000)]
AArch64: More correctly constrain target vector extend lowering.
The AArch64 target lowering for [zs]ext of vectors is set up to handle
input simple types and expects the generic SDag path to do something reasonable
with anything that's not a simple type. The code, however, was only
checking that the result type was a simple type and assuming that
implied that the source type would also be a simple type. That's not a
valid assumption, as operations like "zext <1 x i1> %0 to <1 x i32>"
demonstrate. The fix is to simply explicitly validate the source type
as well as the result type.
PR20791
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216689
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Sanjay Patel [Thu, 28 Aug 2014 21:51:37 +0000 (21:51 +0000)]
Move FNEG next to FABS and make them more similar, so it's easier that they can be refactored. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216688
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Rafael Espindola [Thu, 28 Aug 2014 20:13:31 +0000 (20:13 +0000)]
On MachO, don't put non-private constants in mergeable sections.
On MachO, putting a symbol that doesn't start with a 'L' or 'l' in one of the
__TEXT,__literal* sections prevents the linker from merging the context of the
section.
Since private GVs are the ones the get mangled to start with 'L' or 'l', we now
only put those on the __TEXT,__literal* sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216682
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Frederic Riss [Thu, 28 Aug 2014 19:09:29 +0000 (19:09 +0000)]
Constify MCSymbol* parameters to DwarfDebug::attachLowHighPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216681
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Sanjay Patel [Thu, 28 Aug 2014 18:59:22 +0000 (18:59 +0000)]
Fix a logic bug in x86 vector codegen: sext (zext (x) ) != sext (x) (PR20472).
Remove a block of code from LowerSIGN_EXTEND_INREG() that was added with:
http://llvm.org/viewvc/llvm-project?view=revision&revision=177421
And caused:
http://llvm.org/bugs/show_bug.cgi?id=20472 (more analysis here)
http://llvm.org/bugs/show_bug.cgi?id=18054
The testcases confirm that we (1) don't remove a zext op that is necessary and (2) generate
a pmovz instead of punpck if SSE4.1 is available. Although pmovz is 1 byte longer, it allows
folding of the load, and so saves 3 bytes overall.
Differential Revision: http://reviews.llvm.org/D4909
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216679
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Owen Anderson [Thu, 28 Aug 2014 17:49:58 +0000 (17:49 +0000)]
Do not introduce new shuffle patterns after operation legalization if SHUFFLE_VECTOR
was marked custom. The target independent DAG combine has no way to know if
the shuffles it is introducing are ones that the target could support or not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216678
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Sanjay Patel [Thu, 28 Aug 2014 16:29:51 +0000 (16:29 +0000)]
Janitorial services: "Don’t duplicate function or class name at the beginning of the comment."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216674
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Sanjay Patel [Thu, 28 Aug 2014 16:01:50 +0000 (16:01 +0000)]
Remove local TLI vars that are just duplicates of the class var. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216673
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Sanjay Patel [Thu, 28 Aug 2014 15:53:16 +0000 (15:53 +0000)]
Use local vars to improve readability. No functional change.
Completes what was started in r216611 and r216623.
Used const refs instead of pointers; not sure if one is preferable to the other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216672
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Sid Manning [Thu, 28 Aug 2014 14:16:32 +0000 (14:16 +0000)]
Minor spelling correction.
Reviewers: adasgupt, jverma, sidneym
Differential Revision: http://reviews.llvm.org/D5025
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216667
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Aaron Ballman [Thu, 28 Aug 2014 13:23:26 +0000 (13:23 +0000)]
Silence a -Wsign-compare warning. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216666
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Arnaud A. de Grandmaison [Thu, 28 Aug 2014 10:15:47 +0000 (10:15 +0000)]
[PBQP] Only output debug information when requested
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216660
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David Majnemer [Thu, 28 Aug 2014 10:08:37 +0000 (10:08 +0000)]
InstCombine: Remove redundant combines
InstSimplify already handles icmp (X+Y), X (and things like it)
appropriately. The first thing that InstCombine does is run
InstSimplify on the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216659
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Erik Eckstein [Thu, 28 Aug 2014 07:04:02 +0000 (07:04 +0000)]
Fix: SLPVectorizer tried to move an instruction which was replaced by a vector instruction.
For a detailed description of the problem see the comment in the test file.
The problematic moveBefore() calls are not required anymore because the new
scheduling algorithm ensures a correct ordering anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216656
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David Xu [Thu, 28 Aug 2014 04:59:53 +0000 (04:59 +0000)]
Generate CMN when comparing a short int with minus
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216651
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Justin Hibbits [Thu, 28 Aug 2014 04:40:55 +0000 (04:40 +0000)]
Test commit. Fix whitespace from a previous patch of mine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216650
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Lang Hames [Thu, 28 Aug 2014 04:25:17 +0000 (04:25 +0000)]
[MCJIT] Fix format specifiers for debug output in RuntimeDyld.
More work on http://llvm.org/PR20640
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216648
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David Majnemer [Thu, 28 Aug 2014 04:02:50 +0000 (04:02 +0000)]
MC: Don't crash when the COFF section limit is reached
I've decided not to commit a test, it takes 2.5 seconds to run on my an
incredibly strong machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216647
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Chandler Carruth [Thu, 28 Aug 2014 04:00:24 +0000 (04:00 +0000)]
[x86] Fix whitespace and formatting around this function with
clang-format, no functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216646
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Chandler Carruth [Thu, 28 Aug 2014 03:57:13 +0000 (03:57 +0000)]
[x86] Hoist conditions from *every single if* in this routine to
a single early exit.
And factor the subsequent cast<> from all but one block into a single
variable.
No functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216645
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Chandler Carruth [Thu, 28 Aug 2014 03:52:45 +0000 (03:52 +0000)]
[x86] Inline an SSE4 helper function for INSERT_VECTOR_ELT lowering, no
functionality changed.
Separating this into two functions wasn't helping. There was a decent
amount of boilerplate duplicated, and some subsequent refactorings here
will pull even more common code out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216644
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Chandler Carruth [Thu, 28 Aug 2014 03:41:28 +0000 (03:41 +0000)]
[x86] Clean up some tests to use FileCheck and combine two into a single
file.
Changing code that is covered by these tests is just too hard to debug
currently, and now it will be clear the nature of the changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216643
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David Majnemer [Thu, 28 Aug 2014 03:34:28 +0000 (03:34 +0000)]
InstSimplify: Move a transform from InstCombine to InstSimplify
Several combines involving icmp (shl C2, %X) C1 can be simplified
without introducing any new instructions. Move them to InstSimplify;
while we are at it, make them more powerful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216642
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Juergen Ributzka [Thu, 28 Aug 2014 02:06:55 +0000 (02:06 +0000)]
[FastISel] Undo phi node updates when falling-back to SelectionDAG.
The included test case would fail, because the MI PHI node would have two
operands from the same predecessor.
This problem occurs when a switch instruction couldn't be selected. This happens
always, because there is no default switch support for FastISel to begin with.
The problem was that FastISel would first add the operand to the PHI nodes and
then fall-back to SelectionDAG, which would then in turn add the same operands
to the PHI nodes again.
This fix removes these duplicate PHI node operands by reseting the
PHINodesToUpdate to its original state before FastISel tried to select the
instruction.
This fixes <rdar://problem/
18155224>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216640
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Juergen Ributzka [Thu, 28 Aug 2014 00:09:46 +0000 (00:09 +0000)]
[FastISel]
Currently instructions are folded very aggressively for AArch64 into the memory
operation, which can lead to the use of killed operands:
%vreg1<def> = ADDXri %vreg0<kill>, 2
%vreg2<def> = LDRBBui %vreg0, 2
... = ... %vreg1 ...
This usually happens when the result is also used by another non-memory
instruction in the same basic block, or any instruction in another basic block.
This fix teaches hasTrivialKill to not only check the LLVM IR that the value has
a single use, but also to check if the register that represents that value has
already been used. This can happen when the instruction with the use was folded
into another instruction (in this particular case a load instruction).
This fixes rdar://problem/
18142857.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216634
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Juergen Ributzka [Wed, 27 Aug 2014 23:09:40 +0000 (23:09 +0000)]
Revert "[FastISel][AArch64] Don't fold instructions too aggressively into the memory operation."
Quentin pointed out that this is not the correct approach and there is a better and easier solution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216632
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Alexey Samsonov [Wed, 27 Aug 2014 23:06:08 +0000 (23:06 +0000)]
Fix unaligned reads/writes in X86JIT and RuntimeDyldELF.
Summary:
Introduce support::ulittleX_t::ref type to Support/Endian.h and use it in x86 JIT
to enforce correct endianness and fix unaligned accesses.
Test Plan: regression test suite
Reviewers: lhames
Subscribers: ributzka, llvm-commits
Differential Revision: http://reviews.llvm.org/D5011
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216631
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Juergen Ributzka [Wed, 27 Aug 2014 22:52:33 +0000 (22:52 +0000)]
[FastISel][AArch64] Don't fold instructions too aggressively into the memory operation.
Currently instructions are folded very aggressively into the memory operation,
which can lead to the use of killed operands:
%vreg1<def> = ADDXri %vreg0<kill>, 2
%vreg2<def> = LDRBBui %vreg0, 2
... = ... %vreg1 ...
This usually happens when the result is also used by another non-memory
instruction in the same basic block, or any instruction in another basic block.
If the computed address is used by only memory operations in the same basic
block, then it is safe to fold them. This is because all memory operations will
fold the address computation and the original computation will never be emitted.
This fixes rdar://problem/
18142857.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216629
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Renato Golin [Wed, 27 Aug 2014 21:58:56 +0000 (21:58 +0000)]
Avoid zero length memset error
Adding a check on buffer lenght to avoid a __warn_memset_zero_len
warning on GCC 4.8.2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216624
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Sanjay Patel [Wed, 27 Aug 2014 21:42:42 +0000 (21:42 +0000)]
Use local variable in visitFADD. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216623
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Juergen Ributzka [Wed, 27 Aug 2014 21:40:50 +0000 (21:40 +0000)]
[FastISel][AArch64] Fix a comment in my previous commit (r216617).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216622
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Juergen Ributzka [Wed, 27 Aug 2014 21:38:33 +0000 (21:38 +0000)]
[FastISel][AArch64] Fix simplify address when the address comes from a shift.
When the address comes directly from a shift instruction then the address
computation cannot be folded into the memory instruction, because the zero
register is not available as a base register. Simplify addess needs to emit the
shift instruction and use the result as base register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216621
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Rafael Espindola [Wed, 27 Aug 2014 21:11:13 +0000 (21:11 +0000)]
Fix a double free in llvm::getBitcodeTargetTriple.
Unfortunately this is only used by ld64, so no testcase, but should fix the darwin LTO bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216618
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Juergen Ributzka [Wed, 27 Aug 2014 21:04:52 +0000 (21:04 +0000)]
[FastISel][AArch64] Use the zero register for stores.
Use the zero register directly when possible to avoid an unnecessary register
copy and a wasted register at -O0. This also uses integer stores to store a
positive floating-point zero. This saves us from materializing the positive zero
in a register and then storing it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216617
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Sanjay Patel [Wed, 27 Aug 2014 20:57:52 +0000 (20:57 +0000)]
Group unsafe-math optimizations for fsub into one block. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216616
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Juergen Ributzka [Wed, 27 Aug 2014 20:47:33 +0000 (20:47 +0000)]
[FastISel] Fix a potential bug in FastEmitInst_ri
FastEmitInst_ri was constraining the first operand without checking if it is
a virtual register. Use constrainOperandRegClass as all the other
FastEmitInst_* functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216613
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Sanjay Patel [Wed, 27 Aug 2014 20:40:31 +0000 (20:40 +0000)]
Use local variable to improve readability.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216611
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Sanjay Patel [Wed, 27 Aug 2014 20:27:05 +0000 (20:27 +0000)]
typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216609
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Rafael Espindola [Wed, 27 Aug 2014 20:25:55 +0000 (20:25 +0000)]
Don't create a MemoryBuffer just to get the MemoryBufferRef. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216608
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David Blaikie [Wed, 27 Aug 2014 20:14:18 +0000 (20:14 +0000)]
Convert a few more cases of direct intialization of unique_ptrs from MemoryBuffer::getMemBuffer to move initialization now that it returns by unique_ptr instead of raw pointer.
Cleanup/improvements following r216583.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216605
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Reid Kleckner [Wed, 27 Aug 2014 20:10:38 +0000 (20:10 +0000)]
X86 MC: Handle instructions like fxsave that match multiple operand sizes
Instructions like 'fxsave' and control flow instructions like 'jne'
match any operand size. The loop I added to the Intel syntax matcher
assumed that using a different size would give a different instruction.
Now it handles the case where we get the same instruction for different
memory operand sizes.
This also allows us to remove the hack we had for unsized absolute
memory operands, because we can successfully match things like 'jnz'
without reporting ambiguity. Removing this hack uncovered test case
involving 'fadd' that was ambiguous. The memory operand could have been
single or double precision.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216604
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David Majnemer [Wed, 27 Aug 2014 20:08:37 +0000 (20:08 +0000)]
InstCombine: Combine gep X, (Y-X) to Y
We try to perform this transform in InstSimplify but we aren't always
able to. Sometimes, we need to insert a bitcast if X and Y don't have
the same time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216598
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David Majnemer [Wed, 27 Aug 2014 20:08:34 +0000 (20:08 +0000)]
InstSimplify: Don't simplify gep X, (Y-X) to Y if types differ
It's incorrect to perform this simplification if the types differ.
A bitcast would need to be inserted for this to work.
This fixes PR20771.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216597
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Nico Weber [Wed, 27 Aug 2014 20:06:19 +0000 (20:06 +0000)]
Reland r216439 215441, majnemer has a real fix for PR20771.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216586
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Rafael Espindola [Wed, 27 Aug 2014 20:03:13 +0000 (20:03 +0000)]
Return a std::unique_ptr when creating a new MemoryBuffer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216583
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Nico Weber [Wed, 27 Aug 2014 20:00:13 +0000 (20:00 +0000)]
Revert r216439 (and r216441, else the former doesn't revert cleanly).
It caused PR 20771. I'll land a test on the clang side.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216582
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Rafael Espindola [Wed, 27 Aug 2014 19:49:03 +0000 (19:49 +0000)]
Remove unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216580
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Alexey Samsonov [Wed, 27 Aug 2014 19:36:53 +0000 (19:36 +0000)]
Use BitVector instead of int in R600 SIISelLowering.
int may not have enough bits in it, which was detected by UBSan
bootstrap (it reported left shift by a too large constant).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216579
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Rafael Espindola [Wed, 27 Aug 2014 19:03:22 +0000 (19:03 +0000)]
yaml::Stream doesn't need to take ownership of the buffer.
In fact, most users were already using the StringRef version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216575
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