OSDN Git Service
Fred Shih [Wed, 6 Aug 2014 17:46:37 +0000 (10:46 -0700)]
Added support for patching classes from different dex files.
Added support for class patching from different dex files and moved
ScopedObjectAccess from the quick compiler to driver. Slight refactoring
for clarity.
Bug:
16656190
Change-Id: I107fcbce75db42ca61321ea1c5d5f236680a1b3d
Fred Shih [Wed, 6 Aug 2014 17:42:17 +0000 (10:42 -0700)]
Revert "Temporary fix for bad LIR generation in GenInlinedGet."
This reverts commit
eb76e11d836ea953b4e40a28e3e69d3b0f4c86fa.
Bug:
16656190
Change-Id: Ie2dd58436b28e79214ef3a7c7651f16fe46a60e8
Mathieu Chartier [Wed, 6 Aug 2014 01:12:05 +0000 (01:12 +0000)]
Merge "Fix byte_cas to use uintptr_t Atomic."
Mathieu Chartier [Tue, 5 Aug 2014 22:59:43 +0000 (15:59 -0700)]
Fix byte_cas to use uintptr_t Atomic.
Previously we used int32_t Atomic with a uintptr_t bit shift.
This was a mismatch on 64 bit and resulted in occasionally
having the cas return without having succeeded.
Bug:
16819816
Change-Id: I10fa9c2f09ae8fe0997a4c9293fa123c6bde5920
Nicolas Geoffray [Tue, 5 Aug 2014 22:19:45 +0000 (22:19 +0000)]
Merge "Fix movw in x86_64 assembler."
Nicolas Geoffray [Tue, 5 Aug 2014 21:52:45 +0000 (22:52 +0100)]
Fix movw in x86_64 assembler.
Change-Id: Ibceb03fd57adea09643aa77a9399be196fa14709
Ian Rogers [Tue, 5 Aug 2014 21:57:45 +0000 (21:57 +0000)]
Merge "x86: Fix assembler for Pextr"
Ian Rogers [Tue, 5 Aug 2014 21:32:29 +0000 (21:32 +0000)]
Merge "X86: Assembler: Correct r8_form for some cases"
Ian Rogers [Tue, 5 Aug 2014 21:44:41 +0000 (21:44 +0000)]
Merge "ART: Fix lock max count definition"
Ian Rogers [Tue, 5 Aug 2014 20:38:02 +0000 (20:38 +0000)]
Merge "x86_64: Load double constant using core register"
Alexei Zavjalov [Thu, 10 Jul 2014 11:34:23 +0000 (18:34 +0700)]
x86_64: Load double constant using core register
This changes the double const loading scheme for x86_64 in order to
reduce number of memory accesses.
Change-Id: If6ee34b890287ed616ca4ea5d1c13f06a06293a9
Signed-off-by: Alexei Zavjalov <alexei.zavjalov@intel.com>
Vladimir Marko [Tue, 5 Aug 2014 09:13:39 +0000 (09:13 +0000)]
Merge "Create allocator adapter for using Arena in std containers."
Vladimir Marko [Thu, 31 Jul 2014 14:33:43 +0000 (15:33 +0100)]
Create allocator adapter for using Arena in std containers.
Create ArenaAllocatorAdapter, similar to the existing
ScopedArenaAllocatorAdapter, for allocating memory for
standard containers via the ArenaAllocator. Add the ability
to specify allocation kind rather than just kArenaAllocSTL
to both adapters. Move the scoped arena allocator to the
scoped_arena_containers.h header file.
Define template aliases for containers using the new adapter
and change a few MIRGraph and Mir2Lir members to use them.
Change-Id: I9bbc50248e0fed81729497b848cb29bf68444268
Brian Carlstrom [Tue, 5 Aug 2014 17:49:28 +0000 (17:49 +0000)]
Merge changes Ibe92d8b5,I9bada598
* changes:
Make system use patchoat to relocate during runtime.
Temporary fix for bad LIR generation in GenInlinedGet.
Alex Light [Fri, 18 Jul 2014 21:57:04 +0000 (14:57 -0700)]
Make system use patchoat to relocate during runtime.
Change dalvik_system_DexFile.cc so that isDexOptNeededInternal will be
able to indicate that a patchoat is required. Change default of relocate
option to be on.
Bug:
15358152
Change-Id: Ibe92d8b55a24bbf718b0416a21b76e5df7a2de26
Alex Light [Tue, 29 Jul 2014 22:22:40 +0000 (15:22 -0700)]
Temporary fix for bad LIR generation in GenInlinedGet.
In GenInlinedGet we will sometimes try to load a class directly. If
we are doing that and find one, but cannot get the direct pointer
(due to image compilation or including patch information) we might
end up generating incorrect patching code due to the changing of the
cu_->dex_file attribute.
Bug:
16656190
Change-Id: I9bada598bf4fd972d6164163eedd4a496da306d6
Ian Rogers [Tue, 5 Aug 2014 17:30:49 +0000 (17:30 +0000)]
Merge "ART: Enable x86_64 bit support for intrinsic for System.arraycopy(char[], ..)"
DaniilSokolov [Fri, 18 Jul 2014 01:58:15 +0000 (18:58 -0700)]
ART: Enable x86_64 bit support for intrinsic for System.arraycopy(char[], ..)
Implements x86_64 support for intrinsic for java.lang.System.arraycopy(char[], int, char[], int, int).
With this fix the intrinsic works on x86 and x86_64 architectures.
Change-Id: Icc2889ccd0cf7d821522abb7437893e3149e7c99
Signed-off-by: Daniil Sokolov <daniil.y.sokolov@intel.com>
Brian Carlstrom [Tue, 5 Aug 2014 05:45:06 +0000 (05:45 +0000)]
Merge "ART: Fix memory unmapped twice issue in ElfFile::Load(bool)"
Jim_Guo [Mon, 28 Apr 2014 03:11:57 +0000 (11:11 +0800)]
ART: Fix memory unmapped twice issue in ElfFile::Load(bool)
Root Cause:
The overlapped memory region will be unmapped by
(1) ~MemMap() of reservation MemMap (reserve) and
(2) ~MemMap() of "reuse" MemMap (segment).
Someone takes the memory region after (1) and it will be unmapped in (2).
So, SIGSEGV occurs when using the unmapped memory region.
Solution:
Fixes this issue by skip unmap "reuse" MemMap in destructor.
And always create reservation MemMap before "reuse" MemMap. (It also solved
the fixupELF case which does not reserve the whole needed memory region).
Bug:
16486685
Change-Id: I8f2538861d5c3fa7b9a04d2c3f516319cc060291
Christopher Ferris [Tue, 5 Aug 2014 02:56:06 +0000 (02:56 +0000)]
Merge "Use the uncached form of BacktraceMap::Create."
Christopher Ferris [Tue, 5 Aug 2014 00:15:21 +0000 (17:15 -0700)]
Use the uncached form of BacktraceMap::Create.
The code assumes that calling BacktraceMap::Create creates a map based
on the current state of the maps. This is not true by default, so
call the Create function indicating we want an uncached BacktraceMap object.
(cherry picked from
27a10f618357cf85cc0677a04f0a5a3a8a437aed)
Change-Id: Ic7a2dedaea9950174b24ede4dcda30ffe036fe93
Andreas Gampe [Tue, 5 Aug 2014 01:44:22 +0000 (01:44 +0000)]
Merge "ART: Refactor long ops in quick compiler"
Andreas Gampe [Mon, 4 Aug 2014 23:30:03 +0000 (16:30 -0700)]
ART: Refactor long ops in quick compiler
Make GenArithOpLong virtual. Let the implementation in gen_common be
very basic, without instruction-set checks, and meant as a fall-back.
Backends should implement and dispatch to code for better implementations.
This allows to remove the GenXXXLong virtual methods from Mir2Lir, and
clean up the backends (especially removing some LOG(FATAL) implementations).
Change-Id: I6366443c0c325c1999582d281608b4fa229343cf
Ian Rogers [Tue, 5 Aug 2014 16:56:44 +0000 (16:56 +0000)]
Merge "Set REG0_USED on X86 Set8R instruction"
Mark Mendell [Thu, 31 Jul 2014 18:36:54 +0000 (14:36 -0400)]
Set REG0_USED on X86 Set8R instruction
Since this instruction only affects the low byte of the register, it is
preceded by an XOR to zero the upper 3 bytes. Set8R isn't marked as
using operand 0 as an input. In practice, this works for now, as the
Xor sets the CC and Set8R uses the CC (although not that of the Xor, but
of a Cmp generally).
This just marks REG0 as using the previous contents of the register, as
it is modifying only 1 byte of 4.
Change-Id: I7a69cbdb06979da5d5d2ae17fabd7c22c5a17701
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
Ian Rogers [Tue, 5 Aug 2014 14:57:33 +0000 (14:57 +0000)]
Merge "ART: Correct disassembling of 64bit immediates on x86_64"
Ian Rogers [Tue, 5 Aug 2014 14:53:08 +0000 (14:53 +0000)]
Merge "x86_64: Fix Test32RM"
Chao-ying Fu [Thu, 24 Jul 2014 19:08:28 +0000 (12:08 -0700)]
x86_64: Fix Test32RM
This patch fixes Test32RM use flags and the format.
Change-Id: I486cb7f27e65caeefccbd3bbcc38257ddca033c8
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Calin Juravle [Tue, 5 Aug 2014 10:47:26 +0000 (10:47 +0000)]
Merge "Use canonical paths when searching for dex files"
Andreas Gampe [Mon, 4 Aug 2014 23:22:12 +0000 (23:22 +0000)]
Merge "AArch64: Implement InexpensiveConstant methods."
Matteo Franchin [Fri, 4 Jul 2014 11:53:27 +0000 (12:53 +0100)]
AArch64: Implement InexpensiveConstant methods.
Implement IsInexpensiveConstant and friends for A64.
Also extending the methods to take the opcode with respect to which
the constant is inexpensive. Additionally, logical operations (i.e.
and, or, xor) can now handle the immediates 0 and ~0 (which are not
logical immediates).
Change-Id: I46ce1287703765c5ab54983d13c1b3a1f5838622
Calin Juravle [Tue, 15 Jul 2014 22:56:47 +0000 (23:56 +0100)]
Use canonical paths when searching for dex files
Apps which use the DexPathClassLoader directly may
pass symlinks when trying to load dex files. This
will not work as we use string comparision to find
the dex in an oat file. The CL fixes this issue by
using using dex conical paths for comparisons.
Bug:
15313272
Change-Id: Ic314374b17612c3afbcadec93a88b2515a0aca5e
Dmitry Petrochenko [Mon, 28 Jul 2014 10:40:16 +0000 (17:40 +0700)]
ART: Fix lock max count definition
The lock max count should utilize 14 bits since 2 highest bits are reserved for lock state.
Change-Id: I9d562f7bca9c0853231800a706a8523204e8aa9d
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Andreas Gampe [Mon, 4 Aug 2014 23:32:31 +0000 (23:32 +0000)]
Merge "Add trampoline invoke and ART callback tests for native-bridge"
Yong WU [Sun, 3 Aug 2014 08:06:52 +0000 (16:06 +0800)]
Add trampoline invoke and ART callback tests for native-bridge
Create trampolines for JNI functions in native-bridge. Test trampoline
invoking from ART side.
Add tests for ART callbacks which called from native-bridge. In this test
they are invoked from the trampoline of JNI_OnLoad.
Change-Id: Ibaa5103fdf49a6b29a1c12f45410fe5f82d46b1e
Andreas Gampe [Mon, 4 Aug 2014 22:56:32 +0000 (22:56 +0000)]
Merge "AArch64: Add inlining support for ceil(), floor(), rint(), round()"
Serban Constantinescu [Thu, 31 Jul 2014 18:07:17 +0000 (19:07 +0100)]
AArch64: Add inlining support for ceil(), floor(), rint(), round()
This patch adds inlining support for the following Math, StrictMath
methods in the ARM64 backend:
* double ceil(double)
* double floor(double)
* double rint(double)
* long round(double)
* int round(float)
Also some cleanup.
Change-Id: I9f5a2f4065b1313649f4b0c4380b8176703c3fe1
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
Jeff Hao [Mon, 4 Aug 2014 22:17:40 +0000 (22:17 +0000)]
Merge "Make verifier identify unresolved methods as constructors by <init>."
Jeff Hao [Mon, 4 Aug 2014 21:47:17 +0000 (14:47 -0700)]
Make verifier identify unresolved methods as constructors by <init>.
Check was previously missing brackets in the method name.
Bug:
16560516
(cherry picked from commit
04ce113458b6b01f96d58dbb4c41682ee22d8b5d)
Change-Id: Ie98c5b84e73ffc43ea08e1b08ae9c6e41bcd5891
Andreas Gampe [Mon, 4 Aug 2014 19:36:53 +0000 (19:36 +0000)]
Merge "ART: Implement the easy long division/remainder by a constant"
Alexei Zavjalov [Mon, 14 Jul 2014 19:19:41 +0000 (02:19 +0700)]
ART: Implement the easy long division/remainder by a constant
Also optimizes long/int divisions by power-of-two values.
Also do some clean-up.
Change-Id: Ie414e64aac251c81361ae107d157c14439e6dab5
Signed-off-by: Alexei Zavjalov <alexei.zavjalov@intel.com>
Brian Carlstrom [Mon, 4 Aug 2014 18:27:31 +0000 (18:27 +0000)]
Merge "Move image classes options from art to AndroidRuntime [art]"
Brian Carlstrom [Mon, 4 Aug 2014 18:27:30 +0000 (18:27 +0000)]
Merge "Move from dalvik.vm.image-dex2oat-flags to dalvik.vm.dex2oat-filter [art]"
Andreas Gampe [Mon, 4 Aug 2014 17:46:05 +0000 (17:46 +0000)]
Merge "AArch64: Remove unnecessary work around for sp."
Zheng Xu [Tue, 1 Jul 2014 01:53:22 +0000 (09:53 +0800)]
AArch64: Remove unnecessary work around for sp.
Use RegRegRegExtend to encode instruction for "sub/add sp, sp, Xm".
Change-Id: I13d3d2d386a7bd827e1396f291a7dcb9bffd5a29
Narayan Kamath [Mon, 4 Aug 2014 17:31:49 +0000 (17:31 +0000)]
Merge "Inform about System.exit() call in logcat"
Dmitry Petrochenko [Thu, 3 Jul 2014 10:07:45 +0000 (17:07 +0700)]
Inform about System.exit() call in logcat
This diagnostic message helps to filter out crashes during System.exit()
when thread's behaviour is undefined.
Change-Id: I772932a35b503b1efca695e7da7bf2e562c03a7c
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
Andreas Gampe [Mon, 4 Aug 2014 16:32:25 +0000 (16:32 +0000)]
Merge "ART: Rework ARM64 entry sequence"
Andreas Gampe [Tue, 29 Jul 2014 07:35:00 +0000 (00:35 -0700)]
ART: Rework ARM64 entry sequence
Try to fold one sub of SP in the ARM64 entry sequence. When the
framesize is small, generate a sub over the full frame-size, and
adjust the spill offsets accordingly. If the framesize is too
large, use a pre-indexed store and fill upwards from there.
Change-Id: I1c15ac6276fb62b8164372de02fd92437f605938
Narayan Kamath [Mon, 4 Aug 2014 11:24:20 +0000 (11:24 +0000)]
Merge "Fix broken JNI IsAssignableFrom."
Narayan Kamath [Fri, 11 Jul 2014 18:15:11 +0000 (19:15 +0100)]
Fix broken JNI IsAssignableFrom.
The expected argument order was the opposite of what the spec
dictated.
Reported-By: Mikhail Naganov <mnaganov@google.com>
bug:
16531674
Change-Id: I1ebc6d5814ebb4feeb96f3ecdf1a4602da4ba7ce
Bill Buzbee [Thu, 31 Jul 2014 21:02:56 +0000 (21:02 +0000)]
Merge "Revert "Revert "Enable Load Store Elimination for ARM and ARM64"""
Mark Mendell [Thu, 31 Jul 2014 17:20:21 +0000 (13:20 -0400)]
X86: Assembler: Correct r8_form for some cases
Set r8_form to false for instruction formats that don't reference
registers.
Change-Id: Ib01edef4ef7f22de25a31dc4207889bff97d163d
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
Brian Carlstrom [Wed, 30 Jul 2014 22:13:25 +0000 (15:13 -0700)]
Move image classes options from art to AndroidRuntime [art]
Bug:
15165413
Change-Id: I3dfa702ac29279cf76d4cc451138c03a5158ac3a
Brian Carlstrom [Tue, 29 Jul 2014 02:13:27 +0000 (19:13 -0700)]
Move from dalvik.vm.image-dex2oat-flags to dalvik.vm.dex2oat-filter [art]
This will allow us to conditionally change the compiler-filter based on other properties.
Bug:
15165413
Change-Id: I6877a6eab221ab142909b595fd28191b5d3a095b
Vladimir Kostyukov [Wed, 23 Jul 2014 05:10:07 +0000 (12:10 +0700)]
ART: Correct disassembling of 64bit immediates on x86_64
The patch fixes an issue with disassembling 'movsxd' and 'movabsq'
instructions altered with 64bit immediates: not only a REX.W prefix
may be prepended to these instructions.
Change-Id: Ida7c7b368327a6b5cae1ff12ec00ceb0769c0a3d
Signed-off-by: Vladimir Kostyukov <vladimir.kostyukov@intel.com>
Narayan Kamath [Thu, 31 Jul 2014 16:56:26 +0000 (16:56 +0000)]
Merge "Fix image not regenerating on changes to bootclasspath"
Alex Light [Thu, 31 Jul 2014 16:32:13 +0000 (09:32 -0700)]
Fix image not regenerating on changes to bootclasspath
Bug:
16367410
Change-Id: I10e81d068ffc2ab712a287f88ef67f6a1be4df4c
Bill Buzbee [Thu, 31 Jul 2014 14:08:33 +0000 (14:08 +0000)]
Merge "ART: LoadConstWide should clobber temp reg"
Alexei Zavjalov [Wed, 30 Jul 2014 12:31:04 +0000 (19:31 +0700)]
ART: LoadConstWide should clobber temp reg
If we have 2+ LoadConstWide(FP) calls in one method it is possible
that LoadConstWide will load the method poiner only once. In some
cases, for example, if we have branches, initialization might not be
done and it may lead to a segmentation fault.
Change-Id: If45fc2d1109d7ce9bd272f5c56446b2a6884daac
Signed-off-by: Alexei Zavjalov <alexei.zavjalov@intel.com>
Hiroshi Yamauchi [Thu, 31 Jul 2014 18:32:43 +0000 (18:32 +0000)]
Merge "Add read barriers for the roots in the verifier."
Hiroshi Yamauchi [Wed, 30 Jul 2014 21:26:22 +0000 (14:26 -0700)]
Add read barriers for the roots in the verifier.
Note: Because the roots (the class references in RegType objects) can
be updated by the read barriers, a lot of uses of type "const RegType"
were replaced with "RegType".
Bug:
12687968
Change-Id: I6cf37a87f352938d43fb51560a8d927ada104f50
Narayan Kamath [Thu, 31 Jul 2014 18:06:57 +0000 (18:06 +0000)]
Merge "Make ImageSpace skip validation if we are using a relocated image"
Alex Light [Thu, 31 Jul 2014 17:48:46 +0000 (10:48 -0700)]
Make ImageSpace skip validation if we are using a relocated image
Change-Id: I0682d1870f5b3e27adb9c9de803fbb7d364ad00d
Brian Carlstrom [Wed, 30 Jul 2014 17:41:27 +0000 (17:41 +0000)]
Merge "Make 32bit run-tests work correctly on 64bit default devices."
Alex Light [Wed, 30 Jul 2014 01:31:18 +0000 (18:31 -0700)]
Make 32bit run-tests work correctly on 64bit default devices.
Change-Id: I7a5ca303ab91dec0df95358435e4a56c18a7fce3
Vladimir Marko [Thu, 31 Jul 2014 09:31:40 +0000 (09:31 +0000)]
Merge "Reduce time and memory usage of GVN."
Vladimir Marko [Tue, 29 Jul 2014 11:04:10 +0000 (12:04 +0100)]
Reduce time and memory usage of GVN.
Filter out dead sregs in GVN. Reclaim memory after each LVN
in the GVN modification phase.
Bug:
16398693
Change-Id: I8c88c3009663754e1b66c0ef3f62c3b93276e385
Andreas Gampe [Thu, 31 Jul 2014 06:24:06 +0000 (06:24 +0000)]
Merge "ART: Build fix"
Andreas Gampe [Thu, 31 Jul 2014 06:21:36 +0000 (23:21 -0700)]
ART: Build fix
Make lint happy, as comments should be separated from code.
Change-Id: I4bfd88357302be9a6a104f1152e3b1fda386371e
Ian Rogers [Thu, 31 Jul 2014 04:21:44 +0000 (04:21 +0000)]
Merge "1. Fix CFI for quick compiled code in x86 & x86_64; 2. Emit CFI in .eh_frame instead of .debug_frame."
Tong Shen [Wed, 30 Jul 2014 16:31:22 +0000 (09:31 -0700)]
1. Fix CFI for quick compiled code in x86 & x86_64;
2. Emit CFI in .eh_frame instead of .debug_frame.
With CFI, we can correctly unwind past quick generated code.
Now gdb should unwind to main() for both x86 & x86_64 host-side ART.
Note that it does not work with relocation yet.
Testing:
1. art/test/run-test --host --gdb [--64] --no-relocate 005
2. In gdb, run 'b art_quick_invoke_stub', then 'r', then 'c' a few times
3. In gdb, run 'bt'. You should see stack frames down to main()
Change-Id: I5350d4097dc3d360a60cb17c94f1d02b99bc58bb
Ian Rogers [Thu, 31 Jul 2014 03:56:05 +0000 (03:56 +0000)]
Merge "Add --always-clean flag to run-test."
Andreas Gampe [Thu, 31 Jul 2014 03:39:34 +0000 (03:39 +0000)]
Merge "ART: Fix verifier mishandling erroneous array component types"
Andreas Gampe [Thu, 31 Jul 2014 01:59:05 +0000 (18:59 -0700)]
ART: Fix verifier mishandling erroneous array component types
The verifier must not assume that component types are not erroneous.
Bug:
16661259
Change-Id: I23b2f517259ca9c0b8a1aa38f6348fcd61e0b22e
Mathieu Chartier [Thu, 31 Jul 2014 00:15:37 +0000 (00:15 +0000)]
Merge "Add support for bump pointer spaces to DdmSendHeapSegments."
Mathieu Chartier [Wed, 30 Jul 2014 21:59:56 +0000 (14:59 -0700)]
Add support for bump pointer spaces to DdmSendHeapSegments.
Added support for bump pointer spaces as well as
differentiating between DlMallocSpaces and RosAllocSpaces.
Added logic to reset the start of next chunk to prevent
inbetween space regions counted as free.
Fixed a debug build bug where we were doing an mprotect after
creating a rosalloc space. In debug builds, this writes a magic
value in the page. This was faulting since it was set to PROT_NONE.
The fix moves the mprotect before the RosAlloc space creation.
Bug:
16408851
Change-Id: Ibe18198d05ff353fbb57d10b2f7719fdcbf1c5f0
Alex Light [Wed, 30 Jul 2014 16:41:21 +0000 (09:41 -0700)]
Add --always-clean flag to run-test.
This flag makes run-test remove the test-artifacts even if it fails. Also
enable this option by default when doing run-tests with make. Add
a ART_TEST_RUN_TEST_ALWAYS_CLEAN environment variable to control this
option.
Change-Id: I7867b400d570d8d679d9822d1fa65f49eb3522ae
Serban Constantinescu [Tue, 15 Jul 2014 16:44:21 +0000 (17:44 +0100)]
Revert "Revert "Enable Load Store Elimination for ARM and ARM64""
This patch refactors the implementation of the LoadStoreElimination
optimisation pass. Please note that this pass was disabled and not
functional for any of the backends.
The current implementation tracks aliases and handles DalvikRegs as well
as Heap memory regions. It has been tested and it is known to optimise
out the following:
* Load - Load
* Store - Load
* Store - Store
* Load Literals
Change-Id: I3aadb12a787164146a95bc314e85fa73ad91e12b
Andreas Gampe [Tue, 29 Jul 2014 23:07:05 +0000 (23:07 +0000)]
Merge "ART: Check for duplicate class definitions in dex file verifier"
Andreas Gampe [Tue, 29 Jul 2014 08:22:07 +0000 (01:22 -0700)]
ART: Check for duplicate class definitions in dex file verifier
Reject dex files that try to define two classes with the same type id.
Bug:
16016492
Change-Id: I82cc99c00b3e3cb2b3d537ec14beed9049fe900f
Jeff Hao [Tue, 29 Jul 2014 22:06:32 +0000 (22:06 +0000)]
Merge "Stop thread from reattaching during runtime shutdown while tracing."
Jeff Hao [Tue, 29 Jul 2014 01:35:38 +0000 (18:35 -0700)]
Stop thread from reattaching during runtime shutdown while tracing.
Bug:
16024763
Change-Id: Iad5ba180241ff74b15baf5c3a15ed2d2ed60fcf0
Hiroshi Yamauchi [Tue, 29 Jul 2014 22:00:56 +0000 (22:00 +0000)]
Merge "Add GcRoot to clean up and enforce read barriers."
Hiroshi Yamauchi [Wed, 23 Jul 2014 01:08:23 +0000 (18:08 -0700)]
Add GcRoot to clean up and enforce read barriers.
Introduce a value-type wrapper around Object* for GC roots so that 1)
we won't have to directly add the read barrier code in many places and
2) we can avoid accidentally bypassing/missing read barriers on GC
roots (the GcRoot interface ensures that the read barrier is executed
on a read).
The jdwp test passed.
Bug:
12687968
Change-Id: Ib167c7c325b3c7e3900133578815f04d219972a1
Andreas Gampe [Wed, 30 Jul 2014 15:25:03 +0000 (15:25 +0000)]
Merge "ART: Remove bogus dcheck"
Andreas Gampe [Wed, 30 Jul 2014 06:03:55 +0000 (23:03 -0700)]
ART: Remove bogus dcheck
Mea culpa.
Change-Id: I6fd3b678e30354c5ab5ec6da5b3619c26d486563
Andreas Gampe [Mon, 28 Jul 2014 16:41:14 +0000 (16:41 +0000)]
Merge "ART: Rework quick entrypoint code in Mir2Lir, cleanup"
Andreas Gampe [Mon, 28 Jul 2014 02:44:50 +0000 (19:44 -0700)]
ART: Rework quick entrypoint code in Mir2Lir, cleanup
To reduce the complexity of calling trampolines in generic code,
introduce an enumeration for entrypoints. Introduce a header that lists
the entrypoint enum and exposes a templatized method that translates an
enum value to the corresponding thread offset value.
Call helpers are rewritten to have an enum parameter instead of the
thread offset. Also rewrite LoadHelper and GenConversionCall this way.
It is now LoadHelper's duty to select the right thread offset size.
Introduce InvokeTrampoline virtual method to Mir2Lir. This allows to
further simplify the call helpers, as well as make OpThreadMem specific
to X86 only (removed from Mir2Lir).
Make GenInlinedCharAt virtual, move a copy to X86 backend, and simplify
both copies. Remove LoadBaseIndexedDisp and OpRegMem from Mir2Lir, as they
are now specific to X86 only.
Remove StoreBaseIndexedDisp from Mir2Lir, as it was only ever used in the
X86 backend.
Remove OpTlsCmp from Mir2Lir, as it was only ever used in the X86 backend.
Remove OpLea from Mir2Lir, as it was only ever defined in the X86 backend.
Remove GenImmedCheck from Mir2Lir as it was neither used nor implemented.
Change-Id: If0a6182288c5d57653e3979bf547840a4c47626e
Andreas Gampe [Sun, 27 Jul 2014 21:56:42 +0000 (21:56 +0000)]
Merge "ART: Fix target test paths"
Andreas Gampe [Sat, 12 Jul 2014 04:14:35 +0000 (21:14 -0700)]
ART: Fix target test paths
Nativetest is now nativetest64 on 64b targets.
Change-Id: I4c4c6bba1a56525df2993708caaae3e6f7f5f2f6
Ian Rogers [Sun, 27 Jul 2014 18:32:40 +0000 (18:32 +0000)]
Merge "Remove the per-project FDO support. Use the common FDO support from build/core. LOCAL_FDO_SUPPORT indicates if the module should enable FDO builds."
Dehao Chen [Thu, 24 Jul 2014 23:12:59 +0000 (16:12 -0700)]
Remove the per-project FDO support. Use the common FDO support from build/core.
LOCAL_FDO_SUPPORT indicates if the module should enable FDO builds.
Change-Id: I1eab8bf418b7ceb060eea18bdd304a06597af3d3
Bill Buzbee [Sun, 27 Jul 2014 17:49:57 +0000 (17:49 +0000)]
Merge "Revert "Enable Load Store Elimination for ARM and ARM64""
Bill Buzbee [Sun, 27 Jul 2014 17:49:42 +0000 (17:49 +0000)]
Revert "Enable Load Store Elimination for ARM and ARM64"
On extended testing, I'm seeing a CHECK failure at utility_arm.cc:1201.
This reverts commit
fcc36ba2a2b8fd10e6eebd21ecb6329606443ded.
Change-Id: Icae3d49cd7c8fcab09f2f989cbcb1d7e5c6d137a
Serban Constantinescu [Tue, 15 Jul 2014 16:44:21 +0000 (17:44 +0100)]
Enable Load Store Elimination for ARM and ARM64
This patch refactors the implementation of the LoadStoreElimination
optimisation pass. Please note that this pass was disabled and not
functional for any of the backends.
The current implementation tracks aliases and handles DalvikRegs as well
as Heap memory regions. It has been tested and it is known to optimise
out the following:
* Load - Load
* Store - Load
* Store - Store
* Load Literals
Change-Id: Iefae9b696f87f833ef35c451ed4d49c5a1b6fde0
Bill Buzbee [Sun, 27 Jul 2014 02:46:58 +0000 (02:46 +0000)]
Merge "SetConstantWide should mark both SSA regs as constant"
Bill Buzbee [Sun, 27 Jul 2014 17:30:43 +0000 (17:30 +0000)]
Merge "Enable Load Store Elimination for ARM and ARM64"
Bill Buzbee [Sun, 27 Jul 2014 02:46:40 +0000 (02:46 +0000)]
Merge "ART: ReEnable check for a gap between method's arg "in" vregs and rest of its vregs"