OSDN Git Service
Mikhail Maltsev [Tue, 11 Jun 2019 12:04:32 +0000 (12:04 +0000)]
[ARM] First MVE instructions: scalar shifts.
This introduces a new decoding table for MVE instructions, and starts
by adding the family of scalar shift instructions that are part of the
MVE architecture extension: saturating shifts within a single GPR, and
long shifts across a pair of GPRs (both saturating and normal).
Some of these shift instructions have only 3-bit register fields in
the encoding, with the low bit fixed. So they can only address an odd
or even numbered GPR (depending on the operand), and therefore I add
two new register classes, GPREven and GPROdd.
Differential Revision: https://reviews.llvm.org/D62668
Change-Id: Iad95d5f83d26aef70c674027a184a6b1e0098d33
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363051
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Weber [Tue, 11 Jun 2019 11:26:50 +0000 (11:26 +0000)]
Let writeWindowsResourceCOFF() take a TimeStamp parameter
For lld, pass in Config->Timestamp (which is set based on lld's
/timestamp: and /Brepro flags). Since the writeWindowsResourceCOFF()
data is only used in-memory by LLD and the obj's timestamp isn't used
for anything in the output, this doesn't change behavior.
For llvm-cvtres, add an optional /timestamp: parameter, and use the
current behavior of calling time() if the parameter is not passed in.
This doesn't really change observable behavior (unless someone passes
/timestamp: to llvm-cvtres, which wasn't possible before), but it
removes the last unqualified call to time() from llvm/lib, which seems
like a good thing.
Differential Revision: https://reviews.llvm.org/D63116
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363050
91177308-0d34-0410-b5e6-
96231b3b80d8
David Bolvansky [Tue, 11 Jun 2019 11:09:25 +0000 (11:09 +0000)]
[NFC] Fixed arm/aarch64 test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363049
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 11 Jun 2019 11:00:23 +0000 (11:00 +0000)]
[TargetLowering] Add allowsMemoryAccess(MachineMemOperand) helper wrapper. NFCI.
As suggested by @arsenm on D63075 - this adds a TargetLowering::allowsMemoryAccess wrapper that takes a Load/Store node's MachineMemOperand to handle the AddressSpace/Alignment arguments and will also implicitly handle the MachineMemOperand::Flags change in D63075.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363048
91177308-0d34-0410-b5e6-
96231b3b80d8
Orlando Cazalet-Hyams [Tue, 11 Jun 2019 10:37:20 +0000 (10:37 +0000)]
[DebugInfo@O2][LoopVectorize] pr39024: Vectorized code linenos step through loop even after completion
Summary:
Bug: https://bugs.llvm.org/show_bug.cgi?id=39024
The bug reports that a vectorized loop is stepped through 4 times and each step through the loop seemed to show a different path. I found two problems here:
A) An incorrect line number on a preheader block (for.body.preheader) instruction causes a step into the loop before it begins.
B) Instructions in the middle block have different line numbers which give the impression of another iteration.
In this patch I give all of the middle block instructions the line number of the scalar loop latch terminator branch. This seems to provide the smoothest debugging experience because the vectorized loops will always end on this line before dropping into the scalar loop. To solve problem A I have altered llvm::SplitBlockPredecessors to accommodate loop header blocks.
I have set up a separate review D61933 for a fix which is required for this patch.
Reviewers: samsonov, vsk, aprantl, probinson, anemet, hfinkel, jmorse
Reviewed By: hfinkel, jmorse
Subscribers: jmorse, javed.absar, eraman, kcc, bjope, jmellorcrummey, hfinkel, gbedwell, hiraditya, zzheng, llvm-commits
Tags: #llvm, #debug-info
Differential Revision: https://reviews.llvm.org/D60831
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363046
91177308-0d34-0410-b5e6-
96231b3b80d8
George Rimar [Tue, 11 Jun 2019 10:28:15 +0000 (10:28 +0000)]
[llvm-readobj] - Do not use precompiled binary in elf-broken-dynsym-link.test
Now we can remove the "TODO" since https://bugs.llvm.org/show_bug.cgi?id=42216
was fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363045
91177308-0d34-0410-b5e6-
96231b3b80d8
James Henderson [Tue, 11 Jun 2019 10:20:07 +0000 (10:20 +0000)]
[llvm-dwarfdump] Add -o to help text and remove --out-file from doc
-o is in the documentation, but not in the llvm-dwarfdump help text.
This patch adds it by inverting the -o and --out-file aliasing. It also
removes --out-file from the documentation, since we don't really want
people to be using this switch in practice.
Reviewed by: aprantl, JDevlieghere, dblaikie
Differential Revision: https://reviews.llvm.org/D63013
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363044
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Tatham [Tue, 11 Jun 2019 10:09:12 +0000 (10:09 +0000)]
[ARM] Fix unused-variable warning in rL363039.
The variable `OffsetMask` is currently only used in an assertion, so
if assertions are compiled out and -Werror is enabled, it becomes a
build failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363043
91177308-0d34-0410-b5e6-
96231b3b80d8
George Rimar [Tue, 11 Jun 2019 10:00:51 +0000 (10:00 +0000)]
[yaml2elf] - Check we are able to set custom sh_link for .symtab/.dynsym
Allow using both custom numeric and string values for Link field of the
dynamic and regular symbol tables.
Differential revision: https://reviews.llvm.org/D63077
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363042
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 11 Jun 2019 09:44:33 +0000 (09:44 +0000)]
[DAGCombine] GetNegatedExpression - constant float vector support (PR42105)
Add support for negation of constant build vectors.
Differential Revision: https://reviews.llvm.org/D62963
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363040
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Tatham [Tue, 11 Jun 2019 09:29:18 +0000 (09:29 +0000)]
[ARM] Add the non-MVE instructions in Arm v8.1-M.
This adds support for the new family of conditional selection /
increment / negation instructions; the low-overhead branch
instructions (e.g. BF, WLS, DLS); the CLRM instruction to zero a whole
list of registers at once; the new VMRS/VMSR and VLDR/VSTR
instructions to get data in and out of 8.1-M system registers,
particularly including the new VPR register used by MVE vector
predication.
To support this, we also add a register name 'zr' (used by the CSEL
family to force one of the inputs to the constant 0), and operand
types for lists of registers that are also allowed to include APSR or
VPR (used by CLRM). The VLDR/VSTR instructions also need a new
addressing mode.
The low-overhead branch instructions exist in their own separate
architecture extension, which we treat as enabled by default, but you
can say -mattr=-lob or equivalent to turn it off.
Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover
Reviewed By: samparker
Subscribers: miyuki, javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62667
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363039
91177308-0d34-0410-b5e6-
96231b3b80d8
Sander de Smalen [Tue, 11 Jun 2019 08:22:10 +0000 (08:22 +0000)]
Change semantics of fadd/fmul vector reductions.
This patch changes how LLVM handles the accumulator/start value
in the reduction, by never ignoring it regardless of the presence of
fast-math flags on callsites. This change introduces the following
new intrinsics to replace the existing ones:
llvm.experimental.vector.reduce.fadd -> llvm.experimental.vector.reduce.v2.fadd
llvm.experimental.vector.reduce.fmul -> llvm.experimental.vector.reduce.v2.fmul
and adds functionality to auto-upgrade existing LLVM IR and bitcode.
Reviewers: RKSimon, greened, dmgreen, nikic, simoll, aemerson
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D60261
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363035
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 11 Jun 2019 04:30:53 +0000 (04:30 +0000)]
[X86] Add load folding isel patterns to scalar_math_patterns and AVX512_scalar_math_fp_patterns.
Also add a FIXME for the peephole pass not being able to handle this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363032
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Tue, 11 Jun 2019 03:21:13 +0000 (03:21 +0000)]
Revert CMake: Make most target symbols hidden by default
This reverts r362990 (git commit
374571301dc8e9bc9fdd1d70f86015de198673bd)
This was causing linker warnings on Darwin:
ld: warning: direct access in function 'llvm::initializeEvexToVexInstPassPass(llvm::PassRegistry&)'
from file '../../lib/libLLVMX86CodeGen.a(X86EvexToVex.cpp.o)' to global weak symbol
'void std::__1::__call_once_proxy<std::__1::tuple<void* (&)(llvm::PassRegistry&),
std::__1::reference_wrapper<llvm::PassRegistry>&&> >(void*)' from file '../../lib/libLLVMCore.a(Verifier.cpp.o)'
means the weak symbol cannot be overridden at runtime. This was likely caused by different translation
units being compiled with different visibility settings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363028
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Tue, 11 Jun 2019 02:32:27 +0000 (02:32 +0000)]
Symbolize: Make DWPName a symbolizer option instead of an argument to symbolize{,Inlined}Code.
This makes the interface simpler and more consistent with the interface for
.dSYM files and fixes a bug where llvm-symbolizer would not read the dwp if
it was asked to symbolize data before symbolizing code.
Differential Revision: https://reviews.llvm.org/D63114
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363025
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Tue, 11 Jun 2019 02:31:54 +0000 (02:31 +0000)]
Symbolize: Replace the Options constructor with in-class initialization. NFCI.
This is not only less code but also clearer at the use site.
Differential Revision: https://reviews.llvm.org/D63113
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363024
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 11 Jun 2019 01:35:07 +0000 (01:35 +0000)]
AtomicExpand: Don't crash on non-0 alloca
This now produces garbage on AMDGPU with a call to an nonexistent,
anonymous libcall but won't assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363022
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 11 Jun 2019 01:35:00 +0000 (01:35 +0000)]
AMDGPU: Expand < 32-bit atomics
Also fix AtomicExpand asserting on atomicrmw fadd/fsub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363021
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Weber [Tue, 11 Jun 2019 01:29:11 +0000 (01:29 +0000)]
gn build: Merge r362939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363020
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Weber [Tue, 11 Jun 2019 01:23:38 +0000 (01:23 +0000)]
gn build: Merge r362972
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363019
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Weber [Tue, 11 Jun 2019 01:13:41 +0000 (01:13 +0000)]
llvm-lib: Implement /machine: argument
And share some code with lld-link.
While here, also add a FIXME about PR42180 and merge r360150 to llvm-lib.
Differential Revision: https://reviews.llvm.org/D63021
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363016
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Tue, 11 Jun 2019 00:25:57 +0000 (00:25 +0000)]
Setup testing target dependencies for default runtimes
Summary: The default runtimes targets aren't getting their dependencies configured correctly which results in check-runtimes failing when built from a clean build.
Reviewers: phosek, compnerd
Reviewed By: phosek
Subscribers: mgorny, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63107
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363015
91177308-0d34-0410-b5e6-
96231b3b80d8
Yi Kong [Tue, 11 Jun 2019 00:05:36 +0000 (00:05 +0000)]
[AArch64] Add more CPUs to host detection
Returns "cortex-a73" for 3rd and 4th gen Kryo; not precisely correct,
but close enough.
Differential Revision: https://reviews.llvm.org/D63099
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363013
91177308-0d34-0410-b5e6-
96231b3b80d8
Puyan Lotfi [Tue, 11 Jun 2019 00:00:25 +0000 (00:00 +0000)]
[MIR-Canon] Fixing non-determinism that was breaking bots (NFC).
An earlier fix of a subtle iterator invalidation bug had uncovered a
nondeterminism that was present in the MultiUsers bag. Problem was that
MultiUsers was being looked up using pointers.
This patch is an NFC change that numbers each multiuser and processes each in
numbered order. This fixes the test failure on netbsd and will likely fix the
green-dragon bot too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363012
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Mon, 10 Jun 2019 23:52:38 +0000 (23:52 +0000)]
Break a couple more false dependencies on target libraries
Summary: Repeat r361567 for a few more tools.
Reviewers: bogner
Reviewed By: bogner
Subscribers: mgorny, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62438
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363011
91177308-0d34-0410-b5e6-
96231b3b80d8
Jonas Devlieghere [Mon, 10 Jun 2019 23:30:20 +0000 (23:30 +0000)]
[dsymutil] Remove stale comment (NFC)
The comment was no longer relevant after r362621.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363008
91177308-0d34-0410-b5e6-
96231b3b80d8
Shoaib Meenai [Mon, 10 Jun 2019 23:24:02 +0000 (23:24 +0000)]
[Support] Explicitly detect recursive response files
Previous detection relied upon an arbitrary hard coded limit of 21
response files, which some code bases were running up against.
The new detection maintains a stack of processing response files and
explicitly checks if a newly encountered file is in the current stack.
Some bookkeeping data is necessary in order to detect when to pop the
stack.
Patch by Chris Glover.
Differential Revision: https://reviews.llvm.org/D62798
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363005
91177308-0d34-0410-b5e6-
96231b3b80d8
Rong Xu [Mon, 10 Jun 2019 23:20:04 +0000 (23:20 +0000)]
[PGO] Fix the buildbot failure in r362995
Fixed one unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363004
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Mon, 10 Jun 2019 23:17:10 +0000 (23:17 +0000)]
[Tests] Adjust LFTR dead-iv tests to bypass undef cases
As pointed out by Nikita in review, undef and poison need to be handled separately. Since we're no longer expecting any test improvements - just fixes for miscompiles - update the tests to bypass the existing undef check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363002
91177308-0d34-0410-b5e6-
96231b3b80d8
Cameron McInally [Mon, 10 Jun 2019 23:02:36 +0000 (23:02 +0000)]
[NFC][CodeGen] Forgot 2 unary FNeg tests in X86/fma-intrinsics-canonical.ll
Follow-up to r362999.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363001
91177308-0d34-0410-b5e6-
96231b3b80d8
Cameron McInally [Mon, 10 Jun 2019 22:45:54 +0000 (22:45 +0000)]
[NFC][CodeGen] Add unary FNeg tests to X86/fma-intrinsics-canonical.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362999
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Mon, 10 Jun 2019 22:40:32 +0000 (22:40 +0000)]
Fix typo from r362990 to fix Windows builds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362997
91177308-0d34-0410-b5e6-
96231b3b80d8
Rong Xu [Mon, 10 Jun 2019 22:36:27 +0000 (22:36 +0000)]
[PGO] Handle cases of non-instrument BBs
As shown in PR41279, some basic blocks (such as catchswitch) cannot be
instrumented. This patch filters out these BBs in PGO instrumentation.
It also sets the profile count to the fail-to-instrument edge, so that we
can propagate the counts in the CFG.
Differential Revision: https://reviews.llvm.org/D62700
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362995
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Mon, 10 Jun 2019 22:33:20 +0000 (22:33 +0000)]
[Tests] Split an LFTR dead-iv case
There are two interesting sub-cases here. 1) Switching IVs is legal, but only in pre-increment form. and 2) Switching IVs is legal, and so is post-increment form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362993
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Mon, 10 Jun 2019 22:12:56 +0000 (22:12 +0000)]
CMake: Make most target symbols hidden by default
Summary:
For builds with LLVM_BUILD_LLVM_DYLIB=ON and BUILD_SHARED_LIBS=OFF
this change makes all symbols in the target specific libraries hidden
by default.
A new macro called LLVM_EXTERNAL_VISIBILITY has been added to mark symbols in these
libraries public, which is mainly needed for the definitions of the
LLVMInitialize* functions.
This patch reduces the number of public symbols in libLLVM.so by about
25%. This should improve load times for the dynamic library and also
make abi checker tools, like abidiff require less memory when analyzing
libLLVM.so
One side-effect of this change is that for builds with
LLVM_BUILD_LLVM_DYLIB=ON and LLVM_LINK_LLVM_DYLIB=ON some unittests that
access symbols that are no longer public will need to be statically linked.
Before and after public symbol counts (using gcc 8.2.1, ld.bfd 2.31.1):
nm before/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l
36221
nm after/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l
26278
Reviewers: chandlerc, beanz, mgorny, rnk, hans
Reviewed By: rnk, hans
Subscribers: Jim, hiraditya, michaelplatings, chapuni, jholewinski, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, javed.absar, sbc100, jgravelle-google, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, mgrang, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, kristina, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D54439
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362990
91177308-0d34-0410-b5e6-
96231b3b80d8
Jessica Paquette [Mon, 10 Jun 2019 21:53:56 +0000 (21:53 +0000)]
[GlobalISel] Translate memset/memmove/memcpy from undef ptrs into nops
If the source is undef, then just don't do anything.
This matches SelectionDAG's behaviour in SelectionDAG.cpp.
Also add a test showing that we do the right thing here.
(irtranslator-memfunc-undef.ll)
Differential Revision: https://reviews.llvm.org/D63095
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362989
91177308-0d34-0410-b5e6-
96231b3b80d8
Cameron McInally [Mon, 10 Jun 2019 21:31:59 +0000 (21:31 +0000)]
[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362987
91177308-0d34-0410-b5e6-
96231b3b80d8
Erik Pilkington [Mon, 10 Jun 2019 21:02:39 +0000 (21:02 +0000)]
[demangle] Vendor extended types shouldn't be considered substitution candidates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362983
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Mon, 10 Jun 2019 20:41:27 +0000 (20:41 +0000)]
Factor out a helper function for readability and reuse in a future patch [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362980
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Davis [Mon, 10 Jun 2019 20:38:56 +0000 (20:38 +0000)]
[Docs] [llvm-mca] Point out a caveat for using llvm-mca markers in source code.
Summary: See: https://bugs.llvm.org/show_bug.cgi?id=42173
Reviewers: andreadb, mattd, RKSimon, spatel
Reviewed By: andreadb
Subscribers: tschuett, gbedwell, llvm-commits, andreadb
Tags: #llvm
Patch by Max Marrone (maxpm)! Thanks!
Differential Revision: https://reviews.llvm.org/D63040
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362979
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Mon, 10 Jun 2019 19:45:59 +0000 (19:45 +0000)]
[Tests] Add tests for D62939 (miscompiles around dead pointer IVs)
Flesh out a collection of tests for switching to a dead IV within LFTR, both for the current miscompile, and for some cases which we should be able to handle via simple reasoning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362976
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Mon, 10 Jun 2019 19:18:53 +0000 (19:18 +0000)]
[LFTR] Use recomputed BE count
This was discussed as part of D62880. The basic thought is that computing BE taken count after widening should produce (on average) an equally good backedge taken count as the one before widening. Since there's only one test in the suite which is impacted by this change, and it's essentially equivelent codegen, that seems to be a reasonable assertion. This change was separated from r362971 so that if this turns out to be problematic, the triggering piece is obvious and easily revertable.
For the nestedIV example from elim-extend.ll, we end up with the following BE counts:
BEFORE: (-2 + (-1 * %innercount) + %limit)
AFTER: (-1 + (sext i32 (-1 + %limit) to i64) + (-1 * (sext i32 %innercount to i64))<nsw>)
Note that before is an i32 type, and the after is an i64. Truncating the i64 produces the i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362975
91177308-0d34-0410-b5e6-
96231b3b80d8
Jinsong Ji [Mon, 10 Jun 2019 19:04:14 +0000 (19:04 +0000)]
[PowerPC][HTM]Fix $zero is not a GPRC register for builtin_ttest
This was found during HTM cleanup.
Adding a test for builtin_ttest would expose following issue.
*** Bad machine code: Illegal physical register for instruction ***
- function: test10
- basic block: %bb.0 entry (0xf0e57497b58)
- instruction: %5:crrc0 = TABORTWCI 0, $zero, 0
- operand 2: $zero
$zero is not a GPRC register.
LLVM ERROR: Found 1 machine code errors.
Differential Revision: https://reviews.llvm.org/D63079
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362974
91177308-0d34-0410-b5e6-
96231b3b80d8
Jordan Rupprecht [Mon, 10 Jun 2019 18:35:01 +0000 (18:35 +0000)]
[llvm-objcopy] Fix SHT_GROUP ordering.
Summary:
When llvm-objcopy sorts sections during finalization, it only sorts based on the offset, which can cause the group section to come after the sections it contains. This causes link failures when using gold to link objects created by llvm-objcopy.
Fix this for now by copying GNU objcopy's behavior of placing SHT_GROUP sections first. In the future, we may want to remove this sorting entirely to more closely preserve the input file layout.
This fixes https://bugs.llvm.org/show_bug.cgi?id=42052.
Reviewers: jakehehrlich, jhenderson, MaskRay, espindola, alexshap
Reviewed By: MaskRay
Subscribers: phuongtrang148993, emaste, arichardson, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62620
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362973
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 10 Jun 2019 18:19:05 +0000 (18:19 +0000)]
[Analysis] add unit test file for VectorUtils; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362972
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Mon, 10 Jun 2019 17:51:13 +0000 (17:51 +0000)]
Prepare for multi-exit LFTR [NFC]
This change does the plumbing to wire an ExitingBB parameter through the LFTR implementation, and reorganizes the code to work in terms of a set of individual loop exits. Most of it is fairly obvious, but there's one key complexity which makes it worthy of consideration. The actual multi-exit LFTR patch is in D62625 for context.
Specifically, it turns out the existing code uses the backedge taken count from before a IV is widened. Oddly, we can end up with a different (more expensive, but semantically equivelent) BE count for the loop when requerying after widening. For the nestedIV example from elim-extend, we end up with the following BE counts:
BEFORE: (-2 + (-1 * %innercount) + %limit)
AFTER: (-1 + (sext i32 (-1 + %limit) to i64) + (-1 * (sext i32 %innercount to i64))<nsw>)
This is the only test in tree which seems sensitive to this difference. The actual result of using the wider BETC on this example is that we actually produce slightly better code. :)
In review, we decided to accept that test change. This patch is structured to preserve the old behavior, but a separate change will immediate follow with the behavior change. (I wanted it separate for problem attribution purposes.)
Differential Revision: https://reviews.llvm.org/D62880
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362971
91177308-0d34-0410-b5e6-
96231b3b80d8
Wolfgang Pieb [Mon, 10 Jun 2019 17:50:24 +0000 (17:50 +0000)]
[ELF][llvm-objdump] Treat dynamic tag values as virtual addresses instead of offsets
The ELF gABI requires the tag values of DT_REL, DT_RELA and DT_JMPREL to be
treated as virtual addresses. They were treated as offsets. Fixes PR41832.
Differential Revision: https://reviews.llvm.org/D62972
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362969
91177308-0d34-0410-b5e6-
96231b3b80d8
Sameer AbuAsal [Mon, 10 Jun 2019 17:15:45 +0000 (17:15 +0000)]
[RISCV] Replace map with set in getReqFeatures
Summary:
Use a set in getReqFeatures() in RISCVCompressInstEmitter instead of a map
because the index we save is not needed.
This also fixes bug 41666.
Reviewers: llvm-commits, apazos, asb, nickdesaulniers
Reviewed By: asb
Subscribers: Jim, nickdesaulniers, rbar, johnrusso, simoncook, niosHD, kito-cheng, shiva0217, jrtc27, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D61412
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362968
91177308-0d34-0410-b5e6-
96231b3b80d8
Jordan Rupprecht [Mon, 10 Jun 2019 17:00:49 +0000 (17:00 +0000)]
[docs] Add 'git llvm revert' to getting started guide
Summary: This documents `git llvm revert rNNNNNN` in the getting started guide for broader visibility.
Reviewers: jyknight, mehdi_amini
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63023
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362966
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrea Di Biagio [Mon, 10 Jun 2019 16:56:25 +0000 (16:56 +0000)]
[llvm-mca] Enable bottleneck analysis when flag -all-views is specified.
Bottleneck Analysis is one of the many views available in llvm-mca. Therefore,
it should be enabled when flag -all-views is passed in input to the tool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362964
91177308-0d34-0410-b5e6-
96231b3b80d8
Francis Visoiu Mistrih [Mon, 10 Jun 2019 16:53:37 +0000 (16:53 +0000)]
[FastISel] Skip creating unnecessary vregs for arguments
This behavior was added in r130928 for both FastISel and SD, and then
disabled in r131156 for FastISel.
This re-enables it for FastISel with the corresponding fix.
This is triggered only when FastISel can't lower the arguments and falls
back to SelectionDAG for it.
FastISel contains a map of "register fixups" where at the end of the
selection phase it replaces all uses of a register with another
register that FastISel sometimes pre-assigned. Code at the end of
SelectionDAGISel::runOnMachineFunction is doing the replacement at the
very end of the function, while other pieces that come in before that
look through the MachineFunction and assume everything is done. In this
case, the real issue is that the code emitting COPY instructions for the
liveins (physreg to vreg) (EmitLiveInCopies) is checking if the vreg
assigned to the physreg is used, and if it's not, it will skip the COPY.
If a register wasn't replaced with its assigned fixup yet, the copy will
be skipped and we'll end up with uses of undefined registers.
This fix moves the replacement of registers before the emission of
copies for the live-ins.
The initial motivation for this fix is to enable tail calls for
swiftself functions, which were blocked because we couldn't prove that
the swiftself argument (which is callee-save) comes from a function
argument (live-in), because there was an extra copy (vreg to vreg).
A few tests are affected by this:
* llvm/test/CodeGen/AArch64/swifterror.ll: we used to spill x21
(callee-save) but never reload it because it's attached to the return.
We now don't even spill it anymore.
* llvm/test/CodeGen/*/swiftself.ll: we tail-call now.
* llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll: I believe this
test was not really testing the right thing, but it worked because the
same registers were re-used.
* llvm/test/CodeGen/ARM/cmpxchg-O0.ll: regalloc changes
* llvm/test/CodeGen/ARM/swifterror.ll: get rid of a copy
* llvm/test/CodeGen/Mips/*: get rid of spills and copies
* llvm/test/CodeGen/SystemZ/swift-return.ll: smaller stack
* llvm/test/CodeGen/X86/atomic-unordered.ll: smaller stack
* llvm/test/CodeGen/X86/swifterror.ll: same as AArch64
* llvm/test/DebugInfo/X86/dbg-declare-arg.ll: stack size changed
Differential Revision: https://reviews.llvm.org/D62361
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362963
91177308-0d34-0410-b5e6-
96231b3b80d8
Cameron McInally [Mon, 10 Jun 2019 16:05:25 +0000 (16:05 +0000)]
[ExecutionEngine] Fix rL362941: Add UnaryOperator visitor to the interpreter
Missed break statements. This was D62881.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362958
91177308-0d34-0410-b5e6-
96231b3b80d8
Piotr Sobczak [Mon, 10 Jun 2019 15:58:51 +0000 (15:58 +0000)]
[AMDGPU] Optimize image_[load|store]_mip
Summary:
Replace image_load_mip/image_store_mip
with image_load/image_store if lod is 0.
Reviewers: arsenm, nhaehnle
Reviewed By: arsenm
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63073
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362957
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Tatham [Mon, 10 Jun 2019 15:58:19 +0000 (15:58 +0000)]
Revert rL362953 and its followup rL362955.
These caused a build failure because I managed not to notice they
depended on a later unpushed commit in my current stack. Sorry about
that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362956
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Tatham [Mon, 10 Jun 2019 15:41:58 +0000 (15:41 +0000)]
[ARM] Add the non-MVE instructions in Arm v8.1-M.
This should have been part of r362953, but I had a finger-trouble
incident and committed the old rather than new version of the patch.
Sorry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362955
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 10 Jun 2019 15:39:00 +0000 (15:39 +0000)]
[InstCombine] allow unordered preds when canonicalizing to fabs()
We have a known-never-nan value via 'nnan', so an unordered predicate
is the same as its ordered sibling.
Similar to:
rL362937
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362954
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Tatham [Mon, 10 Jun 2019 15:36:34 +0000 (15:36 +0000)]
[ARM] Add the non-MVE instructions in Arm v8.1-M.
This adds support for the new family of conditional selection /
increment / negation instructions; the low-overhead branch
instructions (e.g. BF, WLS, DLS); the CLRM instruction to zero a whole
list of registers at once; the new VMRS/VMSR and VLDR/VSTR
instructions to get data in and out of 8.1-M system registers,
particularly including the new VPR register used by MVE vector
predication.
To support this, we also add a register name 'zr' (used by the CSEL
family to force one of the inputs to the constant 0), and operand
types for lists of registers that are also allowed to include APSR or
VPR (used by CLRM). The VLDR/VSTR instructions also need some new
addressing modes.
The low-overhead branch instructions exist in their own separate
architecture extension, which we treat as enabled by default, but you
can say -mattr=-lob or equivalent to turn it off.
Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover
Reviewed By: samparker
Subscribers: miyuki, javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62667
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362953
91177308-0d34-0410-b5e6-
96231b3b80d8
Whitney Tsang [Mon, 10 Jun 2019 15:29:07 +0000 (15:29 +0000)]
[DA] Add an option to control delinearization validity checks
Summary: Dependence Analysis performs static checks to confirm validity
of delinearization. These checks often fail for 64-bit targets due to
type conversions and integer wrapping that prevent simplification of the
SCEV expressions. These checks would also fail at compile-time if the
lower bound of the loops are compile-time unknown.
Author: bmahjour
Reviewer: Meinersbur, jdoerfert, kbarton, dmgreen, fhahn
Reviewed By: Meinersbur, jdoerfert, dmgreen
Subscribers: fhahn, hiraditya, javed.absar, llvm-commits, Whitney,
etiotto
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D62610
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362952
91177308-0d34-0410-b5e6-
96231b3b80d8
Jeremy Morse [Mon, 10 Jun 2019 15:23:46 +0000 (15:23 +0000)]
[DebugInfo] Terminate all location-lists at end of block
This commit reapplies r359426 (which was reverted in r360301 due to
performance problems) and rolls in D61940 to address the performance problem.
I've combined the two to avoid creating a span of slow-performance, and to
ease reverting if more problems crop up.
The summary of D61940: This patch removes the "ChangingRegs" facility in
DbgEntityHistoryCalculator, as its overapproximate nature can produce incorrect
variable locations. An unchanging register doesn't mean a variable doesn't
change its location.
The patch kills off everything that calculates the ChangingRegs vector.
Previously ChangingRegs spotted epilogues and marked registers as unchanging if
they weren't modified outside the epilogue, increasing the chance that we can
emit a single-location variable record. Without this feature,
debug-loc-offset.mir and pr19307.mir become temporarily XFAIL. They'll be
re-enabled by D62314, using the FrameDestroy flag to identify epilogues, I've
split this into two steps as FrameDestroy isn't necessarily supported by all
backends.
The logic for terminating variable locations at the end of a basic block now
becomes much more enjoyably simple: we just terminate them all.
Other test changes: inlined-argument.ll becomes XFAIL, but for a longer term.
The current algorithm for detecting that a variable has a single-location
doesn't work in this scenario (inlined function in multiple blocks), only other
bugs were making this test work. fission-ranges.ll gets slightly refreshed too,
as the location of "p" is now correctly determined to be a single location.
Differential Revision: https://reviews.llvm.org/D61940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362951
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 10 Jun 2019 15:08:22 +0000 (15:08 +0000)]
[InstCombine] add tests for fabs() with unordered preds; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362949
91177308-0d34-0410-b5e6-
96231b3b80d8
Cameron McInally [Mon, 10 Jun 2019 15:07:29 +0000 (15:07 +0000)]
[IRBuilder] Add CreateFNegFMF(...) to the IRBuilder
Differential Revision: https://reviews.llvm.org/D62521
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362947
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 10 Jun 2019 14:57:45 +0000 (14:57 +0000)]
[InstCombine] fix bug in canonicalization to fabs()
Forgot to translate the predicate clauses in rL362943.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362945
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 10 Jun 2019 14:46:36 +0000 (14:46 +0000)]
[InstCombine] change canonicalization to fabs() to use FMF on fsub
Similar to rL362909:
This isn't the ideal fix (use FMF on the select), but it's still an
improvement until we have better FMF propagation to selects and other
FP math operators.
I don't think there's much risk of regression from this change by
not including the FMF on the fcmp any more. The nsz/nnan FMF
should be the same on the fcmp and the fsub because they have the
same operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362943
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Tatham [Mon, 10 Jun 2019 14:43:55 +0000 (14:43 +0000)]
[ARM] Disallow PC, and optionally SP, in VMOVRH and VMOVHR.
Arm v8.1-M supports the VMOV instructions that move a half-precision
value to and from a GPR, but not if the GPR is SP or PC.
To fix this, I've changed those instructions to use the rGPR register
class instead of GPR. rGPR always excludes PC, and it excludes SP
except in the presence of the HasV8Ops target feature (i.e. Arm v8-A).
So the effect is that VMOV.F16 to and from PC is now illegal
everywhere, but VMOV.F16 to and from SP is illegal only on non-v8-A
cores (which I believe is all as it should be).
Reviewers: dmgreen, samparker, SjoerdMeijer, ostannard
Reviewed By: ostannard
Subscribers: ostannard, javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60704
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362942
91177308-0d34-0410-b5e6-
96231b3b80d8
Cameron McInally [Mon, 10 Jun 2019 14:38:48 +0000 (14:38 +0000)]
[ExecutionEngine] Add UnaryOperator visitor to the interpreter
This is to support the unary FNeg instruction.
Differential Revision: https://reviews.llvm.org/D62881
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362941
91177308-0d34-0410-b5e6-
96231b3b80d8
George Rimar [Mon, 10 Jun 2019 14:33:24 +0000 (14:33 +0000)]
[yaml2obj] - Remove TODOs from dynsymtab-implicit-sections-size-content.yaml. NFCI.
Now when https://bugs.llvm.org/show_bug.cgi?id=42215 is fixed,
we can remove these TODOs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362940
91177308-0d34-0410-b5e6-
96231b3b80d8
George Rimar [Mon, 10 Jun 2019 14:23:46 +0000 (14:23 +0000)]
[llvm-readobj/llvm-readelf] - Don't fail to dump the object if .dynsym has broken sh_link field.
This is https://bugs.llvm.org/show_bug.cgi?id=42215.
GNU readelf allows to dump the objects in that case,
but llvm-readobj/llvm-readelf reports an error and stops.
The patch fixes that.
Differential revision: https://reviews.llvm.org/D63074
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362938
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 10 Jun 2019 14:14:51 +0000 (14:14 +0000)]
[InstCombine] allow unordered preds when canonicalizing to fabs()
PR42179:
https://bugs.llvm.org/show_bug.cgi?id=42179
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362937
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 10 Jun 2019 14:04:10 +0000 (14:04 +0000)]
[InstCombine] add tests for fcmp unordered pred -> fabs (PR42179); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362936
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrea Di Biagio [Mon, 10 Jun 2019 13:33:54 +0000 (13:33 +0000)]
[MCA] Fix -Wunused-private-field warning after r362933. NFC
This should unbreak the buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362935
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrea Di Biagio [Mon, 10 Jun 2019 12:50:08 +0000 (12:50 +0000)]
[MCA] Further refactor the bottleneck analysis view. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362933
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Weber [Mon, 10 Jun 2019 12:49:02 +0000 (12:49 +0000)]
gn build: Merge r362913
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362932
91177308-0d34-0410-b5e6-
96231b3b80d8
George Rimar [Mon, 10 Jun 2019 12:43:18 +0000 (12:43 +0000)]
[yaml2obj/obj2yaml] - Make RawContentSection::Content and RawContentSection::Size optional
This is a follow-up for D62809.
Content and Size fields should be optional as was discussed in comments
of the D62809's thread. With that, we can describe a specific string table and
symbol table sections in a more correct way and also show appropriate errors.
The patch adds lots of test cases where the behavior is described in details.
Differential revision: https://reviews.llvm.org/D62957
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362931
91177308-0d34-0410-b5e6-
96231b3b80d8
George Rimar [Mon, 10 Jun 2019 11:38:06 +0000 (11:38 +0000)]
[yaml2obj] - Do not assert when .dynsym is specified explicitly, but .dynstr is not present.
We have a code in buildSectionIndex() that adds implicit sections:
// Add special sections after input sections, if necessary.
for (StringRef Name : implicitSectionNames())
if (SN2I.addName(Name, SecNo)) {
// Account for this section, since it wasn't in the Doc
++SecNo;
DotShStrtab.add(Name);
}
The problem arises when .dynsym is specified explicitly and no
DynamicSymbols is used. In that case, we do not add
.dynstr implicitly and will assert later when will try to set Link
for .dynsym.
Seems, in this case, reasonable behavior is to allow Link field to be zero.
This is what this patch does.
Differential revision: https://reviews.llvm.org/D63001
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362929
91177308-0d34-0410-b5e6-
96231b3b80d8
David Green [Mon, 10 Jun 2019 10:22:14 +0000 (10:22 +0000)]
[ARM] Enable Unroll UpperBound
This option allows loops with small max trip counts to be fully unrolled. This
can help with code like the remainder loops from manually unrolled loops like
those that appear in the cmsis dsp library. We would apparently previously
runtime unroll them with the default unroll count (4).
Differential Revision: https://reviews.llvm.org/D63064
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362928
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 10 Jun 2019 10:13:32 +0000 (10:13 +0000)]
Fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362927
91177308-0d34-0410-b5e6-
96231b3b80d8
George Rimar [Mon, 10 Jun 2019 09:57:29 +0000 (09:57 +0000)]
[yaml2obj] - Remove helper methods that are probably excessive. NFC.
These methods are used only once. One of them is not used at all.
Differential revision: https://reviews.llvm.org/D63002
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362925
91177308-0d34-0410-b5e6-
96231b3b80d8
Nikola Prica [Mon, 10 Jun 2019 08:41:06 +0000 (08:41 +0000)]
[DebugInfo] More strict debug range for stack variables
Variable's stack location can stretch longer than it should. If a
variable is placed at the stack in a some nested basic block its range
can be calculated to be up to the next occurrence of the variable's
DBG_VALUE, or up to the end of the function, thus covering a basic
blocks that should not be included in the variable’s location range.
This happens because the DbgEntityHistoryCalculator ends register
locations at the end of a basic block only if the variable’s location
register has been changed throughout the function, which is not the
case for the register used to reference stack objects.
This patch also tries to produce a single value location if the location
list builder managed to merge all the locations into one.
Reviewers: aprantl, dstenb, jmorse
Reviewed By: aprantl, dstenb, jmorse
Subscribers: djtodoro, ivanbaev, asowda
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D61600
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362923
91177308-0d34-0410-b5e6-
96231b3b80d8
QingShan Zhang [Mon, 10 Jun 2019 05:40:21 +0000 (05:40 +0000)]
[DAGCombine] Match a pattern where a wide type scalar value is stored by several narrow stores
This opportunity is found from spec 2017 557.xz_r. And it is used by the sha encrypt/decrypt. See sha-2/sha512.c
static void store64(u64 x, unsigned char* y)
{
for(int i = 0; i != 8; ++i)
y[i] = (x >> ((7-i) * 8)) & 255;
}
static u64 load64(const unsigned char* y)
{
u64 res = 0;
for(int i = 0; i != 8; ++i)
res |= (u64)(y[i]) << ((7-i) * 8);
return res;
}
The load64 has been implemented by https://reviews.llvm.org/D26149
This patch is trying to implement the store pattern.
Match a pattern where a wide type scalar value is stored by several narrow
stores. Fold it into a single store or a BSWAP and a store if the targets
supports it.
Assuming little endian target:
i8 *p = ...
i32 val = ...
p[0] = (val >> 0) & 0xFF;
p[1] = (val >> 8) & 0xFF;
p[2] = (val >> 16) & 0xFF;
p[3] = (val >> 24) & 0xFF;
>
*((i32)p) = val;
i8 *p = ...
i32 val = ...
p[0] = (val >> 24) & 0xFF;
p[1] = (val >> 16) & 0xFF;
p[2] = (val >> 8) & 0xFF;
p[3] = (val >> 0) & 0xFF;
>
*((i32)p) = BSWAP(val);
Differential Revision: https://reviews.llvm.org/D62897
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362921
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 10 Jun 2019 04:50:12 +0000 (04:50 +0000)]
[X86] When promoting i16 compare with immediate to i32, try to use sign_extend for eq/ne if the input is truncated from a type with enough sign its.
Summary:
Our default behavior is to use sign_extend for signed comparisons and zero_extend for everything else. But for equality we have the freedom to use either extension. If we can prove the input has been truncated from something with enough sign bits, we can use sign_extend instead and let DAG combine optimize it out. A similar rule is used by type legalization in LegalizeIntegerTypes.
This gets rid of the movzx in PR42189. The immediate will still take 4 bytes instead of the 2 bytes plus 0x66 prefix a cmp di, 32767 would get, but it avoids a length changing prefix.
Reviewers: RKSimon, spatel, xbolva00
Reviewed By: xbolva00
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63032
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362920
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 10 Jun 2019 04:37:16 +0000 (04:37 +0000)]
[X86] Disable f32->f64 extload when sse2 is enabled
Summary:
We can only use the memory form of cvtss2sd under optsize due to a partial register update. So previously we were emitting 2 instructions for extload when optimizing for speed. Also due to a late optimization in preprocessiseldag we had to handle (fpextend (loadf32)) under optsize.
This patch forces extload to expand so that it will always be in the (fpextend (loadf32)) form during isel. And when optimizing for speed we can just let each of those pieces select an instruction independently.
Reviewers: spatel, RKSimon
Reviewed By: RKSimon
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62710
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362919
91177308-0d34-0410-b5e6-
96231b3b80d8
Vivek Pandya [Mon, 10 Jun 2019 04:16:04 +0000 (04:16 +0000)]
Do not derive no-recurse attribute if function does not have exact definition.
This is fix for https://bugs.llvm.org/show_bug.cgi?id=41336
Reviewers: jdoerfert
Reviewed by: jdoerfert
Differential Revision: https://reviews.llvm.org/D63045
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362918
91177308-0d34-0410-b5e6-
96231b3b80d8
Kai Luo [Mon, 10 Jun 2019 03:20:33 +0000 (03:20 +0000)]
[NFC] Test if commit access granted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362917
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Weber [Mon, 10 Jun 2019 01:47:04 +0000 (01:47 +0000)]
Make test not write to source directory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362916
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 10 Jun 2019 01:18:55 +0000 (01:18 +0000)]
[X86] Use EVEX instructions for f128 FAND/FOR/FXOR when avx512vl is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362915
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 10 Jun 2019 00:41:07 +0000 (00:41 +0000)]
[X86] Convert f32/f64 FANDN/FAND/FOR/FXOR to vector logic ops and scalar_to_vector/extract_vector_elts to reduce isel patterns.
Previously we did the equivalent operation in isel patterns with
COPY_TO_REGCLASS operations to transition. By inserting
scalar_to_vetors and extract_vector_elts before isel we can
allow each piece to be selected individually and accomplish the
same final result.
I ideally we'd use vector operations earlier in lowering/combine,
but that looks to be more difficult.
The scalar-fp-to-i64.ll changes are because we have a pattern for
using movlpd for store+extract_vector_elt. While an f64 store
uses movsd. The encoding sizes are the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362914
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Weber [Sun, 9 Jun 2019 19:27:50 +0000 (19:27 +0000)]
Revert r361953 "[SVE][IR] Scalable Vector IR Type"
This reverts commit
f4fc01f8dd3a5dfd2060d1ad0df6b90e8351ddf7.
It caused a 3-4x slowdown when doing thinlto links, PR42210.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362913
91177308-0d34-0410-b5e6-
96231b3b80d8
David Bolvansky [Sun, 9 Jun 2019 18:18:57 +0000 (18:18 +0000)]
[TargetLowering] Simplify (ctpop x) == 1
Reviewers: craig.topper, spatel, RKSimon, bkramer
Reviewed By: spatel
Subscribers: javed.absar, lebedev.ri, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63004
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362912
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Sun, 9 Jun 2019 16:30:42 +0000 (16:30 +0000)]
[InstCombine] foldICmpWithLowBitMaskedVal(): 'icmp sgt/sle': avoid miscompiles
A precondition 'x != 0' was forgotten by me:
https://rise4fun.com/Alive/JFNP
https://rise4fun.com/Alive/jHvL
These 4 folds with non-constants could be re-enabled,
but for now let's go for the simplest solution.
https://bugs.llvm.org/show_bug.cgi?id=42198
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362911
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Sun, 9 Jun 2019 16:30:14 +0000 (16:30 +0000)]
[NFC][InstCombine] Revisit canonicalize-constant-low-bit-mask-and-icmp-s* tests in preparatio for PR42198.
The `icmp sgt`/`icmp sle` variants are, too, miscompiles:
https://rise4fun.com/Alive/JFNP
https://rise4fun.com/Alive/jHvL
A precondition 'x != 0' was forgotten by me.
While ensuring test coverage for `-1`, also add test coverage
for `0` mask. Mask `0` is allowed for all the folds,
mask `-1` is allowed for all the folds with unsigned `icmp` pred.
Constant mask `0` is missed though.
https://bugs.llvm.org/show_bug.cgi?id=42198
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362910
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sun, 9 Jun 2019 16:22:01 +0000 (16:22 +0000)]
[InstCombine] change canonicalization to fabs() to use FMF on fneg
This isn't the ideal fix (use FMF on the select), but it's still an
improvement until we have better FMF propagation to selects and other
FP math operators.
I don't think there's much risk of regression from this change by
not including the FMF on the fcmp any more. The nsz/nnan FMF
should be the same on the fcmp and the fneg (fsub) because they
have the same operand.
This works around the most glaring FMF logical inconsistency cited
in PR38086:
https://bugs.llvm.org/show_bug.cgi?id=38086
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362909
91177308-0d34-0410-b5e6-
96231b3b80d8
David Bolvansky [Sun, 9 Jun 2019 16:15:08 +0000 (16:15 +0000)]
[NFC] Adjust test for D63004
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362908
91177308-0d34-0410-b5e6-
96231b3b80d8
David Bolvansky [Sun, 9 Jun 2019 15:12:46 +0000 (15:12 +0000)]
[NFC] Added test from PR19758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362907
91177308-0d34-0410-b5e6-
96231b3b80d8
David Bolvansky [Sun, 9 Jun 2019 14:56:46 +0000 (14:56 +0000)]
[NFC] Added test from PR42084 for D63058
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362906
91177308-0d34-0410-b5e6-
96231b3b80d8
Nikita Popov [Sun, 9 Jun 2019 14:39:47 +0000 (14:39 +0000)]
[InstCombine] Add tests for usub.sat(x,y)+y etc; NFC
For PR42178.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362905
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sun, 9 Jun 2019 13:58:46 +0000 (13:58 +0000)]
[InstSimplify] reduce code duplication for fcmp folds; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362904
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sun, 9 Jun 2019 13:48:59 +0000 (13:48 +0000)]
[InstSimplify] enhance fcmp fold with never-nan operand
This is another step towards correcting our usage of fast-math-flags when applied on an fcmp.
In this case, we are checking for 'nnan' on the fcmp itself rather than the operand of
the fcmp. But I'm leaving that clause in until we're more confident that we can stop
relying on fcmp's FMF.
By using the more general "isKnownNeverNaN()", we gain a simplification shown on the
tests with 'uitofp' regardless of the FMF on the fcmp (uitofp never produces a NaN).
On the tests with 'fabs', we are now relying on the FMF for the call fabs instruction
in addition to the FMF on the fcmp.
This is a continuation of D62979 / rL362879.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362903
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sun, 9 Jun 2019 13:30:14 +0000 (13:30 +0000)]
[InstSimplify] add tests for fcmp with known-never-nan operands; NFC
Opposite predicate for rL362742 / rL362879 / D62979
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362902
91177308-0d34-0410-b5e6-
96231b3b80d8
Anton Afanasyev [Sun, 9 Jun 2019 12:15:47 +0000 (12:15 +0000)]
[MIR] Add simple PRE pass to MachineCSE
This is the second part of the commit fixing PR38917 (hoisting
partitially redundant machine instruction). Most of PRE (partitial
redundancy elimination) and CSE work is done on LLVM IR, but some of
redundancy arises during DAG legalization. Machine CSE is not enough
to deal with it. This simple PRE implementation works a little bit
intricately: it passes before CSE, looking for partitial redundancy
and transforming it to fully redundancy, anticipating that the next
CSE step will eliminate this created redundancy. If CSE doesn't
eliminate this, than created instruction will remain dead and eliminated
later by Remove Dead Machine Instructions pass.
The third part of the commit is supposed to refactor MachineCSE,
to make it more clear and to merge MachinePRE with MachineCSE,
so one need no rely on further Remove Dead pass to clear instrs
not eliminated by CSE.
First step: https://reviews.llvm.org/D54839
Fixes llvm.org/PR38917
This is fixed recommit of r361356 after PowerPC64 multistage build failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362901
91177308-0d34-0410-b5e6-
96231b3b80d8
Ayke van Laethem [Sun, 9 Jun 2019 10:20:33 +0000 (10:20 +0000)]
[CaptureTracking] Don't let comparisons against null escape inbounds pointers
Pointers that are in-bounds (either through dereferenceable_or_null or
thorough a getelementptr inbounds) cannot be captured with a comparison
against null. There is no way to construct a pointer that is still in
bounds but also NULL.
This helps safe languages that insert null checks before load/store
instructions. Without this patch, almost all pointers would be
considered captured even for simple loads. With this patch, an icmp with
null will not be seen as escaping as long as certain conditions are met.
There was a lot of discussion about this patch. See the Phabricator
thread for detals.
Differential Revision: https://reviews.llvm.org/D60047
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362900
91177308-0d34-0410-b5e6-
96231b3b80d8