OSDN Git Service

android-x86/external-llvm.git
7 years agoSilence a warning "hiding virtual function".
Vassil Vassilev [Mon, 6 Mar 2017 15:50:59 +0000 (15:50 +0000)]
Silence a warning "hiding virtual function".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297018 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] add tests to show missing div/rem simplifications; NFC
Sanjay Patel [Mon, 6 Mar 2017 15:50:07 +0000 (15:50 +0000)]
[x86] add tests to show missing div/rem simplifications; NFC

These are not x86-specific, but the problem is not visible for all targets
because it is masked by other transforms. These can lead to compiler crashes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297017 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[BasicBlockUtils] Check for nullptr before updating LoopInfo.
Michael Kruse [Mon, 6 Mar 2017 15:33:05 +0000 (15:33 +0000)]
[BasicBlockUtils] Check for nullptr before updating LoopInfo.

LoopInfo::getLoopFor returns nullptr if a BB is not in a loop and only
then can the loop be updated to contain the newly created BBs. Add the
missing nullptr check to SplitBlockAndInsertIfThen.

Within LLVM, the only user of this function that also passes a LoopInfo
to be updated is InnerLoopVectorizer::predicateInstructions().
As the method's name implies, the BB operataten on will always be within
a loop, but out-of-tree users may also use it differently (here: Polly).

All other uses of LoopInfo::getLoopFor in the file properly check its
return value for nullptr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297016 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAG] fix formatting; NFC
Sanjay Patel [Mon, 6 Mar 2017 15:27:57 +0000 (15:27 +0000)]
[DAG] fix formatting; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297015 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNew Test-Case for Region Analysis
Tobias Grosser [Mon, 6 Mar 2017 15:20:38 +0000 (15:20 +0000)]
New Test-Case for Region Analysis

While working on improvements to region info analysis, this test case caused an
incorrect region bb2 => bb3 to be detected.

Reviewers: grosser

Contributed-by: Nandini Singhal <cs15mtech01004@iith.ac.in>
Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30652

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297014 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAG] fix typo in comment; NFC
Sanjay Patel [Mon, 6 Mar 2017 15:07:43 +0000 (15:07 +0000)]
[DAG] fix typo in comment; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297011 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCMake: Add a build target for generating a source RPM
Tom Stellard [Mon, 6 Mar 2017 14:26:50 +0000 (14:26 +0000)]
CMake: Add a build target for generating a source RPM

Summary:
'make srpm' or 'ninja srpm' will tar up the current source code and then
build a source RPM package.

By default it will use the llvm.spec file to generate the source RPM,
but you can specify your own custom spec file with the
LLVM_SRPM_USER_BINARY_SPECFILE option.  CMake will perform variable
substitution on your custom specfile, so you can reference CMake
variables in it.  For example:

Version:        @LLVM_RPM_SPEC_VERSION@

Note that everything in the source directory will be included in the
tarball so if you have a clang check out in tools/clang, then all
the clang source will end up in the tarball to.  It is recommended
to only use this build target with a clean source tree.

Reviewers: beanz

Reviewed By: beanz

Subscribers: mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D30093

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297007 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Fix failure with STBRX when store is narrower than the bswap
Nemanja Ivanovic [Mon, 6 Mar 2017 07:32:13 +0000 (07:32 +0000)]
[PowerPC] Fix failure with STBRX when store is narrower than the bswap

Fixes a crash caused by r296811 by truncating the input of the STBRX node
when the bswap is wider than i32.

Fixes https://bugs.llvm.org/show_bug.cgi?id=32140

Differential Revision: https://reviews.llvm.org/D30615

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297001 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[XRay] Allow logging the first argument of a function call.
Dean Michael Berris [Mon, 6 Mar 2017 06:48:56 +0000 (06:48 +0000)]
[XRay] Allow logging the first argument of a function call.

Summary:
Functions with the "xray-log-args" attribute will have a special XRay sled kind
emitted, for compiler-rt to copy any call arguments to your logging handler.

For practical and performance reasons, only the first argument is supported, and
only up to 64 bits.

Reviewers: dberris

Reviewed By: dberris

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29702

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296998 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Move operator~ out of line to make it better able to reused memory allocation...
Craig Topper [Mon, 6 Mar 2017 06:30:47 +0000 (06:30 +0000)]
[APInt] Move operator~ out of line to make it better able to reused memory allocation from temporary objects

Summary:
This makes operator~ take the APInt by value so if it came from a temporary APInt the move constructor will get invoked and it will be able to reuse the memory allocation from the temporary.

This is similar to what was already done for 2s complement negation.

Reviewers: hans, davide, RKSimon

Reviewed By: davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30614

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296997 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Remove add and sub functions from APIntOps namespace.
Craig Topper [Mon, 6 Mar 2017 04:35:01 +0000 (04:35 +0000)]
[APInt] Remove add and sub functions from APIntOps namespace.

They aren't used in tree and using the overloaded operators has more optimization opportunities.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296995 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Remove unused And/Or/Xor methods. They just forward to the corresponding...
Craig Topper [Mon, 6 Mar 2017 00:24:53 +0000 (00:24 +0000)]
[APInt] Remove unused And/Or/Xor methods. They just forward to the corresponding operator overload.

I plan to enhance the operator overloads to handle rvalues and these methods would not longer be optimal to use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296993 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCEV] Decrease the recursion threshold for CompareValueComplexity
Sanjoy Das [Sun, 5 Mar 2017 23:49:17 +0000 (23:49 +0000)]
[SCEV] Decrease the recursion threshold for CompareValueComplexity

Fixes PR32142.

r287232 accidentally increased the recursion threshold for
CompareValueComplexity from 2 to 32.  This change reverses that change
by introducing a separate flag for CompareValueComplexity's threshold.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296992 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Remove the And/Or/Xor/Not functions from the APIntOps namespace.
Craig Topper [Sun, 5 Mar 2017 16:41:11 +0000 (16:41 +0000)]
[APInt] Remove the And/Or/Xor/Not functions from the APIntOps namespace.

Summary:
They aren't used anywhere in tree and its preferable to use the &, |, ^, or ~ operators.

With my patch to add rvalue reference support to &, |, ^ operators it also becomes less performant to use these functions.

Reviewers: RKSimon, davide, hans

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30613

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296990 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SelectionDAG] Fix vector splitting for *_EXTEND_VECTOR_INREG instructions
Simon Pilgrim [Sun, 5 Mar 2017 15:52:18 +0000 (15:52 +0000)]
[SelectionDAG] Fix vector splitting for *_EXTEND_VECTOR_INREG instructions

Found by fuzz testing after rL296985 landed

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296989 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNew Test-Case for Region Analysis
Tobias Grosser [Sun, 5 Mar 2017 14:08:28 +0000 (14:08 +0000)]
New Test-Case for Region Analysis

While working on improvements to the region info analysis, this test case caused
an incorrect region 1 => 2 to be detected.  It is incorrect because entry has an
outgoing edge to 3.  This is interesting because 1 dom 2 and 2 pdom 1, which
should have been enough to prevent incoming forward edges into the region and
outgoing forward edges from the region.

Reviewers: grosser

Subscribers: llvm-commits

Contributed-by: Nandini Singhal <cs15mtech01004@iith.ac.in>
Differential Revision: https://reviews.llvm.org/D30603

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296988 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Silence GCC enum compare warning.
Benjamin Kramer [Sun, 5 Mar 2017 12:53:20 +0000 (12:53 +0000)]
[X86] Silence GCC enum compare warning.

X86ISelLowering.cpp:26506:36: error: enumeral mismatch in conditional
expression: 'llvm::X86ISD::NodeType' vs 'llvm::ISD::NodeType'
[-Werror=enum-compare]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296986 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Lower 128-bit vectors to SIGN/ZERO_EXTEND_VECTOR_IN_REG ops
Simon Pilgrim [Sun, 5 Mar 2017 09:57:20 +0000 (09:57 +0000)]
[X86][SSE] Lower 128-bit vectors to SIGN/ZERO_EXTEND_VECTOR_IN_REG ops

As described on PR31712, we miss a variety of legalization combines because we lower these to X86ISD::VSEXT/VZEXT despite them having the same functionality. This patch makes 128-bit (SSE41) SIGN/ZERO_EXTEND_VECTOR_IN_REG ops legal, adds the necessary tablegen plumbing and uses a helper 'getExtendInVec' to decide when to use SIGN/ZERO_EXTEND_VECTOR_IN_REG or VSEXT/VZEXT.

We're missing a couple of shuffle combines that will be added in a future patch for review.

Later patches can then support the AVX2 cases as a mixture of SIGN/ZERO_EXTEND and SIGN/ZERO_EXTEND_VECTOR_IN_REG, and then finally deal with the AVX512 cases.

Differential Revision: https://reviews.llvm.org/D30549

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296985 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert commit r296967, no typo
Sylvestre Ledru [Sun, 5 Mar 2017 07:46:24 +0000 (07:46 +0000)]
Revert commit r296967, no typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296984 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SimplifyCFG] Use APInt::operator| instead of APInt::Or. NFC
Craig Topper [Sun, 5 Mar 2017 01:08:19 +0000 (01:08 +0000)]
[SimplifyCFG] Use APInt::operator| instead of APInt::Or. NFC

I'm looking to improve operator| to support rvalue references and may remove APInt::Or.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296982 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombine] Use APInt::operator|(uint64_t) instead of creating a temporary APInt...
Craig Topper [Sun, 5 Mar 2017 01:08:16 +0000 (01:08 +0000)]
[DAGCombine] Use APInt::operator|(uint64_t) instead of creating a temporary APInt and calling APInt::Or. NFC

This is more efficient by itself. But this is prep for a future patch that may remove APInt::Or while making operator| support rvalue references similar to add/sub.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296981 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] don't require a zext when forming ADC/SBB
Sanjay Patel [Sat, 4 Mar 2017 20:35:19 +0000 (20:35 +0000)]
[x86] don't require a zext when forming ADC/SBB

The larger goal is to move the ADC/SBB transforms currently in
combineX86SetCC() to combineAddOrSubToADCOrSBB() because we're
creating ADC/SBB in lots of places where we shouldn't.

This was intended to be an NFC change, but avx-512 has something
strange going on. It doesn't seem like any of the affected tests
should really be using SET+TEST or ADC; a simple ADD could replace
several instructions. But that's another bug...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296978 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] allow transforming (select Cond, C +/- 1, C) to (add(ext Cond), C)
Sanjay Patel [Sat, 4 Mar 2017 19:18:09 +0000 (19:18 +0000)]
[DAGCombiner] allow transforming (select Cond, C +/- 1, C) to (add(ext Cond), C)

select Cond, C +/- 1, C --> add(ext Cond), C -- with a target hook.

This is part of the ongoing process to obsolete D24480.  The motivation is to
canonicalize to select IR in InstCombine whenever possible, so we need to have a way to
undo that easily in codegen.

PowerPC is an obvious winner for this kind of transform because it has fast and complete
bit-twiddling abilities but generally lousy conditional execution perf (although this might
have changed in recent implementations).

x86 also sees some wins, but the effect is limited because these transforms already mostly
exist in its target-specific combineSelectOfTwoConstants(). The fact that we see any x86
changes just shows that that code is a mess of special-case holes. We may be able to remove
some of that logic now.

My guess is that other targets will want to enable this hook for most cases. The likely
follow-ups would be to add value type and/or the constants themselves as parameters for the
hook. As the tests in select_const.ll show, we can transform any select-of-constants to
math/logic, but the general transform for any 2 constants needs one more instruction
(multiply or 'and').

ARM is one target that I think may not want this for most cases. I see infinite loops there
because it wants to use selects to enable conditionally executed instructions.

Differential Revision: https://reviews.llvm.org/D30537

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296977 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTry to fix thread name truncation on non-Windows.
Zachary Turner [Sat, 4 Mar 2017 18:53:09 +0000 (18:53 +0000)]
Try to fix thread name truncation on non-Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296976 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoImprove the Threading code on NetBSD
Kamil Rytarowski [Sat, 4 Mar 2017 17:42:46 +0000 (17:42 +0000)]
Improve the Threading code on NetBSD

Do not include <sys/user.h> on NetBSD. It's dead file and will be removed.

No need to include <sys/sysctl.h> in this code context on NetBSD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296973 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTruncate thread names if they're too long.
Zachary Turner [Sat, 4 Mar 2017 16:42:25 +0000 (16:42 +0000)]
Truncate thread names if they're too long.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296972 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDebugCounter: Initialize skip to 0, not -1
Daniel Berlin [Sat, 4 Mar 2017 14:08:47 +0000 (14:08 +0000)]
DebugCounter: Initialize skip to 0, not -1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296971 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a typo. Patch by fcrick on github https://github.com/llvm-mirror/llvm/pull/23
Sylvestre Ledru [Sat, 4 Mar 2017 14:01:38 +0000 (14:01 +0000)]
Fix a typo. Patch by fcrick on github https://github.com/llvm-mirror/llvm/pull/23

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296969 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove redundant code block and update comment.
Sylvestre Ledru [Sat, 4 Mar 2017 14:00:44 +0000 (14:00 +0000)]
Remove redundant code block and update comment.
By patch zoren here: https://github.com/llvm-mirror/llvm/pull/20

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296968 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a typo. Thanks to huangml. Reported here: https://github.com/llvm-mirror/llvm...
Sylvestre Ledru [Sat, 4 Mar 2017 13:56:11 +0000 (13:56 +0000)]
Fix a typo. Thanks to huangml. Reported here: https://github.com/llvm-mirror/llvm/pull/6

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296967 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Enable post-legalize vXi64 shuffle combining on 32-bit targets
Simon Pilgrim [Sat, 4 Mar 2017 12:50:47 +0000 (12:50 +0000)]
[X86][SSE] Enable post-legalize vXi64 shuffle combining on 32-bit targets

Long ago (2010 according to svn blame), combineShuffle probably needed to prevent the accidental creation of illegal i64 types but there doesn't appear to be any combines that can cause this any more as they all have their own legality checks.

Differential Revision: https://reviews.llvm.org/D30213

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296966 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[legalize-types] Remove stale entries from SoftenedFloats.
Florian Hahn [Sat, 4 Mar 2017 12:00:35 +0000 (12:00 +0000)]
[legalize-types] Remove stale entries from SoftenedFloats.

Summary:
When replacing a SDValue, we should remove the replaced value from
SoftenedFloats (and possibly the other maps as well?).

When we revisit a Node because it needs analyzing again, we have to
remove all result values from SoftenedFloats (and possibly other maps?).

This fixes the fp128 test failures with expensive checks for X86.

I think we probably should also remove the values from the other maps
(PromotedIntegers and so on), let me know what you think.

Reviewers: baldrick, bogner, davidxl, ab, arsenm, pirama, chh, RKSimon

Reviewed By: chh

Subscribers: danalbert, wdng, srhines, hfinkel, sepavloff, llvm-commits

Differential Revision: https://reviews.llvm.org/D29265

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296964 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd test missed in r296770.
Evgeny Stupachenko [Sat, 4 Mar 2017 05:20:02 +0000 (05:20 +0000)]
Add test missed in r296770.

Differential Revision: http://reviews.llvm.org/D27004

From: Evgeny Stupachenko <evstupac@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296962 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix bug in bisect-skip-count not using passed-in arguments
Daniel Berlin [Sat, 4 Mar 2017 03:23:41 +0000 (03:23 +0000)]
Fix bug in bisect-skip-count not using passed-in arguments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296961 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSet option enabling LSR alternative way to resolve complex solution to false.
Evgeny Stupachenko [Sat, 4 Mar 2017 03:14:05 +0000 (03:14 +0000)]
Set option enabling LSR alternative way to resolve complex solution to false.

Differential Revision: http://reviews.llvm.org/D29862

From: Evgeny Stupachenko <evstupac@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296959 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoX86ISelLowering: Only perform copy elision on legal types.
Matthias Braun [Sat, 4 Mar 2017 01:40:40 +0000 (01:40 +0000)]
X86ISelLowering: Only perform copy elision on legal types.

This fixes cases where i1 types were not properly legalized yet and lead
to the creating of 0-sized stack slots.

This fixes http://llvm.org/PR32136

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296950 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix build.
Peter Collingbourne [Sat, 4 Mar 2017 01:38:05 +0000 (01:38 +0000)]
Fix build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296949 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWholeProgramDevirt: Implement exporting for uniform ret val opt.
Peter Collingbourne [Sat, 4 Mar 2017 01:34:53 +0000 (01:34 +0000)]
WholeProgramDevirt: Implement exporting for uniform ret val opt.

Differential Revision: https://reviews.llvm.org/D29846

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296948 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWholeProgramDevirt: Implement exporting for single-impl devirtualization.
Peter Collingbourne [Sat, 4 Mar 2017 01:31:01 +0000 (01:31 +0000)]
WholeProgramDevirt: Implement exporting for single-impl devirtualization.

Differential Revision: https://reviews.llvm.org/D29811

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296945 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWholeProgramDevirt: Add any unsuccessful llvm.type.checked.load devirtualizations...
Peter Collingbourne [Sat, 4 Mar 2017 01:23:30 +0000 (01:23 +0000)]
WholeProgramDevirt: Add any unsuccessful llvm.type.checked.load devirtualizations to the list of llvm.type.test users.

Any unsuccessful llvm.type.checked.load devirtualizations will be translated
into uses of llvm.type.test, so we need to add the resulting llvm.type.test
intrinsics to the function summaries so that the LowerTypeTests pass will
export them.

Differential Revision: https://reviews.llvm.org/D29808

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296939 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNewGVN: Be consistent in what order we compare operands for swapping.
Daniel Berlin [Sat, 4 Mar 2017 00:44:43 +0000 (00:44 +0000)]
NewGVN: Be consistent in what order we compare operands for swapping.
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296935 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MISched] Remove unused arguments. NFC.
Eli Friedman [Sat, 4 Mar 2017 00:42:55 +0000 (00:42 +0000)]
[MISched] Remove unused arguments. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296934 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] check for commuted add pattern to find ADC/SBB
Sanjay Patel [Sat, 4 Mar 2017 00:18:31 +0000 (00:18 +0000)]
[x86] check for commuted add pattern to find ADC/SBB

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296933 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] add test to show failed recognition of commuted pattern; NFC
Sanjay Patel [Sat, 4 Mar 2017 00:06:37 +0000 (00:06 +0000)]
[x86] add test to show failed recognition of commuted pattern; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296931 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRegAllocGreedy: Follow-up to r296722
Matthias Braun [Fri, 3 Mar 2017 23:27:20 +0000 (23:27 +0000)]
RegAllocGreedy: Follow-up to r296722

We can now end up in situations where we initiate LiveIntervalUnion
queries with different SubRanges against the same register unit, so the
assert() no longer holds in all cases. Just recalculate now when we know
the cache is out of date.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296928 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r296865 "[ARM] fpscr read/write intrinsics not aware of each other"
Hans Wennborg [Fri, 3 Mar 2017 23:19:31 +0000 (23:19 +0000)]
Revert r296865 "[ARM] fpscr read/write intrinsics not aware of each other"

It caused PR32134: "Cannot select: intrinsic %llvm.arm.get.fpscr".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296926 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoGlobalISel: constrain G_INSERT to inserting just one value per instruction.
Tim Northover [Fri, 3 Mar 2017 23:05:47 +0000 (23:05 +0000)]
GlobalISel: constrain G_INSERT to inserting just one value per instruction.

It's much easier to reason about single-value inserts and no-one was actually
using the variadic variants before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296923 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoGlobalISel: add merge/unmerge nodes for legalization.
Tim Northover [Fri, 3 Mar 2017 22:46:09 +0000 (22:46 +0000)]
GlobalISel: add merge/unmerge nodes for legalization.

These are simplified variants of the current G_SEQUENCE and G_EXTRACT, which
assume the individual parts will be contiguous, homogeneous, and occupy the
entirity of the larger register. This makes reasoning about them much easer
since you only have to look at the first register being merged and the result
to know what the instruction is doing.

I intend to gradually replace all uses of the more complicated sequence/extract
with these (or single-element insert/extracts), and then remove the older
variants. For now we start with legalization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296921 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] refactor combineAddOrSubToADCOrSBB(); NFCI
Sanjay Patel [Fri, 3 Mar 2017 22:35:11 +0000 (22:35 +0000)]
[x86] refactor combineAddOrSubToADCOrSBB(); NFCI

The comments were wrong, and this is not an obvious transform.
This hopefully makes it clearer that we're missing the commuted
patterns for adds. It's less clear that this is actually a good
transform for all micro-arch.

This is prep work for trying to clean up the current adc/sbb
codegen because it's definitely not happening optimally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296918 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSilence a warning, NFC
Krzysztof Parzyszek [Fri, 3 Mar 2017 22:21:02 +0000 (22:21 +0000)]
Silence a warning, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296917 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PGO] Text format profile reader needs to clear the value profile
Rong Xu [Fri, 3 Mar 2017 21:56:34 +0000 (21:56 +0000)]
[PGO] Text format profile reader needs to clear the value profile

Summary:
Reset the ValueData for each function to avoid using the ones in
the previous function.

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: llvm-commits, xur

Differential Revision: https://reviews.llvm.org/D30479

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296916 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDetect the existence of pthread_{s,g}etname_np in libpthread on Linux
Krzysztof Parzyszek [Fri, 3 Mar 2017 21:53:12 +0000 (21:53 +0000)]
Detect the existence of pthread_{s,g}etname_np in libpthread on Linux

Older Linux distributions may not have those functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296915 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix Threading path when LLVM_ENABLE_THREADS=0.
Zachary Turner [Fri, 3 Mar 2017 21:49:38 +0000 (21:49 +0000)]
Fix Threading path when LLVM_ENABLE_THREADS=0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296914 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoun-Xfail Fuzzer test that decided to pass on Green Dragon
Mehdi Amini [Fri, 3 Mar 2017 21:28:05 +0000 (21:28 +0000)]
un-Xfail Fuzzer test that decided to pass on Green Dragon

It may be flacky, I'll turn it into unsupported if it fails again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296913 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMC: De-duplicate the object streamer implementations of EmitFileDirective into MCObje...
Peter Collingbourne [Fri, 3 Mar 2017 21:22:06 +0000 (21:22 +0000)]
MC: De-duplicate the object streamer implementations of EmitFileDirective into MCObjectStreamer. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296912 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ObjectYAML] [DWARF] Abstract DWARF Initial Length values
Chris Bieneman [Fri, 3 Mar 2017 21:11:55 +0000 (21:11 +0000)]
[ObjectYAML] [DWARF] Abstract DWARF Initial Length values

In the DWARF 4 Spec section 7.2.2, data in many DWARF sections, and some DWARF structures start with "Initial Length Values", which are a 32-bit length, and an optional 64-bit length if the 32 bit value == UINT32_MAX.

This patch abstracts the Initial Length type in YAML, and extends its use to all the DWARF structures that are supported in the DWARFYAML code that have Initial Length values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296911 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] regenerate checks; NFC
Sanjay Patel [Fri, 3 Mar 2017 20:48:54 +0000 (20:48 +0000)]
[x86] regenerate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296908 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLTO: Hash the set of imported symbols for each module.
Peter Collingbourne [Fri, 3 Mar 2017 20:25:30 +0000 (20:25 +0000)]
LTO: Hash the set of imported symbols for each module.

This set may affect code generation and is sensitive to link order (and
possibly in the future to the linker's choice of prevailing symbol), so we
need to include it.

Differential Revision: https://reviews.llvm.org/D30586

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296907 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Windows] Remove the #include <eh.h> hack.
Zachary Turner [Fri, 3 Mar 2017 20:21:59 +0000 (20:21 +0000)]
[Windows] Remove the #include <eh.h> hack.

Prior to MSVC 2015 we had to manually include this header any
time we were going to include <thread> or <future> due to a
bug in MSVC's STL implementation.  This has been fixed in MSVC
for some time now, and we require VS 2015 minimum, so we can
remove this across all subprojects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296906 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRegisterCoalescer: Simplify subrange splitting code; NFC
Matthias Braun [Fri, 3 Mar 2017 19:05:34 +0000 (19:05 +0000)]
RegisterCoalescer: Simplify subrange splitting code; NFC

- Use slightly better variable names / compute in a more direct way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296905 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTeach lit to expand glob expressions.
Zachary Turner [Fri, 3 Mar 2017 18:55:24 +0000 (18:55 +0000)]
Teach lit to expand glob expressions.

This will enable removing hacks throughout the codebase
in clang and compiler-rt that feed multiple inputs to a
testing utility by globbing, all of which are either disabled
on Windows currently or using xargs / find hacks.

Differential Revision: https://reviews.llvm.org/D30380

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296904 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a compiler warning
Sanjoy Das [Fri, 3 Mar 2017 18:53:09 +0000 (18:53 +0000)]
Fix a compiler warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296903 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd missing #includes for FreeBSD.
Zachary Turner [Fri, 3 Mar 2017 18:38:22 +0000 (18:38 +0000)]
Add missing #includes for FreeBSD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296902 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake TargetInstrInfo::isPredicable take a const reference, NFC
Krzysztof Parzyszek [Fri, 3 Mar 2017 18:30:54 +0000 (18:30 +0000)]
Make TargetInstrInfo::isPredicable take a const reference, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296901 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[sancov] better input parameters validation
Mike Aizatsky [Fri, 3 Mar 2017 18:22:20 +0000 (18:22 +0000)]
[sancov] better input parameters validation

Differential Revision: https://reviews.llvm.org/D30370

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296900 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTry again to appease the FreeBSD bot.
Zachary Turner [Fri, 3 Mar 2017 18:21:04 +0000 (18:21 +0000)]
Try again to appease the FreeBSD bot.

The actual logic was wrong, not just the type conversion.
This should get it correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296899 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LoopUnrolling] Peel loops with invariant backedge Phi input
Sanjoy Das [Fri, 3 Mar 2017 18:19:15 +0000 (18:19 +0000)]
[LoopUnrolling] Peel loops with invariant backedge Phi input

Summary:
If a loop contains a Phi node which has an invariant input from back
edge, it is profitable to peel such loops (rather than unroll them) to
use the advantage that this Phi is always invariant starting from 2nd
iteration. After the 1st iteration is peeled, other optimizations can
potentially simplify calculations with this invariant.

Patch by Max Kazantsev!

Reviewers: sanjoy, apilipenko, igor-laevsky, anna, mkuper, reames

Reviewed By: mkuper

Subscribers: mkuper, mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D30161

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296898 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LoopUnrolling] Re-prioritize Peeling and Partial unrolling
Sanjoy Das [Fri, 3 Mar 2017 18:19:10 +0000 (18:19 +0000)]
[LoopUnrolling] Re-prioritize Peeling and Partial unrolling

Summary:
In current implementation the loop peeling happens after trip-count based partial unrolling and may
sometimes not happen at all due to it (for example, if trip count is known, but UP.Partial = false). This
is generally bad, the more than there are some situations where peeling is profitable even if the partial
unrolling is disabled.

This patch is a NFC which reorders peeling and partial unrolling application and prepares the code for
implementation of the said optimizations.

Patch by Max Kazantsev!

Reviewers: sanjoy, anna, reames, apilipenko, igor-laevsky, mkuper

Reviewed By: mkuper

Subscribers: mkuper, llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D30243

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296897 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] clean up materializeSBB(); NFCI
Sanjay Patel [Fri, 3 Mar 2017 17:58:39 +0000 (17:58 +0000)]
[x86] clean up materializeSBB(); NFCI

This is producing SBB where it is obviously not necessary, so it needs to be limited.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296894 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTry to appease the FreeBSD bots.
Zachary Turner [Fri, 3 Mar 2017 17:56:14 +0000 (17:56 +0000)]
Try to appease the FreeBSD bots.

pthread_self() returns a pthread_t, but we were setting it to
an int.  It seems the cast to int when calling sysctl is still
the correct thing to do, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296892 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDon't bring in llvm/Support/thread.h in Threading.cpp
Zachary Turner [Fri, 3 Mar 2017 17:39:24 +0000 (17:39 +0000)]
Don't bring in llvm/Support/thread.h in Threading.cpp

Doing so defines the type llvm::thread.  On FreeBSD, we need
to call a macro which references its own ::thread type, which
causes an ambiguity due to ADL when inside of the llvm namespace.

Since we don't even need this unless LLVM_ENABLE_THREADS == 1,
we don't even need this type anyway, as it is always equal to
std::thread, so we can just use that directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296891 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd #include for unistd.h on Linux.
Zachary Turner [Fri, 3 Mar 2017 17:24:55 +0000 (17:24 +0000)]
Add #include for unistd.h on Linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296890 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Support] Provide access to current thread name/thread id.
Zachary Turner [Fri, 3 Mar 2017 17:15:17 +0000 (17:15 +0000)]
[Support] Provide access to current thread name/thread id.

Applications often need the current thread id when making
system calls, and some operating systems provide the notion
of a thread name, which can be useful in enabling better
diagnostics when debugging or logging.

This patch adds an accessor for the thread id, and "best effort"
getters and setters for the thread name.  Since this is
non critical functionality, no error is returned to indicate
that a platform doesn't support thread names.

Differential Revision: https://reviews.llvm.org/D30526

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296887 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse APInt::setBits instead of OR'ing in a separate APInt::getBitsSet call
Simon Pilgrim [Fri, 3 Mar 2017 17:03:52 +0000 (17:03 +0000)]
Use APInt::setBits instead of OR'ing in a separate APInt::getBitsSet call

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296886 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] regenerate checks; NFC
Sanjay Patel [Fri, 3 Mar 2017 16:58:51 +0000 (16:58 +0000)]
[x86] regenerate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296883 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse APInt::getLowBitsSet instead of APInt::getBitsSet for lower bit mask creation
Simon Pilgrim [Fri, 3 Mar 2017 16:56:33 +0000 (16:56 +0000)]
Use APInt::getLowBitsSet instead of APInt::getBitsSet for lower bit mask creation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296882 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] regenerate checks; NFC
Sanjay Patel [Fri, 3 Mar 2017 16:45:57 +0000 (16:45 +0000)]
[x86] regenerate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296881 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] regenerate checks; NFC
Sanjay Patel [Fri, 3 Mar 2017 16:42:43 +0000 (16:42 +0000)]
[x86] regenerate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296880 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse APInt::getOneBitSet instead of APInt::getBitsSet for sign bit mask creation
Simon Pilgrim [Fri, 3 Mar 2017 16:35:57 +0000 (16:35 +0000)]
Use APInt::getOneBitSet instead of APInt::getBitsSet for sign bit mask creation

Avoids all the unnecessary extra bitrange creation/shift stages.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296879 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] regenerate checks; NFC
Sanjay Patel [Fri, 3 Mar 2017 16:34:35 +0000 (16:34 +0000)]
[x86] regenerate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296877 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] fix formatting; NFC
Sanjay Patel [Fri, 3 Mar 2017 15:17:41 +0000 (15:17 +0000)]
[x86] fix formatting; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296875 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse APInt::getHighBitsSet instead of APInt::getBitsSet for upper bit mask creation
Simon Pilgrim [Fri, 3 Mar 2017 14:37:57 +0000 (14:37 +0000)]
Use APInt::getHighBitsSet instead of APInt::getBitsSet for upper bit mask creation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296874 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AMDGPU][MC] Fix for Bug 30829 + LIT tests
Dmitry Preobrazhensky [Fri, 3 Mar 2017 14:31:06 +0000 (14:31 +0000)]
[AMDGPU][MC] Fix for Bug 30829 + LIT tests

Added code to check constant bus restrictions for VOP formats (only one SGPR value or literal-constant may be used by the instruction).
Note that the same checks are performed by SIInstrInfo::verifyInstruction (used by lowering code).
Added LIT tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296873 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Re-apply "[GVNHoist] Move GVNHoist to function simplification part of pipeline.""
Benjamin Kramer [Fri, 3 Mar 2017 14:27:53 +0000 (14:27 +0000)]
Revert "Re-apply "[GVNHoist] Move GVNHoist to function simplification part of pipeline.""

This reverts commit r296759. Miscompiles bash.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296872 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse APInt::getOneBitSet instead of APInt::getBitsSet for sign bit mask creation
Simon Pilgrim [Fri, 3 Mar 2017 14:25:46 +0000 (14:25 +0000)]
Use APInt::getOneBitSet instead of APInt::getBitsSet for sign bit mask creation

Avoids all the unnecessary extra bitrange creation/shift stages.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296871 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix Wdocumentation warning
Simon Pilgrim [Fri, 3 Mar 2017 12:09:11 +0000 (12:09 +0000)]
Fix Wdocumentation warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296866 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] fpscr read/write intrinsics not aware of each other
Ranjeet Singh [Fri, 3 Mar 2017 11:40:07 +0000 (11:40 +0000)]
[ARM] fpscr read/write intrinsics not aware of each other

The intrinsics __builtin_arm_get_fpscr and __builtin_arm_set_fpscr read and
write to the fpscr (Floating-Point Status and Control Register) register.

A bug exists in the __builtin_arm_get_fpscr intrinsic definition in llvm which
treats this intrinsic as a IntroNoMem which means it's not a memory access and
doesn't have any other side-effects. Having this property on this intrinsic
means that various optimizations can be done on this such as common
sub-expression elimination with other reads. This can cause issues if there has
been write to this register, e.g.

void foo(int *p) {
     p[0] = __builtin_arm_get_fpscr();
     __builtin_arm_set_fpscr(1);
     p[1] = __builtin_arm_get_fpscr();
}

in the above example the second read is currently CSE'd into the first read,
this is because llvm isn't aware that the write done by __builtin_arm_set_fpscr
effects the same register that __builtin_arm_get_fpscr reads from, to fix this
problem I've removed the property IntrNoMem so that __builtin_arm_get_fpscr is
treated as a memory access.

Differential Revision: https://reviews.llvm.org/D30542

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296865 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SLP] Fixes the bug due to absence of in order uses of scalars which needs to be...
Mohammad Shahid [Fri, 3 Mar 2017 10:02:47 +0000 (10:02 +0000)]
[SLP] Fixes the bug due to absence of in order uses of scalars which needs to be available
for VectorizeTree() API.This API uses it for proper mask computation to be used in shufflevector IR.
The fix is to compute the mask for out of order memory accesses while building the vectorizable tree
instead of actual vectorization of vectorizable tree.It also needs to recompute the proper Lane for
external use of vectorizable scalars based on shuffle mask.

Reviewers: mkuper

Differential Revision: https://reviews.llvm.org/D30159

Change-Id: Ide8773ce0ad3562f3cf4d1a0ad0f487e2f60ce5d

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296863 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SDAG] Revert r296476 (and r296486, r296668, r296690).
Chandler Carruth [Fri, 3 Mar 2017 10:02:25 +0000 (10:02 +0000)]
[SDAG] Revert r296476 (and r296486, r296668, r296690).

This patch causes compile times for some patterns to explode. I have
a (large, unreduced) test case that slows down by more than 20x and
several test cases slow down by 2x. I'm sending some of the test cases
directly to Nirav and following up with more details in the review log,
but this should unblock anyone else hitting this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296862 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a typo in the comments. Patch by marktwtn from https://github.com/llvm-mirror...
Sylvestre Ledru [Fri, 3 Mar 2017 09:36:04 +0000 (09:36 +0000)]
Fix a typo in the comments. Patch by marktwtn from https://github.com/llvm-mirror/llvm/pull/16/files

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296860 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Generate VZEROUPPER for Skylake-avx512.
Amjad Aboud [Fri, 3 Mar 2017 09:03:24 +0000 (09:03 +0000)]
[X86] Generate VZEROUPPER for Skylake-avx512.
VZEROUPPER should not be issued on Knights Landing (KNL), but on Skylake-avx512 it should be.

Differential Revision: https://reviews.llvm.org/D29874

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296859 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64AsmParser] rewrite of function parseSysAlias
Sjoerd Meijer [Fri, 3 Mar 2017 08:12:47 +0000 (08:12 +0000)]
[AArch64AsmParser] rewrite of function parseSysAlias

This is a cleanup/rewrite of the parseSysAlias function. It was not using the
tablegen instruction descriptions, but was “manually” matching the mnemonics
and recreating the operands whereas all this information is already in
tablegen; all this code has been replaced with calls to lookupXYZByName
tablegen calls.

Differential Revision: https://reviews.llvm.org/D30491

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296857 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalISel][X86] Support float/double and vector types.
Igor Breger [Fri, 3 Mar 2017 08:06:46 +0000 (08:06 +0000)]
[GlobalISel][X86] Support float/double and vector types.

Summary: [GlobalISel][X86] Add support for f32/f64 and vector types in RegisterBank and InstructionSelector.

Reviewers: delena, zvi

Reviewed By: zvi

Subscribers: dberris, rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D30533

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296856 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r296730, "cmake: Configure the ThinLTO cache directory when using ELF lld...
Peter Collingbourne [Fri, 3 Mar 2017 02:00:22 +0000 (02:00 +0000)]
Revert r296730, "cmake: Configure the ThinLTO cache directory when using ELF lld or gold."

Causes a build failure on the clang-with-thin-lto-ubuntu bot.
http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/2117/steps/build-stage3-compiler/logs/stdio

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296850 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[msan] Handle x86_sse_stmxcsr and x86_sse_ldmxcsr.
Evgeniy Stepanov [Fri, 3 Mar 2017 01:12:43 +0000 (01:12 +0000)]
[msan] Handle x86_sse_stmxcsr and x86_sse_ldmxcsr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296848 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLiveDebugValues: Assume calls never clobber SP.
Adrian Prantl [Fri, 3 Mar 2017 01:08:25 +0000 (01:08 +0000)]
LiveDebugValues: Assume calls never clobber SP.

A call should never modify the stack pointer, but some backends are
not so sure about this and never list SP in the regmask. For the
purposes of LiveDebugValues we assume a call never clobbers SP. We
already have a similar workaround in DbgValueHistoryCalculator (which
we hopefully can retire soon).

This fixes the availabilty of local ASANified variables on AArch64.

rdar://problem/27757381

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296847 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ProfileData] Fix some Clang-tidy modernize and Include What You Use warnings; other...
Eugene Zelenko [Fri, 3 Mar 2017 01:07:34 +0000 (01:07 +0000)]
[ProfileData] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296846 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCodeGen: BlockPlacement: Precompute layout for chains of triangles.
Kyle Butt [Fri, 3 Mar 2017 01:00:22 +0000 (01:00 +0000)]
CodeGen: BlockPlacement: Precompute layout for chains of triangles.

For chains of triangles with small join blocks that can be tail duplicated, a
simple calculation of probabilities is insufficient. Tail duplication
can be profitable in 3 different ways for these cases:

1) The post-dominators marked 50% are actually taken 56% (This shrinks with
   longer chains)
2) The chains are statically correlated. Branch probabilities have a very
   U-shaped distribution.
   [http://nrs.harvard.edu/urn-3:HUL.InstRepos:24015805]
   If the branches in a chain are likely to be from the same side of the
   distribution as their predecessor, but are independent at runtime, this
   transformation is profitable. (Because the cost of being wrong is a small
   fixed cost, unlike the standard triangle layout where the cost of being
   wrong scales with the # of triangles.)
3) The chains are dynamically correlated. If the probability that a previous
   branch was taken positively influences whether the next branch will be
   taken
We believe that 2 and 3 are common enough to justify the small margin in 1.

The code pre-scans a function's CFG to identify this pattern and marks the edges
so that the standard layout algorithm can use the computed results.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296845 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[msan] Remove stale comments.
Evgeniy Stepanov [Fri, 3 Mar 2017 00:25:56 +0000 (00:25 +0000)]
[msan] Remove stale comments.

ClStoreCleanOrigin flag was removed back in 2014.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296844 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Fix missing dominator tree dependency
Matt Arsenault [Thu, 2 Mar 2017 23:50:51 +0000 (23:50 +0000)]
AMDGPU: Fix missing dominator tree dependency

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296842 91177308-0d34-0410-b5e6-96231b3b80d8