OSDN Git Service
Jakob Stoklund Olesen [Fri, 13 Jan 2012 03:16:35 +0000 (03:16 +0000)]
Use uniqued StringInit pointers for lookups.
This avoids a gazillion StringMap and dynamic_cast calls, making
TableGen run 3x faster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148091
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Evan Cheng [Fri, 13 Jan 2012 01:37:24 +0000 (01:37 +0000)]
DAGCombine's logic for forming pre- and post- indexed loads / stores were being
overly conservative. It was concerned about cases where it would prohibit
folding simple [r, c] addressing modes. e.g.
ldr r0, [r2]
ldr r1, [r2, #4]
=>
ldr r0, [r2], #4
ldr r1, [r2]
Change the logic to look for such cases which allows it to form indexed memory
ops more aggressively.
rdar://
10674430
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148086
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Bill Wendling [Fri, 13 Jan 2012 00:41:53 +0000 (00:41 +0000)]
Fix off-by-one error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148077
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Dan Gohman [Fri, 13 Jan 2012 00:39:07 +0000 (00:39 +0000)]
Implement proper ObjC ARC objc_retainBlock "escape" analysis, so that
the optimizer doesn't eliminate objc_retainBlock calls which are needed
for their side effect of copying blocks onto the heap.
This implements rdar://
10361249.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148076
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Pete Cooper [Thu, 12 Jan 2012 23:14:13 +0000 (23:14 +0000)]
Added MVT::v2f16
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148067
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Bill Wendling [Thu, 12 Jan 2012 23:06:28 +0000 (23:06 +0000)]
Revert accidental commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148065
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Bill Wendling [Thu, 12 Jan 2012 23:05:03 +0000 (23:05 +0000)]
Fix the code that was WRONG.
The registers are placed into the saved registers list in the reverse order,
which is why the original loop was written to loop backwards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148064
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Pete Cooper [Thu, 12 Jan 2012 21:46:18 +0000 (21:46 +0000)]
Added FPOW, FEXP, FLOG to PromoteNode so that custom actions can be set to Promote for those operations.
Sorry, no test case yet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148050
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Elena Demikhovsky [Thu, 12 Jan 2012 20:33:10 +0000 (20:33 +0000)]
Fixed a bug in LowerVECTOR_SHUFFLE caused assertion failure
lc: X86ISelLowering.cpp:6480: llvm::SDValue llvm::X86TargetLowering::LowerVECTOR_SHUFFLE(llvm::SDValue, llvm::SelectionDAG&) const: Assertion `V1.getOpcode() != ISD::UNDEF&& "Op 1 of shuffle should not be undef"' failed.
Added a test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148044
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Evan Cheng [Thu, 12 Jan 2012 20:31:24 +0000 (20:31 +0000)]
When hoisting common code, watch out for uses which are marked "kill". If the
killed registers are needed below the insertion point, then unset the kill
marker.
Sorry I'm not able to find a reduced test case.
rdar://
10660944
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148043
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Rafael Espindola [Thu, 12 Jan 2012 20:26:13 +0000 (20:26 +0000)]
Add error-reporting tests for platforms that don't support segmented stacks.
Patch by Brian Anderson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148042
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Rafael Espindola [Thu, 12 Jan 2012 20:24:30 +0000 (20:24 +0000)]
Support segmented stacks on 64-bit FreeBSD.
This patch uses tcb_spare field in the tcb structure to store info.
Patch by Jyun-Yan You.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148041
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Rafael Espindola [Thu, 12 Jan 2012 20:22:08 +0000 (20:22 +0000)]
Support segmented stacks on win32.
Uses the pvArbitrary slot of the TIB, which is reserved for applications. We
only support frames with a static size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148040
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Devang Patel [Thu, 12 Jan 2012 19:54:02 +0000 (19:54 +0000)]
Remove test case, as Chris suggested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148039
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Devang Patel [Thu, 12 Jan 2012 18:40:46 +0000 (18:40 +0000)]
Add test case to check intel syntax parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148034
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Evan Cheng [Thu, 12 Jan 2012 18:27:52 +0000 (18:27 +0000)]
Allow targets to select source order pre-RA scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148033
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Devang Patel [Thu, 12 Jan 2012 18:03:40 +0000 (18:03 +0000)]
Rename X86ATTAsmParser -> X86AsmParser
We are using one parser to parse att as well as intel style syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148032
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Jakob Stoklund Olesen [Thu, 12 Jan 2012 17:53:44 +0000 (17:53 +0000)]
Make SplitAnalysis::UseSlots private.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148031
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Benjamin Kramer [Thu, 12 Jan 2012 17:37:18 +0000 (17:37 +0000)]
After Jakob's r147938 exception handling on i386 was completely broken.
Restore the (obviously wrong) behavior from before r147938 without relying on
undefined behavior. Add a fat FIXME note.
This should fix nightly tester failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148030
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Nadav Rotem [Thu, 12 Jan 2012 15:31:55 +0000 (15:31 +0000)]
Fix a bug in the AVX 256-bit shuffle code in cases where the splat element is on the boundary of two 128-bit vectors.
The attached testcase was stuck in an endless loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148027
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Benjamin Kramer [Thu, 12 Jan 2012 12:41:34 +0000 (12:41 +0000)]
X86: Generalize the x << (y & const) optimization to also catch masks with more set bits set than 31 or 63.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148024
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Evan Cheng [Thu, 12 Jan 2012 02:35:23 +0000 (02:35 +0000)]
Move Sched::Preference out of TargetMachine.h where it is not referenced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148014
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Devang Patel [Thu, 12 Jan 2012 01:51:42 +0000 (01:51 +0000)]
Add predicate method check match memory operand size, if available.
In att style asm syntax memory operand size is derived from suffix attached with mnemonic. In intel style asm syntax it is part of memory operand hence predicate method check is required to select appropriate instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148006
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Bill Wendling [Thu, 12 Jan 2012 01:41:03 +0000 (01:41 +0000)]
A DenseMap of a std::map isn't a very good idea because the "grow()" method will
need to make a deep copy of each of the std::maps. Use a std::map of the
std::map instead. This improves the compile time of sqlite3 by ~2%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148003
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Devang Patel [Thu, 12 Jan 2012 01:36:43 +0000 (01:36 +0000)]
Add intel style operand parser skeleton.
This is a work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148002
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Chandler Carruth [Thu, 12 Jan 2012 01:34:44 +0000 (01:34 +0000)]
Switch all of the uses of my InsertDAGNode helper to follow the exact
same pattern. We already had this pattern is a few places, but others
tried to make a rough approximation of an actual DAG structure. As not
everywhere went to this trouble, nothing could rely on this being done.
In fact, I've checked all references to these node Ids, and the ones
that are using the topo-sort properties are actually satisfied with
a strict-weak-ordering. The requirement appears to be that Use >= Def.
I've added a big blurb of comments to this bit of the transform to
clarify why the order is so important for the next reader of the code.
I'm starting with this change as it is very small, and trivially
reverted if something breaks or the >= above really does need to be >.
If that proves the case, we can hide the problem by reverting this
patch, but the problem exists elsewhere as well, and so a more
comprehensive solution will be needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148001
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Bill Wendling [Wed, 11 Jan 2012 23:43:34 +0000 (23:43 +0000)]
Revert r147978. A DenseMap's iterators may become invalidated here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147980
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Jakob Stoklund Olesen [Wed, 11 Jan 2012 23:19:08 +0000 (23:19 +0000)]
Make data structures private.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147979
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Bill Wendling [Wed, 11 Jan 2012 22:57:32 +0000 (22:57 +0000)]
Use a DenseMap.
This appears to improve sqlite3's compile time by ~2%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147978
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Jakob Stoklund Olesen [Wed, 11 Jan 2012 22:52:14 +0000 (22:52 +0000)]
Sink spillInterferences into RABasic.
This helper method is too simplistic for RAGreedy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147976
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Jakob Stoklund Olesen [Wed, 11 Jan 2012 22:52:11 +0000 (22:52 +0000)]
Cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147975
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Jakob Stoklund Olesen [Wed, 11 Jan 2012 22:28:30 +0000 (22:28 +0000)]
Move RegAllocBase into its own cpp file separate from RABasic.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147972
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Eli Friedman [Wed, 11 Jan 2012 22:06:46 +0000 (22:06 +0000)]
Re-fix the issue Bill fixed in r147899 in a slightly different way, which doesn't abuse the semantics of linker_private. We don't really want to merge any string constant with a weak_odr global.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147971
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Jim Grosbach [Wed, 11 Jan 2012 21:23:35 +0000 (21:23 +0000)]
80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147970
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Jim Grosbach [Wed, 11 Jan 2012 21:19:49 +0000 (21:19 +0000)]
lli should only create memmgr when JITing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147969
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Jim Grosbach [Wed, 11 Jan 2012 21:12:51 +0000 (21:12 +0000)]
lli should create a JIT memory manager.
Previously let the JITEmitter do it. That's rather odd, and doesn't play nice
with the MCJIT, so move the (trivial) logic up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147967
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Eric Christopher [Wed, 11 Jan 2012 20:55:27 +0000 (20:55 +0000)]
Fix assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147966
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Argyrios Kyrtzidis [Wed, 11 Jan 2012 20:53:25 +0000 (20:53 +0000)]
Disable the crash reporter when running lit tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147965
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Nadav Rotem [Wed, 11 Jan 2012 20:19:17 +0000 (20:19 +0000)]
On AVX, we can load v8i32 at a time. The bug happens when two uneven loads are used.
When we load the v12i32 type, the GenWidenVectorLoads method generates two loads: v8i32 and v4i32
and attempts to use CONCAT_VECTORS to join them. In this fix I concat undef values to widen
the smaller value. The test "widen_load-2.ll" also exposes this bug on AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147964
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Bill Wendling [Wed, 11 Jan 2012 19:33:37 +0000 (19:33 +0000)]
Check to make sure that the CFString's back store ends up in the correct section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147961
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Rafael Espindola [Wed, 11 Jan 2012 19:00:37 +0000 (19:00 +0000)]
Support segmented stacks on mac.
This uses TLS slot 90, which actually belongs to JavaScriptCore. We only support
frames with static size
Patch by Brian Anderson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147960
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Rafael Espindola [Wed, 11 Jan 2012 18:51:03 +0000 (18:51 +0000)]
Split segmented stacks tests into tests for static- and dynamic-size frames.
Patch by Brian Anderson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147959
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Rafael Espindola [Wed, 11 Jan 2012 18:41:19 +0000 (18:41 +0000)]
Generate the segmented stack prologue for fastcc too.
Patch by Brian Anderson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147958
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Chandler Carruth [Wed, 11 Jan 2012 18:36:12 +0000 (18:36 +0000)]
Revert r147945 which disabled an addressing mode transformation. I had
hoped this would revive one of the llvm-gcc selfhost build bots, but it
didn't so it doesn't appear that my transform is the culprit.
If anyone else is seeing failures, please let me know!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147957
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Rafael Espindola [Wed, 11 Jan 2012 18:23:35 +0000 (18:23 +0000)]
Use unsigned comparison in segmented stack prologue.
This is a comparison of two addresses, and GCC does the comparison unsigned.
Patch by Brian Anderson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147954
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Kostya Serebryany [Wed, 11 Jan 2012 18:15:23 +0000 (18:15 +0000)]
[asan] extend the workaround for llvm.org/bugs/show_bug.cgi?id=11395: don't instrument the function at all on x86_32 if it has a large asm blob
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147953
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Rafael Espindola [Wed, 11 Jan 2012 18:14:03 +0000 (18:14 +0000)]
Explicitly set the scale to 1 on some segstack prologue instrs.
Patch by Brian Anderson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147952
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Kevin Enderby [Wed, 11 Jan 2012 18:04:47 +0000 (18:04 +0000)]
The error check for using -g with a .s file already containing dwarf .file
directives was in the wrong place and getting triggered incorectly with a
cpp .file directive. This change fixes that and adds a test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147951
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Jan Sjödin [Wed, 11 Jan 2012 15:20:20 +0000 (15:20 +0000)]
Add XOP Intrinsics and tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147949
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Nadav Rotem [Wed, 11 Jan 2012 14:07:51 +0000 (14:07 +0000)]
Fix a bug in the lowering of BUILD_VECTOR for AVX. SCALAR_TO_VECTOR does not zero untouched elements. Use INSERT_VECTOR_ELT instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147948
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Duncan Sands [Wed, 11 Jan 2012 12:20:08 +0000 (12:20 +0000)]
Don't try to create a GEP when the pointee type is unsized (such GEPs
are invalid). Fixes a crash on array1.C from the GCC testsuite when
compiled with dragonegg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147946
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Chandler Carruth [Wed, 11 Jan 2012 12:17:47 +0000 (12:17 +0000)]
Disable the transformation I added in r147936 to see if it fixes some
strange build bot failures that look like a miscompile into an infloop.
I'll investigate this tomorrow, but I'd both like to know whether my
patch is the culprit, and get the bots back to green.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147945
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Chandler Carruth [Wed, 11 Jan 2012 11:04:36 +0000 (11:04 +0000)]
Hoist a really redundant code pattern into a helper function, and delete
lots of lines of code. No functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147942
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Chandler Carruth [Wed, 11 Jan 2012 09:35:04 +0000 (09:35 +0000)]
Simplify the AND-rooted mask+shift checking code to match that of the
SRL-rooted code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147941
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Chandler Carruth [Wed, 11 Jan 2012 09:35:02 +0000 (09:35 +0000)]
Unify the interface of the three mask+shift transform helpers, and
factor the differences that were hiding in one of them into its other
caller, the SRL handling code. No change in behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147940
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Chandler Carruth [Wed, 11 Jan 2012 09:35:00 +0000 (09:35 +0000)]
Clarify and make explicit some of the requirements for transforming
mask+shift pairs at the beginning of the ISD::AND case block, and then
hoist the final pattern into a helper function, simplifying and
reflowing it appropriately. This should have no observable behavior
change, but several simplifications fell out of this such as directly
computing the new mask constant, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147939
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Jakob Stoklund Olesen [Wed, 11 Jan 2012 09:08:04 +0000 (09:08 +0000)]
Fix undefined code and reenable test case.
I don't think the compact encoding code is right, but at least is has
defined behavior now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147938
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Chandler Carruth [Wed, 11 Jan 2012 08:48:20 +0000 (08:48 +0000)]
Hoist the logic to transform shift+mask combinations into sub-register
extracts and scaled addressing modes into its own helper function. No
functionality changed here, just hoisting and layout fixes falling out
of that hoisting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147937
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Chandler Carruth [Wed, 11 Jan 2012 08:41:08 +0000 (08:41 +0000)]
Teach the X86 instruction selection to do some heroic transforms to
detect a pattern which can be implemented with a small 'shl' embedded in
the addressing mode scale. This happens in real code as follows:
unsigned x = my_accelerator_table[input >> 11];
Here we have some lookup table that we look into using the high bits of
'input'. Each entity in the table is 4-bytes, which means this
implicitly gets turned into (once lowered out of a GEP):
*(unsigned*)((char*)my_accelerator_table + ((input >> 11) << 2));
The shift right followed by a shift left is canonicalized to a smaller
shift right and masking off the low bits. That hides the shift right
which x86 has an addressing mode designed to support. We now detect
masks of this form, and produce the longer shift right followed by the
proper addressing mode. In addition to saving a (rather large)
instruction, this also reduces stalls in Intel chips on benchmarks I've
measured.
In order for all of this to work, one part of the DAG needs to be
canonicalized *still further* than it currently is. This involves
removing pointless 'trunc' nodes between a zextload and a zext. Without
that, we end up generating spurious masks and hiding the pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147936
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Stepan Dyatkovskiy [Wed, 11 Jan 2012 08:40:51 +0000 (08:40 +0000)]
Improved compile time:
1. Size heuristics changed. Now we calculate number of unswitching
branches only once per loop.
2. Some checks was moved from UnswitchIfProfitable to
processCurrentLoop, since it is not changed during processCurrentLoop
iteration. It allows decide to skip some loops at an early stage.
Extended statistics:
- Added total number of instructions analyzed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147935
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NAKAMURA Takumi [Wed, 11 Jan 2012 07:34:22 +0000 (07:34 +0000)]
llvm/test/CodeGen/X86/zext-fold.ll: Relax an expression in stack offset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147928
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NAKAMURA Takumi [Wed, 11 Jan 2012 07:34:14 +0000 (07:34 +0000)]
llvm/test/CodeGen/X86/sub-with-overflow.ll: Add explicit -mtriple=i686-linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147927
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Andrew Trick [Wed, 11 Jan 2012 06:52:55 +0000 (06:52 +0000)]
Clarified the SCEV getSmallConstantTripCount interface with in-your-face comments.
This interface is misleading and dangerous, but it is actually what we need for unrolling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147926
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Rafael Espindola [Wed, 11 Jan 2012 04:04:14 +0000 (04:04 +0000)]
Add big endian mips support. Based on a patch by Jack Carter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147924
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Rafael Espindola [Wed, 11 Jan 2012 03:56:41 +0000 (03:56 +0000)]
Add the skeleton of an asm parser for mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147923
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Andrew Trick [Wed, 11 Jan 2012 03:56:08 +0000 (03:56 +0000)]
ARM Ld/St Optimizer fix.
Allow LDRD to be formed from pairs with different LDR encodings. This was the original intention of the pass. Somewhere along the way, the LDR opcodes were refined which broke the optimization. We really don't care what the original opcodes are as long as they both map to the same LDRD and the immediate still fits.
Fixes rdar://
10435045 ARMLoadStoreOptimization cannot handle mixed LDRi8/LDRi12
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147922
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Jakob Stoklund Olesen [Wed, 11 Jan 2012 03:42:27 +0000 (03:42 +0000)]
Disable test that seems to expose an unrelated Linux issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147921
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Jakob Stoklund Olesen [Wed, 11 Jan 2012 02:07:05 +0000 (02:07 +0000)]
Detect when a value is undefined on an edge to a landing pad.
Consider this code:
int h() {
int x;
try {
x = f();
g();
} catch (...) {
return x+1;
}
return x;
}
The variable x is undefined on the first edge to the landing pad, but it
has the f() return value on the second edge to the landing pad.
SplitAnalysis::getLastSplitPoint() would assume that the return value
from f() was live into the landing pad when f() throws, which is of
course impossible.
Detect these cases, and treat them as if the landing pad wasn't there.
This allows spill code to be inserted after the function call to f().
<rdar://problem/
10664933>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147912
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Jakob Stoklund Olesen [Wed, 11 Jan 2012 02:07:00 +0000 (02:07 +0000)]
Exclusively use SplitAnalysis::getLastSplitPoint().
Delete the alternative implementation in LiveIntervalAnalysis.
These functions computed the same thing, but SplitAnalysis caches the
result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147911
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Evan Cheng [Wed, 11 Jan 2012 00:38:11 +0000 (00:38 +0000)]
Avoid CSE of instructions which define physical registers across MBBs unless
the physical registers are not allocatable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147902
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Bill Wendling [Wed, 11 Jan 2012 00:13:08 +0000 (00:13 +0000)]
If the global variable is removed by the linker, then don't constant merge it
with other symbols.
An object in the __cfstring section is suppoed to be filled with CFString
objects, which have a pointer to ___CFConstantStringClassReference followed by a
pointer to a __cstring. If we allow the object in the __cstring section to be
merged with another global, then it could end up in any section. Because the
linker is going to remove these symbols in the final executable, we shouldn't
bother to merge them.
<rdar://problem/
10564621>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147899
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Eric Christopher [Wed, 11 Jan 2012 00:01:29 +0000 (00:01 +0000)]
Don't avoid recursing for pointer types, just reference types. Expand on
the comment.
Fixes constvars.exp on the gdb test builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147897
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Chad Rosier [Tue, 10 Jan 2012 23:09:53 +0000 (23:09 +0000)]
Add test case for r147881.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147891
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Lang Hames [Tue, 10 Jan 2012 22:53:20 +0000 (22:53 +0000)]
Fixed order of operands in comment to match code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147890
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Joerg Sonnenberger [Tue, 10 Jan 2012 22:43:53 +0000 (22:43 +0000)]
Default stack alignment for 32bit x86 should be 4 Bytes, not 8 Bytes.
Add a test that checks the stack alignment of a simple function for
Darwin, Linux and NetBSD for 32bit and 64bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147888
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Jakob Stoklund Olesen [Tue, 10 Jan 2012 22:32:14 +0000 (22:32 +0000)]
Consider unknown alignment caused by OptimizeThumb2Instructions().
This function runs after all constant islands have been placed, and may
shrink some instructions to their 2-byte forms. This can actually cause
some constant pool entries to move out of range because of growing
alignment padding.
Treat instructions that may be shrunk the same as inline asm - they
erode the known alignment bits.
Also reinstate an old assertion in verify(). It is correct now that
basic block offsets include alignments.
Add a single large test case that will hopefully exercise many parts of
the constant island pass.
<rdar://problem/
10670199>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147885
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Evan Cheng [Tue, 10 Jan 2012 22:27:32 +0000 (22:27 +0000)]
80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147884
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Chad Rosier [Tue, 10 Jan 2012 22:14:06 +0000 (22:14 +0000)]
Add missing VEX predicates to VMOVSDto64rr/VMOVSDto64mr. This fixes a few
failing test cases on our internal AVX nightly tester.
rdar://
10663637
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147881
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Devang Patel [Tue, 10 Jan 2012 21:49:42 +0000 (21:49 +0000)]
Let asm parser query asm syntax dialect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147880
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Kevin Enderby [Tue, 10 Jan 2012 21:12:34 +0000 (21:12 +0000)]
This is the matching change for the data structure name changes for the
functional change in r147860 to use DW_TAG_label's instead TAG_subprogram's.
This only changes names and updates comments. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147877
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Jim Grosbach [Tue, 10 Jan 2012 21:11:12 +0000 (21:11 +0000)]
ARM updating VST2 pseudo-lowering fixed vs. register update.
rdar://
10663487
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147876
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Benjamin Kramer [Tue, 10 Jan 2012 20:47:20 +0000 (20:47 +0000)]
Fix some leftover control reaches end of non-void function warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147874
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Chandler Carruth [Tue, 10 Jan 2012 19:46:00 +0000 (19:46 +0000)]
Teach the triple library about the androideabi environment.
Patch by Evgeniy Stepanov.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147871
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Richard Smith [Tue, 10 Jan 2012 19:43:09 +0000 (19:43 +0000)]
Move default case for covered enum outside of switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147870
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Bill Wendling [Tue, 10 Jan 2012 19:41:30 +0000 (19:41 +0000)]
For i386, don't use the generic code.
As the comment around 7746 says, it's better to use the x87 extended precision
here than SSE. And the generic code doesn't know how to do that. It also regains
the speed lost for the uint64_to_float.c testcase.
<rdar://problem/
10669858>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147869
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Richard Smith [Tue, 10 Jan 2012 19:10:22 +0000 (19:10 +0000)]
Fix a -Wreturn-type warning in g++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147867
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Chandler Carruth [Tue, 10 Jan 2012 18:18:52 +0000 (18:18 +0000)]
Cleanup these asserts to follow common LLVM style and coding
conventions. Also, clarify the grouping of one of the asserts to silence
-Wparentheses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147863
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Chandler Carruth [Tue, 10 Jan 2012 18:08:01 +0000 (18:08 +0000)]
Add 'llvm_unreachable' to passify GCC's understanding of the constraints
of several newly un-defaulted switches. This also helps optimizers
(including LLVM's) recognize that every case is covered, and we should
assume as much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147861
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Kevin Enderby [Tue, 10 Jan 2012 17:52:29 +0000 (17:52 +0000)]
Various crash reporting tools have a problem with the dwarf generated for
assembly source when it generates the TAG_subprogram dwarf debug info for
the labels that have nothing between them as in this bit of assembly source:
% cat ZeroLength.s
_func1:
_func2:
nop
One solution would be to not emit the subsequent labels with the same address
and use the next label with a different address or the end of the section for
the AT_high_pc value of the TAG_subprogram.
Turns out in llvm-mc it is not possible in all cases to determine of two
symbols have the same value at the point we put out the TAG_subprogram dwarf
debug info.
So we will have llvm-mc instead of putting out TAG_subprogram's put out
DW_TAG_label's. And the DW_TAG_label does not have a AT_high_pc value which
avoids the problem.
This commit is only the functional change to make the diffs clear as to what is
really being changed. The next commit will be to clean up the names of such
things like MCGenDwarfSubprogramEntry to something like MCGenDwarfLabelEntry.
rdar://
10666925
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147860
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Devang Patel [Tue, 10 Jan 2012 17:51:54 +0000 (17:51 +0000)]
Add definition for intel asm variant.
Right now, this just adds additional entries in match table. The parser does not use them yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147859
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Devang Patel [Tue, 10 Jan 2012 17:50:43 +0000 (17:50 +0000)]
Record asm variant id in MatchEntry and check it while matching instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147858
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David Blaikie [Tue, 10 Jan 2012 16:47:17 +0000 (16:47 +0000)]
Remove unnecessary default cases in switches that cover all enum values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147855
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Nadav Rotem [Tue, 10 Jan 2012 14:28:46 +0000 (14:28 +0000)]
Fix a bug in the legalization of shuffle vectors. When we emulate shuffles using BUILD_VECTORS we may be using a BV of different type. Make sure to cast it back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147851
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Benjamin Kramer [Tue, 10 Jan 2012 11:50:02 +0000 (11:50 +0000)]
Add definitions for AMD's bobcat (aka btver1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147846
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Craig Topper [Tue, 10 Jan 2012 08:23:59 +0000 (08:23 +0000)]
Fix a crash in AVX2 when trying to broadcast a double into a 128-bit vector. There is no vbroadcastsd xmm, but we do need to support 64-bit integers broadcasted into xmm. Also factor the AVX check into the isVectorBroadcast function. This makes more sense since the AVX2 check was already inside.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147844
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Craig Topper [Tue, 10 Jan 2012 06:54:16 +0000 (06:54 +0000)]
Remove hasXMM/hasXMMInt functions. Move callers to hasSSE1/hasSSE2. This is the final piece to remove the AVX hack that disabled SSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147843
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Craig Topper [Tue, 10 Jan 2012 06:37:29 +0000 (06:37 +0000)]
Remove hasSSE*orAVX functions and change all callers to use just hasSSE*. AVX is now an SSE level and no longer disables SSE checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147842
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Craig Topper [Tue, 10 Jan 2012 06:30:56 +0000 (06:30 +0000)]
Instruction selection priority fixes to remove the XMM/XMMInt/orAVX predicates. Another commit will remove orAVX functions from X86SubTarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147841
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Evan Cheng [Tue, 10 Jan 2012 02:02:58 +0000 (02:02 +0000)]
Allow machine-cse to look across MBB boundary when cse'ing instructions that
define physical registers. It's currently very restrictive, only catching
cases where the CE is in an immediate (and only) predecessor. But it catches
a surprising large number of cases.
rdar://
10660865
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147827
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Andrew Trick [Tue, 10 Jan 2012 01:45:08 +0000 (01:45 +0000)]
Enable LSR IV Chains with sufficient heuristics.
These heuristics are sufficient for enabling IV chains by
default. Performance analysis has been done for i386, x86_64, and
thumbv7. The optimization is rarely important, but can significantly
speed up certain cases by eliminating spill code within the
loop. Unrolled loops are prime candidates for IV chains. In many
cases, the final code could still be improved with more target
specific optimization following LSR. The goal of this feature is for
LSR to make the best choice of induction variables.
Instruction selection may not completely take advantage of this
feature yet. As a result, there could be cases of slight code size
increase.
Code size can be worse on x86 because it doesn't support postincrement
addressing. In fact, when chains are formed, you may see redundant
address plus stride addition in the addressing mode. GenerateIVChains
tries to compensate for the common cases.
On ARM, code size increase can be mitigated by using postincrement
addressing, but downstream codegen currently misses some opportunities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147826
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