OSDN Git Service
Tapani Pälli [Fri, 22 Mar 2019 12:29:38 +0000 (14:29 +0200)]
st/mesa: fix compilation warning on storage_flags_to_buffer_flags
(warning: 'const' type qualifier on return type has no effect)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 22 Mar 2019 04:21:55 +0000 (14:21 +1000)]
nir/split_vars: fixup some more explicit_stride related issues.
With vkpipelinedb Samuel discovered a regression since we stopped
stripping types at the spir-v level.
This adds a check to the var splitting for the case where it
asserts the type hasn't changed, when it has just created a bare
type, and it's different than the original type which has an explicit
stride.
This also removes a pointless assert that also triggers.
Fixes:
3b3653c4cf (nir/spirv: don't use bare types, remove assert in split vars for testing)
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Caio Marcelo de Oliveira Filho [Thu, 21 Mar 2019 20:26:48 +0000 (13:26 -0700)]
spirv: Use interface type for block and buffer block
Also handle GLSL_TYPE_INTERFACE the same way we do GLSL_TYPE_STRUCT in
various places. Motivated by ARB_gl_spirv work, that will take
advantage of the interface types when handling NIR coming from SPIR-V.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Caio Marcelo de Oliveira Filho [Thu, 21 Mar 2019 22:02:38 +0000 (15:02 -0700)]
intel/compiler: handle GLSL_TYPE_INTERFACE as GLSL_TYPE_STRUCT
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Caio Marcelo de Oliveira Filho [Fri, 22 Mar 2019 05:37:50 +0000 (22:37 -0700)]
spirv: Add an execution environment to the options
Also updates gl_spirv to pick the right one. At the moment nothing
uses it, but upcoming functionality part of ARB_gl_spirv will use it,
and we also later can be more assertful when handling certain features
for each of the execution environments.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Eric Anholt [Sat, 25 Aug 2018 21:16:59 +0000 (14:16 -0700)]
egl: Add a 565 pbuffer-only EGL config under X11.
The CTS requires a 565-no-depth-no-stencil (meaning d/s not-required, not
not-present) config for ES 3.0, but at depth 24 of X11 we wouldn't do so.
We can satisfy that bad requirement using a pbuffer-only visual with
whatever other buffers the driver happens to have given us.
I've tried to raise this as an absurd requirement with Khronos and made no
progress.
v2: Make sure it's single sample, no depth, no stencil. Comment typo fix
Reviewed-by: Adam Jackson <ajax@redhat.com>
Caio Marcelo de Oliveira Filho [Fri, 22 Mar 2019 03:37:12 +0000 (20:37 -0700)]
nir: Handle array-deref-of-vector case in loop analysis
SPIR-V can produce those for SSBO and UBO access. Found when testing
the ARB_gl_spirv series.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Rob Clark [Fri, 22 Mar 2019 20:35:48 +0000 (16:35 -0400)]
docs: update freedreno status
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Thu, 21 Mar 2019 13:33:33 +0000 (09:33 -0400)]
freedreno: add ESSL cap
Report 320 for a6xx, which isn't *quite* true (no geom/tess, in
particular), but other caps keep the reported GL and GLSL versions
correct (3.1 / 3.10 es). But reporting 320 will switch on
EXT_gpu_shader5, which is the goal.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Thu, 21 Mar 2019 13:29:58 +0000 (09:29 -0400)]
mesa/st: use ESSL cap top enable gpu_shader5
For GLES2+ contexts, enable EXT_gpu_shader5 if the driver exposes a
sufficiently high ESSL feature level, even if the GLSL feature level
isn't high enough.
This allows drivers to support EXT_gpu_shader5 in GLES contexts before
they support all the additional features of ARB_gpu_shader5 in GL
contexts.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Rob Clark [Thu, 21 Mar 2019 12:56:17 +0000 (08:56 -0400)]
gallium: add PIPE_CAP_ESSL_FEATURE_LEVEL
Adds a new cap to allow drivers to expose higher shading language
versions in GLES contexts, to avoid having to report an artificially
low version for the benefit of GL contexts.
The motivation is to expose EXT_gpu_shader5 even though a driver may
not support all the features needed for the corresponding GL extension
(ARB_gpu_shader5).
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Vinson Lee [Mon, 18 Mar 2019 18:52:48 +0000 (11:52 -0700)]
swr: Fix build with llvm-9.0.
Fix build error after llvm-9.0svn r352827 ("[opaque pointer types] Add a
FunctionCallee wrapper type, and use it.").
In file included from ./rasterizer/jitter/builder.h:158:0,
from swr_shader.cpp:35:
./rasterizer/jitter/gen_builder_meta.hpp: In member function ‘llvm::Value* SwrJit::Builder::VGATHERPD(llvm::Value*, llvm::Value*, llvm::Value*, llvm::Value*, llvm::Value*, const llvm:
:Twine&)’:
./rasterizer/jitter/gen_builder_meta.hpp:51:117: error: no matching function for call to ‘cast(llvm::FunctionCallee)’
Function* pFunc = cast<Function>(JM()->mpCurrentModule->getOrInsertFunction("meta.intrinsic.VGATHERPD", pFuncTy));
^
Suggested-by: Philip Meulengracht <the_meulengracht@hotmail.com>
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alok Hota <alok.hota@intel.com>
Dylan Baker [Thu, 21 Mar 2019 16:09:20 +0000 (09:09 -0700)]
bin/install_megadrivers.py: Fix regression for set DESTDIR
The previous patch tried to address a bug when DESTDIR is '', however,
it introduces a bug when DESTDIR is not '', and fakeroot is used. This
patch does fix that, and has been tested with the arch pkg-build to
ensure it isn't regressed.
Fixes:
093a1ade4e24b7dd701a093d30a71efd669fe9c8
("bin/install_megadrivers.py: Correctly handle DESTDIR=''")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110221
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Samuel Pitoiset [Fri, 22 Mar 2019 08:24:57 +0000 (09:24 +0100)]
spirv,nir: lower frexp_exp/frexp_sig inside a new NIR pass
This lowering isn't needed for RADV because AMDGCN has two
instructions. It will be disabled for RADV in an upcoming series.
While we are at it, factorize a little bit.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Pitoiset [Fri, 22 Mar 2019 12:02:08 +0000 (13:02 +0100)]
nir: use generic float types for frexp_exp and frexp_sig
Only the exponent needs to be 32-bit signed integer.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Vinson Lee [Thu, 21 Mar 2019 21:47:06 +0000 (14:47 -0700)]
nir: Fix anonymous union initialization with older GCC.
Fix this build error with GCC 4.4.7.
CC nir/nir_opt_copy_prop_vars.lo
nir/nir_opt_copy_prop_vars.c: In function ‘load_element_from_ssa_entry_value’:
nir/nir_opt_copy_prop_vars.c:454: error: unknown field ‘ssa’ specified in initializer
nir/nir_opt_copy_prop_vars.c:455: error: unknown field ‘def’ specified in initializer
nir/nir_opt_copy_prop_vars.c:456: error: unknown field ‘component’ specified in initializer
nir/nir_opt_copy_prop_vars.c:456: error: extra brace group at end of initializer
nir/nir_opt_copy_prop_vars.c:456: error: (near initialization for ‘(anonymous).<anonymous>’)
nir/nir_opt_copy_prop_vars.c:456: warning: excess elements in union initializer
nir/nir_opt_copy_prop_vars.c:456: warning: (near initialization for ‘(anonymous).<anonymous>’)
Fixes:
96c32d77763c ("nir/copy_prop_vars: handle load/store of vector elements")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109810
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Chris Wilson [Wed, 21 Nov 2018 11:12:11 +0000 (11:12 +0000)]
iris: Push heavy memchecker code to DEBUG
Invoking VALGRIND_CHECK_MEM_IS_DEFINED pulls in enough code to convince
gcc to not inline __gen_uint and results in a lot of packing code ending
up out-of-line with lots of stack copying. To ameliorate this, only
insert the check inside the packer if DEBUG is defined and instead
perform the validation checking before submitting the batch to the
kernel. This should give accurate results if --trace-origins=yes is
used, and failing that we can recompile in full debug mode to check on
insertion.
Improve drawoverhead baseline by 25% with a default build with
valgrind-dev installed (with effectively no loss of vg coverage).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Fri, 22 Mar 2019 16:29:40 +0000 (09:29 -0700)]
iris: Fix batch chaining map_next increment.
Caught by Chris Wilson; split out from his valgrind patch.
Rob Clark [Thu, 21 Mar 2019 19:57:06 +0000 (15:57 -0400)]
freedreno/ir3: disable early-z for SSBO/image writes
Fixes:
dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_depth
dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_stencil
dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_depth_fbo
dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_stencil_fbo
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Thu, 21 Mar 2019 19:48:54 +0000 (15:48 -0400)]
freedreno/ir3: rename has_kill to no_earlyz
There are other cases where we need to disable early-z, like image
writes. So rename to something more generic.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rhys Perry [Thu, 6 Dec 2018 14:40:23 +0000 (14:40 +0000)]
ac/nir: implement 16-bit pack/unpack opcodes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Lionel Landwerlin [Tue, 19 Mar 2019 12:34:51 +0000 (12:34 +0000)]
vulkan/overlay: improve error reporting
We can show the actual command & line where the failure happened
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Lionel Landwerlin [Sat, 16 Mar 2019 18:51:49 +0000 (18:51 +0000)]
vulkan/overlay: check return value of swapchain get images
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Lionel Landwerlin [Sat, 16 Mar 2019 18:51:11 +0000 (18:51 +0000)]
vulkan/overlay: silence validation layer warnings
v2: Drop call to FreeDescriptorSet
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Lionel Landwerlin [Sat, 16 Mar 2019 18:50:40 +0000 (18:50 +0000)]
vulkan/overlay: properly register layer object with loader
This is required by the validation layers if we want to validate the
commands inserted by the overlay layer.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Józef Kucia [Tue, 12 Mar 2019 15:07:10 +0000 (16:07 +0100)]
radv: Fix driverUUID
Fixes:
14cad8786a8 ("radv: generate the same driver UUID as radeonsi")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Danylo Piliaiev [Tue, 4 Sep 2018 08:42:04 +0000 (11:42 +0300)]
glsl: Cross validate variable's invariance by explicit invariance only
'invariant' qualifier is propagated on variables which are used
to calculate other invariant variables, however when we are matching
variable's declarations we should take into account only explicitly
declared invariance because invariance propagation is an implementation
specific detail.
Thus new flag is added to ir_variable_data which indicates 'invariant'
qualifier being explicitly set in the shader.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100316
Fixes:
89b60492 ('glsl: Add a pass to propagate the "invariant" and
"precise" qualifiers')
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Józef Kucia [Tue, 12 Mar 2019 15:11:41 +0000 (16:11 +0100)]
mesa: Fix GL_NUM_DEVICE_UUIDS_EXT
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Kenneth Graunke [Mon, 11 Mar 2019 07:04:56 +0000 (00:04 -0700)]
iris: Skip resolves and flushes altogether if unnecessary
Improves drawoverhead baseline scores by 1.17x.
Kenneth Graunke [Sat, 9 Mar 2019 09:27:20 +0000 (01:27 -0800)]
iris: Skip framebuffer resolve tracking if framebuffer isn't dirty
Improves drawoverhead baseline score by 1.86x.
Kenneth Graunke [Sat, 9 Mar 2019 09:31:06 +0000 (01:31 -0800)]
iris: Skip input resolve handling if bindings haven't changed
This brings the drawoverhead 16 Tex w/ no state change score from
22% of baseline to 97% of baseline.
Kenneth Graunke [Thu, 21 Mar 2019 21:56:12 +0000 (14:56 -0700)]
iris: Fix util_vma_heap_init size for IRIS_MEMZONE_SHADER
Fixes assertions when disabling bucket allocators.
Dave Airlie [Thu, 21 Mar 2019 05:22:02 +0000 (15:22 +1000)]
softpipe: fix integer texture swizzling for 1 vs 1.0f
The swizzling was putting float one in not integer 1.
This fixes a lot of arb_texture_view-rendering-formats cases.
Reviewed-by: Brian Paul <brianp@vmware.com>
Dave Airlie [Thu, 21 Mar 2019 04:27:14 +0000 (14:27 +1000)]
softpipe: remove shadow_ref assert.
I don't think this really buys us anything and TG4 with cubemap arrays
falls over because sampler == 2, but otherwise works fine.
Fixes:
./bin/textureGather fs shadow r CubeArray repeat
on softpipe with ARB_gpu_shader5 enabled.
Reviewed-by: Brian Paul <brianp@vmware.com>
Dave Airlie [Thu, 21 Mar 2019 04:15:43 +0000 (14:15 +1000)]
softpipe: handle 32-bit bitfield inserts
Fixes piglits if ARB_gpu_shader5 is enabled
Reviewed-by: Brian Paul <brianp@vmware.com>
Dave Airlie [Thu, 21 Mar 2019 04:13:48 +0000 (14:13 +1000)]
softpipe: fix 32-bit bitfield extract
These didn't deal with the width == 32 case that TGSI is defined with.
Fixes piglit tests if ARB_gpu_shader5 is enabled.
Reviewed-by: Brian Paul <brianp@vmware.com>
Timothy Arceri [Wed, 20 Mar 2019 11:59:40 +0000 (22:59 +1100)]
nir: fix opt_if_loop_last_continue()
Rather than skipping code that looked like this:
loop {
...
if (cond) {
do_work_1();
continue;
} else {
break;
}
do_work_2();
}
Previously we would turn this into:
loop {
...
if (cond) {
do_work_1();
continue;
} else {
do_work_2();
break;
}
}
This was clearly wrong. This change checks for this case and makes
sure we now leave it for nir_opt_dead_cf() to clean up.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Gurchetan Singh [Tue, 19 Mar 2019 02:06:05 +0000 (19:06 -0700)]
anv: fix build on Nougat
AHardwareBuffer is only available on O and above.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Gurchetan Singh [Wed, 20 Mar 2019 02:20:53 +0000 (19:20 -0700)]
anv: move anv_GetMemoryAndroidHardwareBufferANDROID up a bit
No functional change, just makes the next patch a little easier.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Gurchetan Singh [Fri, 15 Mar 2019 17:08:45 +0000 (10:08 -0700)]
configure.ac / meson: depend on libnativewindow when appropriate
libnativewindow is only available on O or greater, and it's
required for some features.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Eric Anholt [Tue, 19 Mar 2019 21:05:30 +0000 (14:05 -0700)]
v3d: Remove some dead members of struct v3d_compile.
These are more vc4 leftovers.
Eric Anholt [Tue, 19 Mar 2019 16:58:14 +0000 (09:58 -0700)]
v3d: Upload all of UBO[0] if any indirect load occurs.
The idea was that we could skip uploading the constant-indexed uniform
data and just upload the uniforms that are variably-indexed. However,
since the VS bin and render shaders may have a different set of uniforms
used, this meant that we had to upload the UBO for each of them. The
first case is generally a fairly small impact (usually the uniform array
is the most space, other than a couple of FSes in shader-db), while the
second is a larger impact: 3DMMES2 was uploading 38k/frame of uniforms
instead of 18k.
Given that the optimization is of dubious value, has a big downside, and
is quite a bit of code, just drop it. No change in shader-db. No change
on 3DMMES2 (n=15).
Eric Anholt [Tue, 19 Mar 2019 18:39:58 +0000 (11:39 -0700)]
v3d: Move constant offsets to UBO addresses into the main uniform stream.
We'd end up with the constant offset in the uniform stream anyway, since
they're bigger than small immediates. Avoids the extra uniforms and adds
in the shader in favor of just adding once on the CPU.
shader-db:
total instructions in shared programs:
6496865 ->
6494851 (-0.03%)
total uniforms in shared programs:
2119511 ->
2117243 (-0.11%)
Eric Anholt [Tue, 19 Mar 2019 18:29:02 +0000 (11:29 -0700)]
v3d: Rename v3d_tmu_config_data to v3d_unit_data.
I want to reuse this for encoding small constant UBO/SSBO offsets into the
uniform stream to reduce the extra uniform loads and adds for the small
constant offsets.
Benjamin Gordon [Wed, 13 Jun 2018 22:17:32 +0000 (16:17 -0600)]
configure.ac/meson.build: Add options for library suffixes
When building the Chrome OS Android container, we need to build copies
of mesa that don't conflict with the Android system-supplied libraries.
This adds options to create suffixed versions of EGL and GLES libraries:
libEGL.so -> libEGL${egl-lib-suffix}.so
libGLESv1_CM.so -> libGLESv1_CM${gles-lib-suffix}.so
libGLESv2.so -> libGLES${gles-lib-suffix}.so
This is similar to what happens when --enable-libglvnd is specified, but
without the side effects of linking against libglvnd. To avoid
unexpected clashes with the suffixed appended by libglvnd, make it an
error to specify both --enable-libglvnd and --with-egl-lib-suffix.
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Kenneth Graunke [Wed, 20 Mar 2019 04:40:51 +0000 (21:40 -0700)]
nir: Record non-vector/scalar varyings as unmovable when compacting
In some cases, we can end up with varying structs that aren't split to
their member variables. nir_compact_varyings attempted to record these
as unmovable, so it would leave them be. Unfortunately, it didn't do
it right for non-vector/scalar types. It set the mask to:
((1 << (elements * dmul)) - 1) << var->data.location_frac
where elements is the number of vector elements. For structures and
other non-vector/scalars, elements is 0...so the whole mask became 0.
This caused nir_compact_varyings to assign other varyings on top of
the structure varying's location (as it appeared to take up no space).
To combat this, we just set elements to 4 for non-vector/scalar types,
so that the entire slot gets marked as unmovable.
Fixes KHR-GL45.tessellation_shader.tessellation_control_to_tessellation_evaluation.gl_in on iris.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Rob Clark [Wed, 20 Mar 2019 14:38:01 +0000 (10:38 -0400)]
freedreno/ir3: dynamic UBO indexing vs 64b pointers
Fixes dEQP-GLES31.functional.shaders.opaque_type_indexing.ubo.uniform_fragment
and similar things with multiple UBOs
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Wed, 20 Mar 2019 12:53:44 +0000 (08:53 -0400)]
freedreno/ir3: fix bit_count
Seems like it can only work 16b at a time. Fixes
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitcount.*
TODO need to check if this limitation applies to a3xx as well.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 19 Mar 2019 18:45:40 +0000 (14:45 -0400)]
freedreno/ir3: additional lowering
For some things that show up when we expose higher glsl
TODO check blob traces to see if we have instructions for some of this?
I guess we don't but worth a check..
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 19 Mar 2019 17:30:03 +0000 (13:30 -0400)]
freedreno/ir3: optimize sam.s2en to sam
Detect when sampler/texture idx are immediate and switch to non s2en
encoding.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 16 Mar 2019 14:33:26 +0000 (10:33 -0400)]
freedreno/ir3: enable indirect tex/samp (sam.s2en)
For now it uses indirect for everything. The next step is for the
ir3_cp pass to detect the case that tex and samp idx are immediate
and convert the sam instruction back to the non .s2en variant. But
doing that in a following patch so we can shake out the bugs with
.s2en more easily.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 19 Mar 2019 16:51:39 +0000 (12:51 -0400)]
freedreno/ir3: find # of samplers from uniform vars
When we have indirect samplers, we cannot tell the max sampler
referenced. Instead just refer to the number of sampler uniforms.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 19 Mar 2019 19:54:32 +0000 (15:54 -0400)]
nir: move gls_type_get_{sampler,image}_count()
I need at least the sampler variant in ir3..
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Rob Clark [Sat, 16 Mar 2019 15:45:16 +0000 (11:45 -0400)]
freedreno/ir3: fix regmask for merged regs
On a6xx+ with half-regs conflicting with full-regs, the legalize pass
needs to set appropriate sync bits, such as (sy), on writes to full regs
that conflict with half regs, and visa-versa.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 16 Mar 2019 14:29:44 +0000 (10:29 -0400)]
freedreno/ir3: fix sam.s2en encoding
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 16 Mar 2019 14:29:05 +0000 (10:29 -0400)]
freedreno/ir3: fix sam.s2en decoding
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 16 Mar 2019 14:03:12 +0000 (10:03 -0400)]
freedreno/ir3/ra: fix half-class conflicts
On a6xx, half-regs conflict with full-regs. But we were only setting up
conflicts for the first class (ie. scalar, but not hvec2/hvec3/hvec4),
resulting in higher half-reg classes getting assigned to regs that
overwrite full-regs.
Noticed while trying to enable indirect-sampler (sam.s2en) which uses an
hvec2 argument to pass the sampler/tex index.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 15 Mar 2019 14:29:10 +0000 (10:29 -0400)]
freedreno/ir3 better cat6 encoding detection
These two bits seem to be a better way to detect which encoding we are
looking at.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Samuel Pitoiset [Thu, 21 Mar 2019 11:42:44 +0000 (12:42 +0100)]
ac: fix incorrect argument type for tbuffer.{load,store} with LLVM 7
GLC/SLC are boolean.
This fixes the following LLVM error when checkir is set:
Intrinsic has incorrect argument type!
void (i32, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32)* @llvm.amdgcn.tbuffer.store.i32
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl
Samuel Pitoiset [Thu, 21 Mar 2019 10:59:37 +0000 (11:59 +0100)]
ac: fix 16-bit shifts
This fixes the following LLVM error when ckeckir is set:
Type too small for ZExt
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl
Samuel Pitoiset [Thu, 21 Mar 2019 08:19:06 +0000 (09:19 +0100)]
ac: add 16-bit support to fract
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 21 Mar 2019 09:14:30 +0000 (10:14 +0100)]
ac: add 16-bit support fo fsign
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 21 Mar 2019 09:14:29 +0000 (10:14 +0100)]
ac: add f16_0 and f16_1 constants
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Timothy Arceri [Tue, 19 Mar 2019 01:09:36 +0000 (12:09 +1100)]
nir: only override previous alu during loop analysis if supported
Users of this function expect alu to be a supported comparision
if the induction variable is not NULL. Since we attempt to
override the return values if the first limit is not a const, we
must make sure we are dealing with a valid comparision before
overriding the alu instruction.
Fixes an unreachable in inverse_comparison() with the game
Assasins Creed Odyssey.
Fixes:
3235a942c16b ("nir: find induction/limit vars in iand instructions")
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110216
Michel Dänzer [Wed, 20 Mar 2019 10:00:06 +0000 (11:00 +0100)]
gitlab-ci: Use 8 CPU cores in autotools job
This cuts down the job runtime from ~9.5 to ~7 minutes with my personal
runner on an 8-core Ryzen 7 1700.
While this might result in slightly higher load on shared runners, it
should be OK, since libtool doesn't use the CPU cores as effectively as
e.g. ninja does; a significant part of the CPU load tends to be in bash
processes at any time, which should be relatively light on memory.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Michel Dänzer [Wed, 20 Mar 2019 14:58:31 +0000 (15:58 +0100)]
gitlab-ci: List some longer-running jobs before others of the same stage
This increases the chance of them running earlier, which can have an
impact on the total duration of the pipeline.
v2:
* Minor style fix-up to moved comment (Eric Anholt)
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Eric Anholt <eric@anholt.net>
Samuel Pitoiset [Thu, 21 Mar 2019 07:59:54 +0000 (08:59 +0100)]
radv: add missing initializations since VK_EXT_pipeline_creation_feedback
This fixes the world.
Fixes:
5f5ac19f138 ("radv: Implement VK_EXT_pipeline_creation_feedback.")"
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Rhys Perry [Thu, 6 Dec 2018 13:33:48 +0000 (13:33 +0000)]
radv: enable VK_KHR_8bit_storage
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Rhys Perry [Thu, 6 Dec 2018 14:38:52 +0000 (14:38 +0000)]
ac/nir: implement 8-bit conversions
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Rhys Perry [Fri, 7 Dec 2018 14:52:29 +0000 (14:52 +0000)]
ac/nir: add 8-bit types to glsl_base_to_llvm_type
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Rhys Perry [Thu, 6 Dec 2018 14:57:40 +0000 (14:57 +0000)]
ac/nir: implement 8-bit ssbo stores
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Wed, 13 Mar 2019 15:08:32 +0000 (16:08 +0100)]
ac: add ac_build_tbuffer_store_byte() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Rhys Perry [Thu, 6 Dec 2018 13:56:01 +0000 (13:56 +0000)]
ac/nir: implement 8-bit push constant, ssbo and ubo loads
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Wed, 13 Mar 2019 14:55:42 +0000 (15:55 +0100)]
ac: add ac_build_tbuffer_load_byte() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Wed, 13 Mar 2019 14:53:51 +0000 (15:53 +0100)]
ac: add various int8 definitions
Original patch by Rhys Perry.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tapani Pälli [Tue, 19 Mar 2019 09:01:53 +0000 (11:01 +0200)]
anv/radv: release memory allocated by glsl types during spirv_to_nir
Fixes leaks for each glsl_type generated:
==32470== 384 bytes in 3 blocks are possibly lost in loss record 18 of 18
==32470== at 0x483880B: malloc (vg_replace_malloc.c:309)
==32470== by 0x4C43F4A: ralloc_size (ralloc.c:119)
==32470== by 0x4C44014: rzalloc_size (ralloc.c:151)
==32470== by 0x4C44258: rzalloc_array_size (ralloc.c:215)
==32470== by 0x4D38957: glsl_type::glsl_type(glsl_struct_field const*, unsigned int, char const*) (glsl_types.cpp:114)
==32470== by 0x4D3BEED: glsl_type::get_struct_instance(glsl_struct_field const*, unsigned int, char const*) (glsl_types.cpp:1146)
==32470== by 0x4D42ECC: glsl_struct_type (nir_types.cpp:501)
==32470== by 0x4CDB5A1: vtn_handle_type (spirv_to_nir.c:1269)
==32470== by 0x4CE53DD: vtn_handle_variable_or_type_instruction (spirv_to_nir.c:4018)
==32470== by 0x4CD8CFF: vtn_foreach_instruction (spirv_to_nir.c:365)
==32470== by 0x4CE5E6B: spirv_to_nir (spirv_to_nir.c:4490)
==32470== by 0x497AF10: anv_shader_compile_to_nir (anv_pipeline.c:173)
v2: move release call to vkDestroyInstance
v3: apply fix also to radv driver
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jason Ekstrand [Tue, 19 Mar 2019 19:14:17 +0000 (14:14 -0500)]
spirv: Drop inline tg4 lowering
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Jason Ekstrand [Tue, 19 Mar 2019 18:55:21 +0000 (13:55 -0500)]
anv,radv,turnip: Lower TG4 offsets with nir_lower_tex
v2: turn on for turnip as well (Karol Herbst)
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Karol Herbst [Tue, 19 Mar 2019 17:47:20 +0000 (18:47 +0100)]
nir/lower_tex: Add support for tg4 offsets lowering
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Karol Herbst [Mon, 18 Mar 2019 20:25:13 +0000 (21:25 +0100)]
nv50/ir/nir: support gather offsets
v2: only emit offsets if those are !0
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Karol Herbst [Mon, 18 Mar 2019 20:23:59 +0000 (21:23 +0100)]
nir: add support for gather offsets
Values inside the offsets parameter of textureGatherOffsets are required to be
constants in the range of [GL_MIN_PROGRAM_TEXTURE_GATHER_OFFSET,
GL_MAX_PROGRAM_TEXTURE_GATHER_OFFSET].
As this range is never outside [-32, 31] for all existing drivers inside mesa,
we can simply store the offsets as a int8_t[4][2] array inside nir_tex_instr.
Right now only Nvidia hardware supports this in hardware, so we can turn this
on inside Nouveau for the NIR path as it is already enabled with the TGSI one.
v2: use memcpy instead of for loops
add missing bits to nir_instr_set
don't show offsets if they are all 0
v3: default offsets aren't all 0
v4: rename offsets -> tg4_offsets
rename nir_tex_instr_has_explicit_offsets -> nir_tex_instr_has_explicit_tg4_offsets
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Dave Airlie [Tue, 5 Mar 2019 05:14:29 +0000 (15:14 +1000)]
nir/deref: remove casts of casts which are likely redundant (v3)
Not sure how ptr_stride should be taken into account if at all here
v2: reorder check to avoid src walking (Jason)
v3: remove is_cast_cast checks, keep going afterwards (Jason)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Dave Airlie [Tue, 19 Mar 2019 22:19:45 +0000 (08:19 +1000)]
nir/spirv: don't use bare types, remove assert in split vars for testing
For OpenCL we never want to strip the info from the types, and it makes
type comparisons easier in later stages. We might later need a nir pass to
strip this for GLSL, but so far the only regression is the assert and Jason
said removing that is fine.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Rafael Antognolli [Fri, 8 Mar 2019 18:58:41 +0000 (10:58 -0800)]
iris: Let blorp update the clear color for us.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Tue, 19 Mar 2019 19:47:58 +0000 (12:47 -0700)]
iris: Track fast clear color.
v2: Update tracked clear color when we update the surface state.
v3: Update all aux surface states when updating the clear color.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Thu, 7 Mar 2019 01:06:13 +0000 (17:06 -0800)]
iris: Stall on the CPU and resolve predication during fast clears.
Only if the clear color/depth is changing. In those cases, it's hard to
keep track of the current clear color, and aux state of some layers,
when predication is enabled. So simplify everything by stalling on the
few cases where we would have a fast clear color change with
predication.
v2:
- fix comment (Ken)
- explicitly check for predicate state after resolving it (Ken)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Thu, 7 Mar 2019 00:59:44 +0000 (16:59 -0800)]
iris: Add iris_resolve_conditional_render().
This function can be used to stall on the CPU and resolve the predicate
for the conditional render. It will convert ice->state.predicate from
IRIS_PREDICATE_STATE_USE_BIT to either IRIS_PREDICATE_STATE_RENDER or
IRIS_PREDICATE_STATE_DONT_RENDER, depending on the result of the query.
v2:
- return void (Ken)
- update the stored condition (Ken)
- simplify the code leading to resolve the predicate (Ken)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Wed, 20 Feb 2019 00:07:09 +0000 (16:07 -0800)]
iris: Implement fast clear color.
If all the restrictions are satisfied, do a fast clear instead of
regular clear.
v2:
- add perf_debug() when we can't fast clear (Ken)
- improve comment: s/miptree/resource/ (Ken)
- use swizzle_color_value from blorp (Ken)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Wed, 20 Mar 2019 15:41:06 +0000 (08:41 -0700)]
intel/blorp: Make swizzle_color_value public.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Fri, 8 Mar 2019 22:01:58 +0000 (14:01 -0800)]
intel/isl: Add isl_format_has_color_component() function.
v2: Get luminance bits from luminance component (Ken).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Thu, 7 Mar 2019 16:23:08 +0000 (08:23 -0800)]
iris: Bring back check for srgb and fast clear color.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Fri, 1 Mar 2019 18:34:40 +0000 (10:34 -0800)]
iris: Add function to update clear color in surface state.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Thu, 28 Feb 2019 19:11:24 +0000 (11:11 -0800)]
iris: Add helper to convert fast clear color.
It needs to be converted to a value that can be used by ISL (and our
hardware SURFACE_STATE structure).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Tue, 26 Feb 2019 20:08:23 +0000 (12:08 -0800)]
iris: Fast clear depth buffers.
Check and do a fast clear instead of a regular clear on depth buffers.
v3:
- remove swith with some cases that we shouldn't wory about (Ken)
- more parens into the has_hiz check (Ken)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Tue, 26 Feb 2019 20:02:35 +0000 (12:02 -0800)]
iris: Use the clear depth when emitting 3DSTATE_CLEAR_PARAMS.
Take the clear depth into account when IRIS_DIRTY_DEPTH_BUFFER is marked
as dirty.
Also update the blorp surface clear color.
v2: Use a single if (zres && zres->aux.bo) (Ken).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Fri, 15 Feb 2019 22:45:05 +0000 (14:45 -0800)]
iris: Allocate buffer space for the fast clear color.
Also store clear color in the iris_resource.
Always allocate clear color state buffer.
v2:
- Make clear_color_offset be 64 bits (Ken).
- Simplify the logic to decide when to memset the aux buffer (Ken).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bas Nieuwenhuizen [Tue, 19 Mar 2019 01:30:33 +0000 (02:30 +0100)]
radv: Implement VK_EXT_pipeline_creation_feedback.
Does what it says on the tin.
The per stage time is only an approximation due to linking and
the Vega merged stages.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Samuel Pitoiset [Tue, 12 Mar 2019 13:07:16 +0000 (14:07 +0100)]
ac: use new LLVM 8 intrinsics in ac_build_buffer_store_dword()
New buffer intrinsics have a separate soffset parameter.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Wed, 13 Mar 2019 13:52:27 +0000 (14:52 +0100)]
ac: use new LLVM 8 intrinsic when storing 16-bit values
vindex is always 0.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Wed, 13 Mar 2019 13:48:53 +0000 (14:48 +0100)]
ac: add ac_build_{struct,raw}_tbuffer_store() helpers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>