OSDN Git Service
Keith Wyss [Tue, 7 Nov 2017 00:28:28 +0000 (00:28 +0000)]
[XRay] Minimal tool to convert xray traces to Chrome's Trace Event Format.
Minimal tool to convert xray traces to Chrome's Trace Event Format.
Summary:
Make use of Chrome Trace Event format's Duration events and stack frame dict to
produce Json files that chrome://tracing can visualize from xray function call
traces. Trace Event format is more robust and has several features like
argument logging, function categorization, multi process traces, etc. that we
can add as needed. Duration events cover an important base case.
Part of this change is rearranging the code so that the TrieNode data structure
can be used from multiple tools and can carry parameterized baggage on the
nodes. I put the actual behavior changes in llvm-xray convert exclusively.
Exploring the trace of instrumented llc was pretty nifty if overwhelming.
I can envision this being very useful for analyzing contention scenarios or
tuning parameters like batch sizes in a producer consumer queue. For more
targeted traces likemthis, let's talk about how we want to approach trace
pruning.
Reviewers: dberris, pelikan
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39362
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317531
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Tue, 7 Nov 2017 00:09:25 +0000 (00:09 +0000)]
[IPO/LowerTypesTest] Skip blockaddress(es) when replacing uses.
Blockaddresses refer to the function itself, therefore replacing them
would cause an assertion in doRAUW.
Fixes https://bugs.llvm.org/show_bug.cgi?id=35201
This was found when trying CFI on a proprietary kernel by Dmitry Mikulin.
Differential Revision: https://reviews.llvm.org/D39695
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317527
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 7 Nov 2017 00:06:32 +0000 (00:06 +0000)]
AMDGPU: Remove redundant combine
This combine was already done in two places. The
generic combiner already has done this since
r217610, for adds (with a single use).
This one was added in r303641, and added support for handling
or as well. r313251 later added support to the generic
combine for or. It also turns out the isOrEquivalentToAdd
check is not necessary for this combine.
Additionally, we already reproduce this combine in yet
another place in the backend, although in that version
multiple uses of the add are still folded if it will
allow a fold into the addressing mode. That version needs
to be improved to understand ors though, as well as the
correct legal offsets for private.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317526
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Mon, 6 Nov 2017 23:15:21 +0000 (23:15 +0000)]
[DebugInfo] Unify logic to merge DILocations. NFC.
This makes DILocation::getMergedLocation() do what its comment says it
does when merging locations for an Instruction: set the common inlineAt
scope. This simplifies Instruction::applyMergedLocation() a bit.
Testing: check-llvm, check-clang
Differential Revision: https://reviews.llvm.org/D39628
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317524
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Dardis [Mon, 6 Nov 2017 23:01:46 +0000 (23:01 +0000)]
[Support][Chrono] Use explicit cast of text output of time values.
rL316419 exposed a platform specific issue where the type of the values
passed to llvm::format could be different to the format string.
Debian unstable for mips uses long long int for std::chrono:duration,
while x86_64 uses long int.
For mips, this resulted in the value being corrupted when rendered to a
string. Address this by explicitly casting the result of the duration_cast
to the type specified in the format string.
Reviewers: sammccall
Differential Revision: https://reviews.llvm.org/D39597
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317523
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Mon, 6 Nov 2017 22:49:39 +0000 (22:49 +0000)]
InstCombine: salvage the debug info of DCE'ed add instructions.
rdar://problem/
31209283
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317522
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 6 Nov 2017 22:49:04 +0000 (22:49 +0000)]
[X86] Make FeatureAVX512 imply FeatureF16C.
The EVEX to VEX pass is already assuming this is true under AVX512VL. We had special patterns to use zmm instructions if VLX and F16C weren't available.
Instead just make AVX512 imply F16C to make the EVEX to VEX behavior explicitly legal and remove the extra patterns.
All known CPUs with AVX512 have F16C so this should safe for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317521
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 6 Nov 2017 22:49:01 +0000 (22:49 +0000)]
[X86] Make FeatureAVX512 imply FeatureFMA.
Previously our VEX patterns were checking Subtarget.hasFMA() which checked FMA || AVX512. So we were behaving as if AVX512 implied it anyway. Which means we'd allow VEX encoded 128/256 FMA when AVX512F was enabled but AVX512VL is off. Regardless of the FMA flag.
EVEX to VEX also transforms scalar EVEX FMA instructions to their VEX versions even without the FMA flag. Similarly for 128/256 under AVX512VL.
So this makes AVX512 imply FeatureFMA to make our current behavior explicit.
All known CPUs that support AVX512 have VEX FMA instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317520
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 6 Nov 2017 22:40:09 +0000 (22:40 +0000)]
[ValueTracking] readonly (const) is a requirement for converting sqrt to llvm.sqrt; nnan is not
As discussed in D39204, this is effectively a revert of rL265521 which required nnan
to vectorize sqrt libcalls based on the old LangRef definition of llvm.sqrt. Now that
the definition has been updated so the libcall and intrinsic have the same semantics
apart from potentially setting errno, we can remove the nnan requirement.
We have the right check to know that errno is not set:
if (!ICS.onlyReadsMemory())
...ahead of the switch.
This will solve https://bugs.llvm.org/show_bug.cgi?id=27435 assuming that's being
built for a target with -fno-math-errno.
Differential Revision: https://reviews.llvm.org/D39642
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317519
91177308-0d34-0410-b5e6-
96231b3b80d8
Hans Wennborg [Mon, 6 Nov 2017 22:28:02 +0000 (22:28 +0000)]
Revert r317510 "[InstCombine] Pull shifts through a select plus binop with constant"
This broke the CodeGen/Hexagon/loop-idiom/pmpy-mod.ll test on a bunch of buildbots.
> This pulls shifts through a select+binop with a constant where the select conditionally executes the binop. We already do this for just the binop, but not with the select.
>
> This can allow us to get the select closer to other selects to enable removing one.
>
> Differential Revision: https://reviews.llvm.org/D39222
>
> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317510
91177308-0d34-0410-b5e6-
96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317518
91177308-0d34-0410-b5e6-
96231b3b80d8
Hans Wennborg [Mon, 6 Nov 2017 22:17:23 +0000 (22:17 +0000)]
Revert r316064 "Fix the incorrect detection of ICONV_LIBRARY_PATH"
This broke the use of libxml2 on machines where iconv() is provided by libc.
I'll follow up on the mailing list to discuss how to fix this properly.
> This is introduced in rL308711.
> Check for c library is incorrect here just because libc will be found always
> and it does not mean that iconv is presented.
>
> Thank to Andrew Krasny for narrowing down the root cause.
>
> Reviewers: ecbeckmann
> Reviewed By: ecbeckmann
> Subscribers: mgorny, llvm-commits
> Differential Revision: https://reviews.llvm.org/D38875
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317517
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Mon, 6 Nov 2017 21:57:51 +0000 (21:57 +0000)]
Fix comment /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317514
91177308-0d34-0410-b5e6-
96231b3b80d8
Bjorn Pettersson [Mon, 6 Nov 2017 21:46:06 +0000 (21:46 +0000)]
[MIRPrinter] Use %subreg.xxx syntax for subregister index operands
Summary:
Print %subreg.<subregidxname> instead of just the subregister
index when printing immediate operands corresponding to subreg
indices in INSERT_SUBREG, EXTRACT_SUBREG, SUBREG_TO_REG and
REG_SEQUENCE.
Reviewers: qcolombet, MatzeB
Reviewed By: MatzeB
Subscribers: nhaehnle, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D39696
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317513
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 6 Nov 2017 21:07:22 +0000 (21:07 +0000)]
[InstCombine] Pull shifts through a select plus binop with constant
This pulls shifts through a select+binop with a constant where the select conditionally executes the binop. We already do this for just the binop, but not with the select.
This can allow us to get the select closer to other selects to enable removing one.
Differential Revision: https://reviews.llvm.org/D39222
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317510
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Mon, 6 Nov 2017 21:06:09 +0000 (21:06 +0000)]
update_mir_test_checks: Be careful about replacing entire vregs
Previously, this could end up replacing a vreg like %14 with
[[VREG1]]4, where VREG1 was the match for %1. That's obviously not
correct, though it hasn't actually come up in any tests I've converted
so far.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317509
91177308-0d34-0410-b5e6-
96231b3b80d8
Graham Yiu [Mon, 6 Nov 2017 21:04:19 +0000 (21:04 +0000)]
Fix buildbot breakages from r317503. Add parentheses to assignment when using result as a condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317508
91177308-0d34-0410-b5e6-
96231b3b80d8
Graham Yiu [Mon, 6 Nov 2017 20:18:30 +0000 (20:18 +0000)]
Adds code to PPC ISEL lowering to recognize byte inserts from vector_shuffles, and use P9 shift and vector insert byte instructions instead of vperm. Extends tests from vector insert half-word.
Differential Revision: https://reviews.llvm.org/D34497
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317503
91177308-0d34-0410-b5e6-
96231b3b80d8
Dehao Chen [Mon, 6 Nov 2017 19:52:49 +0000 (19:52 +0000)]
Include already promoted counts when computing SUM for VP.
Summary: When computing the SUM for indirect call promotion, if the callsite is already promoted in the profile, it will be promoted before ICP. In the current implementation, ICP only sees remaining counts in SUM. This may cause extra indirect call targets being promoted. This patch updates the SUM to include the counts already promoted earlier. This way we do not end up promoting too many indirect call targets.
Reviewers: tejohnson
Reviewed By: tejohnson
Subscribers: llvm-commits, sanjoy
Differential Revision: https://reviews.llvm.org/D38763
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317502
91177308-0d34-0410-b5e6-
96231b3b80d8
Mitch Phillips [Mon, 6 Nov 2017 19:14:09 +0000 (19:14 +0000)]
[cfi-verify] Added a simple check that stops division-by-zero error when no indirect CF instructions are found in the provided file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317500
91177308-0d34-0410-b5e6-
96231b3b80d8
Guozhi Wei [Mon, 6 Nov 2017 19:09:38 +0000 (19:09 +0000)]
[PPC] Use xxbrd to speed up bswap64
Power doesn't have bswap instructions, so llvm generates following code sequence for bswap64.
rotldi 5, 3, 16
rotldi 4, 3, 8
rotldi 9, 3, 24
rotldi 10, 3, 32
rotldi 11, 3, 48
rotldi 12, 3, 56
rldimi 4, 5, 8, 48
rldimi 4, 9, 16, 40
rldimi 4, 10, 24, 32
rldimi 4, 11, 40, 16
rldimi 4, 12, 48, 8
rldimi 4, 3, 56, 0
But Power9 has vector bswap instructions, they can also be used to speed up scalar bswap intrinsic. With this patch, bswap64 can be translated to:
mtvsrdd 34, 3, 3
xxbrd 34, 34
mfvsrld 3, 34
Differential Revision: https://reviews.llvm.org/D39510
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317499
91177308-0d34-0410-b5e6-
96231b3b80d8
Mitch Phillips [Mon, 6 Nov 2017 18:56:36 +0000 (18:56 +0000)]
Make MCAsmBackend and MCCodeEmiiter passed by unique_ptr rval
Summary: Fixes build breakage of llvm-mc-assemble-fuzzer introduced by rL315531.
Reviewers: lhames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39268
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317498
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 6 Nov 2017 17:04:37 +0000 (17:04 +0000)]
AMDGPU: Select v_mad_u64_u32 and v_mad_i64_i32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317492
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Mon, 6 Nov 2017 16:52:05 +0000 (16:52 +0000)]
Canonicalize spelling of long-form-options in dsymutil.rst
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317490
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 6 Nov 2017 16:27:15 +0000 (16:27 +0000)]
[IR] redefine 'UnsafeAlgebra' / 'reassoc' fast-math-flags and add 'trans' fast-math-flag
As discussed on llvm-dev:
http://lists.llvm.org/pipermail/llvm-dev/2016-November/107104.html
and again more recently:
http://lists.llvm.org/pipermail/llvm-dev/2017-October/118118.html
...this is a step in cleaning up our fast-math-flags implementation in IR to better match
the capabilities of both clang's user-visible flags and the backend's flags for SDNode.
As proposed in the above threads, we're replacing the 'UnsafeAlgebra' bit (which had the
'umbrella' meaning that all flags are set) with a new bit that only applies to algebraic
reassociation - 'AllowReassoc'.
We're also adding a bit to allow approximations for library functions called 'ApproxFunc'
(this was initially proposed as 'libm' or similar).
...and we're out of bits. 7 bits ought to be enough for anyone, right? :) FWIW, I did
look at getting this out of SubclassOptionalData via SubclassData (spacious 16-bits),
but that's apparently already used for other purposes. Also, I don't think we can just
add a field to FPMathOperator because Operator is not intended to be instantiated.
We'll defer movement of FMF to another day.
We keep the 'fast' keyword. I thought about removing that, but seeing IR like this:
%f.fast = fadd reassoc nnan ninf nsz arcp contract afn float %op1, %op2
...made me think we want to keep the shortcut synonym.
Finally, this change is binary incompatible with existing IR as seen in the
compatibility tests. This statement:
"Newer releases can ignore features from older releases, but they cannot miscompile
them. For example, if nsw is ever replaced with something else, dropping it would be
a valid way to upgrade the IR."
( http://llvm.org/docs/DeveloperPolicy.html#ir-backwards-compatibility )
...provides the flexibility we want to make this change without requiring a new IR
version. Ie, we're not loosening the FP strictness of existing IR. At worst, we will
fail to optimize some previously 'fast' code because it's no longer recognized as
'fast'. This should get fixed as we audit/squash all of the uses of 'isFast()'.
Note: an inter-dependent clang commit to use the new API name should closely follow
commit.
Differential Revision: https://reviews.llvm.org/D39304
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317488
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 6 Nov 2017 15:28:25 +0000 (15:28 +0000)]
[X86][SSE] Merge combineExtractVectorElt_SSE into combineExtractVectorElt. NFCI.
We still early-out for X86ISD::PEXTRW/X86ISD::PEXTRB so no actual change in behaviour, but it'll make it easier to add support in a future patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317485
91177308-0d34-0410-b5e6-
96231b3b80d8
Alexey Bataev [Mon, 6 Nov 2017 14:52:57 +0000 (14:52 +0000)]
[SLP] Test for PR35047, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317482
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 6 Nov 2017 14:34:19 +0000 (14:34 +0000)]
[X86][SSE] Combine EXTRACT_VECTOR_ELT with combineExtractWithShuffle before XFormVExtractWithShuffleIntoLoad
combineExtractWithShuffle can handle more complex shuffles/bitcasts than we can with the equivalent code in XFormVExtractWithShuffleIntoLoad.
Mainly a compile time improvement now (combineExtractWithShuffle combines will have always failed late on inside XFormVExtractWithShuffleIntoLoad), and will let us merge combineExtractVectorElt_SSE in a future commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317481
91177308-0d34-0410-b5e6-
96231b3b80d8
Yaxun Liu [Mon, 6 Nov 2017 14:32:33 +0000 (14:32 +0000)]
[AMDGPU] Change alloca addr space of r600 to 5 for amdgiz environment
Differential Revision: https://reviews.llvm.org/D39657
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317479
91177308-0d34-0410-b5e6-
96231b3b80d8
Jonas Paulsson [Mon, 6 Nov 2017 13:10:31 +0000 (13:10 +0000)]
[SystemZ] implement hasDivRemOp()
SystemZ can do division and remainder in a single instruction for scalar
integer types, which are now reflected by returning true in this hook for
those cases.
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317477
91177308-0d34-0410-b5e6-
96231b3b80d8
Yaxun Liu [Mon, 6 Nov 2017 13:01:33 +0000 (13:01 +0000)]
[AMDGPU] Fix assertion due to assuming pointer in default addr space is 32 bit
The backend assumes pointer in default addr space is 32 bit, which is not
true for the new addr space mapping and causes assertion for unresolved
functions.
This patch fixes that.
Differential Revision: https://reviews.llvm.org/D39643
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317476
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Dardis [Mon, 6 Nov 2017 12:59:53 +0000 (12:59 +0000)]
[mips] Add movep for microMIPS32R6 and fix microMIPS32r3 version
Previously, the 'movep' instruction was defined for microMIPS32r3 and
shared that definition with microMIPS32R6. 'movep' was re-encoded for
microMIPS32r6, so this patch provides the correct encoding.
Secondly, correct the encoding of the 'rs' and 'rt' operands which have
an instruction specific encoding for the registers those operands accept.
Finally, correct the decoding of the 'dst_regs' operand which was extracting
the relevant field from the instruction, but was actually extracting the
field from the alreadly extracted field.
Reviewers: atanasyan
Differential Revision: https://reviews.llvm.org/D39495
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317475
91177308-0d34-0410-b5e6-
96231b3b80d8
Jonas Devlieghere [Mon, 6 Nov 2017 11:47:24 +0000 (11:47 +0000)]
[docs] Update code block for compatibility with Sphinx 1.5.1
It is currently not possible to build the documentation with cmake and
the same version of Sphinx (1.5.1) used to generate the public facing
documentation on llvm.org. When code blocks cannot be parsed by
Pygments, it generates a warning which is treated as an error.
In addition to being annoying and confusing for developers, this
needlessly increases the bar for newcomers that want to get involved.
This patch removes the language specifier from the affected block. The
result is the same as when parsing fails: the block are not highlighted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317472
91177308-0d34-0410-b5e6-
96231b3b80d8
Mohammed Agabaria [Mon, 6 Nov 2017 10:56:20 +0000 (10:56 +0000)]
[LV][X86] update the cost of interleaving mem. access of floats
Recommit:
This patch contains update of the costs of interleaved loads of v8f32 of stride 3 and 8.
fixed the location of the lit test it works with make check-all.
Differential Revision: https://reviews.llvm.org/D39403
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317471
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Dardis [Mon, 6 Nov 2017 10:50:04 +0000 (10:50 +0000)]
[mips] Fix PR35140
Mark all symbols involved with TLS relocations as being TLS symbols.
This resolves PR35140.
Thanks to Alex Crichton for reporting the issue!
Reviewers: atanasyan
Differential Revision: https://reviews.llvm.org/D39591
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317470
91177308-0d34-0410-b5e6-
96231b3b80d8
Raphael Isemann [Mon, 6 Nov 2017 09:51:39 +0000 (09:51 +0000)]
Fixed dead links in WritingAnLLVMPass.rst
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317467
91177308-0d34-0410-b5e6-
96231b3b80d8
Uriel Korach [Mon, 6 Nov 2017 09:22:38 +0000 (09:22 +0000)]
[X86][AVX512] Improve lowering of AVX512 test intrinsics
Added TESTM and TESTNM to the list of instructions that already zeroing unused upper bits
and does not need the redundant shift left and shift right instructions afterwards.
Added a pattern for TESTM and TESTNM in iselLowering, so now icmp(neq,and(X,Y), 0) goes folds into TESTM
and icmp(eq,and(X,Y), 0) goes folds into TESTNM
This commit is a preparation for lowering the test and testn X86 intrinsics to IR.
Differential Revision: https://reviews.llvm.org/D38732
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317465
91177308-0d34-0410-b5e6-
96231b3b80d8
Uriel Korach [Mon, 6 Nov 2017 08:32:45 +0000 (08:32 +0000)]
[X86] Replace duplicate function call with variable. NFC
Change from:
if (N->getOperand(0).getValueType() == MVT::v8i32 ||
N->getOperand(0).getValueType() == MVT::v8f32)
to:
EVT OpVT = N->getOperand(0).getValueType();
if (OpVT == MVT::v8i32 || OpVT == MVT::v8f32)
Change-Id: I5a105f8710b73a828e6cfcd55fac2eae6153ce25
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317464
91177308-0d34-0410-b5e6-
96231b3b80d8
Zvi Rackover [Mon, 6 Nov 2017 08:25:46 +0000 (08:25 +0000)]
X86 ISel: Basic support for variable-index vector permutations
Summary:
Try to lower a BUILD_VECTOR composed of extract-extract chains that can be
reasoned to be a permutation of a vector by indices in a non-constant vector.
We saw this pattern created by ISPC, which resolts to creating it due to the
requirement that shufflevector's mask operand be a *constant* vector.
I didn't check this but we could possibly use this pattern for lowering the X86 permute
C-instrinsics instead of llvm.x86 instrinsics.
This change can be followed by more improvements:
1. Handle vectors with undef elements.
2. Utilize pshufb and zero-mask-blending to support more effiecient
construction of vectors with constant-0 elements.
3. Use smaller-element vectors of same width, and "interpolate" the indices,
when no native operation available.
Reviewers: RKSimon, craig.topper
Reviewed By: RKSimon
Subscribers: chandlerc, DavidKreitzer
Differential Revision: https://reviews.llvm.org/D39126
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317463
91177308-0d34-0410-b5e6-
96231b3b80d8
Jina Nahias [Mon, 6 Nov 2017 07:48:58 +0000 (07:48 +0000)]
Revert "adding a pattern for broadcastm"
This reverts commit r317457.
Change-Id: If07f1fca1e3453d16c1dac906e87768661384e91
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317462
91177308-0d34-0410-b5e6-
96231b3b80d8
Martin Storsjo [Mon, 6 Nov 2017 07:36:17 +0000 (07:36 +0000)]
[test] Add test files that were missed from SVN r317459
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317461
91177308-0d34-0410-b5e6-
96231b3b80d8
Martin Storsjo [Mon, 6 Nov 2017 07:20:58 +0000 (07:20 +0000)]
[ObjectYAML] Map relocation types for COFF ARMNT and ARM64
Differential Revision: https://reviews.llvm.org/D39668
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317459
91177308-0d34-0410-b5e6-
96231b3b80d8
Jina Nahias [Mon, 6 Nov 2017 07:09:24 +0000 (07:09 +0000)]
[x86][AVX512] Lowering Broadcastm intrinsics to LLVM IR
This patch, together with a matching clang patch (https://reviews.llvm.org/D38683), implements the lowering of X86 broadcastm intrinsics to IR.
Differential Revision: https://reviews.llvm.org/D38684
Change-Id: I709ac0b34641095397e994c8ff7e15d1315b3540
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317458
91177308-0d34-0410-b5e6-
96231b3b80d8
Jina Nahias [Mon, 6 Nov 2017 07:09:09 +0000 (07:09 +0000)]
adding a pattern for broadcastm
Change-Id: I6551fb13879e098aed74de410e29815cf37d9ab5
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317457
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 6 Nov 2017 05:48:26 +0000 (05:48 +0000)]
[X86] Use EVEX encoded intrinsics for legacy FMA intrinsics when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317454
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 6 Nov 2017 05:48:25 +0000 (05:48 +0000)]
[X86] Add scalar FMA ISD nodes without rounding mode. NFC
Next step is to use them for the legacy FMA scalar intrinsics as well. This will enable the legacy intrinsics to use EVEX encoded opcodes and the extended registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317453
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 6 Nov 2017 05:48:24 +0000 (05:48 +0000)]
[X86] Add avx512vl command line to fma-instrinsics-x86.ll
Some of these demonstrate a missed EVEX to VEX compression because we aren't prefering EVEX instructions during isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317452
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 6 Nov 2017 05:48:23 +0000 (05:48 +0000)]
[X86] Simplify command lines on the fma-instrinsics-x86.ll test and add -show-mc-encoding.
Use feature names instead of CPU names.
A future commit will add avx512vl command lines to demonstrate missed use of EVEX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317451
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 6 Nov 2017 04:04:01 +0000 (04:04 +0000)]
[X86] Use EVEX encoded instructions for legacy scalar sqrt intrinsics.
Fixes PR35161.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317445
91177308-0d34-0410-b5e6-
96231b3b80d8
David L. Jones [Mon, 6 Nov 2017 00:32:01 +0000 (00:32 +0000)]
[PassManager, SimplifyCFG] Revert r316908 and r316869.
These cause Clang to crash with a segfault. See PR35210 for details.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317444
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 5 Nov 2017 21:14:06 +0000 (21:14 +0000)]
[X86] Add missing predicate to a pattern. NFC
Other patterns had higher priority so this wasn't noticed. But we shouldn't be dependent on pattern order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317442
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 5 Nov 2017 21:14:05 +0000 (21:14 +0000)]
[X86] Remove some more RCP and RSQRT patterns from InstrAVX512.td that I missed in r317413.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317441
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 5 Nov 2017 21:14:04 +0000 (21:14 +0000)]
[X86] Fix outdated comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317440
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 5 Nov 2017 19:48:24 +0000 (19:48 +0000)]
[X86][SSE] Tests for integer min/max horizontal reductions
Matching patterns that vectorizers should have created for us.
The experimental intrinsics should probably be added as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317439
91177308-0d34-0410-b5e6-
96231b3b80d8
Dorit Nuzman [Sun, 5 Nov 2017 16:53:15 +0000 (16:53 +0000)]
[LV/LAA] Avoid specializing a loop for stride=1 when this predicate implies a
single-iteration loop
This fixes PR34681. Avoid adding the "Stride == 1" predicate when we know that
Stride >= Trip-Count. Such a predicate will effectively optimize a single
or zero iteration loop, as Trip-Count <= Stride == 1.
Differential Revision: https://reviews.llvm.org/D38785
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317438
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sun, 5 Nov 2017 16:11:01 +0000 (16:11 +0000)]
[SLPVectorizer] minimize tests and auto-generate full checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317437
91177308-0d34-0410-b5e6-
96231b3b80d8
Mohammed Agabaria [Sun, 5 Nov 2017 09:36:54 +0000 (09:36 +0000)]
[REVERT][LV][X86] update the cost of interleaving mem. access of floats
reverted my changes will be committed later after fixing the failure
This patch contains update of the costs of interleaved loads of v8f32 of stride 3 and 8.
Differential Revision: https://reviews.llvm.org/D39403
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317433
91177308-0d34-0410-b5e6-
96231b3b80d8
Mohammed Agabaria [Sun, 5 Nov 2017 09:06:23 +0000 (09:06 +0000)]
[LV][X86] update the cost of interleaving mem. access of floats
This patch contains update of the costs of interleaved loads of v8f32 of stride 3 and 8.
Differential Revision: https://reviews.llvm.org/D39403
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317432
91177308-0d34-0410-b5e6-
96231b3b80d8
Serguei Katkov [Sun, 5 Nov 2017 07:59:02 +0000 (07:59 +0000)]
[CGP] Fix the bug found by asan.
Try to fix the asan failure introduced by r317429.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317431
91177308-0d34-0410-b5e6-
96231b3b80d8
Serguei Katkov [Sun, 5 Nov 2017 05:51:44 +0000 (05:51 +0000)]
[CGP] Extends the scope of optimizeMemoryInst optimization. NFC
Commit tests for previous commit.
Reviewers: efriedma, dberlin, mkazantsev, reames, john.brawn
Reviewed By: john.brawn
Subscribers: javed.absar, john.brawn, dneilson, llvm-commits
Differential Revision: https://reviews.llvm.org/D36073
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317430
91177308-0d34-0410-b5e6-
96231b3b80d8
Serguei Katkov [Sun, 5 Nov 2017 05:50:33 +0000 (05:50 +0000)]
[CGP] Extends the scope of optimizeMemoryInst optimization
This is an implementation of PR26223.
Currently optimizeMemoryInst optimization tries to fold address computation
if all possible way to get compute the address are of the form
baseGV + base + scale * Index + offset
where scale and offset are constants and baseGV, base and Index are exactly
the same instructions if defined.
The patch extends this optimization to allow different bases. In this case
it tries to find/build a Phi node merging all possible bases and use this Phi node
as a base for sunk address computation. Also it supports Select instruction on
the way.
The main motivation for this scope extension is GCRelocateInst.
If there is a relocation of derived pointer it will be represented as relocation of base + offset.
Also there will be a Phi node merging address computation for relocated derived pointer
and derived pointer itself. If we have a Phi node merging original base and relocated base
and can fold the address computation of derived pointer then we can potentially reduce
the code size and Phi node for derived pointer. The later can have a positive impact to
register allocator.
Reviewers: efriedma, dberlin, mkazantsev, reames, john.brawn
Reviewed By: john.brawn
Subscribers: javed.absar, john.brawn, dneilson, llvm-commits
Differential Revision: https://reviews.llvm.org/D36073
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317429
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 4 Nov 2017 21:18:06 +0000 (21:18 +0000)]
[X86][AVX] Regenerate test. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317424
91177308-0d34-0410-b5e6-
96231b3b80d8
Harlan Haskins [Sat, 4 Nov 2017 20:31:20 +0000 (20:31 +0000)]
Use code voice for DIBuilder in LLVM C API
(This is a test commit)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317422
91177308-0d34-0410-b5e6-
96231b3b80d8
Aaron Ballman [Sat, 4 Nov 2017 20:07:16 +0000 (20:07 +0000)]
Move the llvm-tblgen project into the Tablegenning folder on IDEs like Visual Studio rather than leave it in the root directory. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317420
91177308-0d34-0410-b5e6-
96231b3b80d8
Aaron Ballman [Sat, 4 Nov 2017 19:59:14 +0000 (19:59 +0000)]
Move the srpm, ocaml_make_directory, llvm_vcsrevision_h, and llvm-headers projects into the Misc folder on IDEs like Visual Studio rather than leave them in the root directory. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317416
91177308-0d34-0410-b5e6-
96231b3b80d8
Aaron Ballman [Sat, 4 Nov 2017 19:48:17 +0000 (19:48 +0000)]
Move the LLVMCFIVerify project into the Libraries folder on IDEs like Visual Studio rather than leave it in the root directory. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317415
91177308-0d34-0410-b5e6-
96231b3b80d8
Aaron Ballman [Sat, 4 Nov 2017 19:39:14 +0000 (19:39 +0000)]
Move these CMake projects into the Tests folder on IDEs like Visual Studio rather than leave it in the root directory. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317414
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 4 Nov 2017 18:26:41 +0000 (18:26 +0000)]
[X86] Don't use RCP14 and RSQRT14 for reciprocal estimations or for legacy SSE rcp/rsqrt intrinsics when AVX512 features are enabled.
Summary:
AVX512 added RCP14 and RSQRT instructions which improve accuracy over the legacy RCP and RSQRT instruction, but not enough accuracy to remove the need for a Newton Raphson refinement.
Currently we use these new instructions for the legacy packed SSE instrinics, but not the scalar instrinsics. And we use it for fast math optimization of division and reciprocal sqrt.
I think switching the legacy instrinsics maybe surprising to the user since it changes the answer based on which processor you're using regardless of any fastmath settings. It's also weird that we did something different between scalar and packed.
As far at the reciprocal estimation, I think it creates unnecessary deltas in our output behavior (and prevents EVEX->VEX). A little playing around with gcc and icc and godbolt suggest they don't change which instructions they use here.
This patch adds new X86ISD nodes for the RCP14/RSQRT14 and uses those for the new intrinsics. Leaving the old intrinsics to use the old instructions.
Going forward I think our focus should be on
-Supporting 512-bit vectors, which will have to use the RCP14/RSQRT14.
-Using RSQRT28/RCP28 to remove the Newton Raphson step on processors with AVX512ER
-Supporting double precision.
Reviewers: zvi, DavidKreitzer, RKSimon
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39583
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317413
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 4 Nov 2017 18:26:39 +0000 (18:26 +0000)]
[X86] Regenerate a couple more tests that I missed in r317410.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317412
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 4 Nov 2017 18:10:03 +0000 (18:10 +0000)]
[X86] Teach EVEX->VEX pass to turn SHUFI32X4/SHUFF32X4/SHUFI64X/SHUFF64X2 into VPERM2F128/VPERM2I128.
This recovers some of the tests that were changed by r317403.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317410
91177308-0d34-0410-b5e6-
96231b3b80d8
Yaxun Liu [Sat, 4 Nov 2017 17:37:43 +0000 (17:37 +0000)]
[AMDGPU] Remove hardcoded address space value from AMDGPULibFunc
AMDGPULibFunc hardcodes address space values of the old address space mapping,
which causes invalid addrspacecast instructions and undefined functions in
APPSDK sample MonteCarloAsianDP.
This patch fixes that.
Differential Revision: https://reviews.llvm.org/D39616
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317409
91177308-0d34-0410-b5e6-
96231b3b80d8
Sean Fertile [Sat, 4 Nov 2017 17:04:39 +0000 (17:04 +0000)]
[LTO][ThinLTO] Use the linker resolutions to mark global values as dso_local.
Now that we have a way to mark GlobalValues as local we can use the symbol
resolutions that the linker plugin provides as part of lto/thinlto link
step to refine the compilers view on what symbols will end up being local.
Originally commited as r317374, but reverted in r317395 to update some missed
tests.
Differential Revision: https://reviews.llvm.org/D35702
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317408
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Sat, 4 Nov 2017 06:55:55 +0000 (06:55 +0000)]
llvm/test/lit.cfg.py: Don't set the feature "llvm-64-bits" if -m32 is specified.
FIXME: LLVM_BUILD_32_BITS should modify host_triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317404
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 4 Nov 2017 06:44:47 +0000 (06:44 +0000)]
[X86] Teach shuffle lowering to use 256-bit SHUF128 when possible.
This allows masked operations to be used and allows the register allocator to use YMM16-31 if necessary.
As a follow up I'll look into teaching EVEX->VEX how to turn this back into PERM2X128 if any of the additional features don't work out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317403
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Sat, 4 Nov 2017 06:03:29 +0000 (06:03 +0000)]
CMake: Let LLVM_BUILD_32_BITS aware of large file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317402
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Sat, 4 Nov 2017 06:00:11 +0000 (06:00 +0000)]
llvm/test/Object/archive-SYM64-write.test: Delete large temp files. They are 8GiB total.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317401
91177308-0d34-0410-b5e6-
96231b3b80d8
Sean Fertile [Sat, 4 Nov 2017 01:54:20 +0000 (01:54 +0000)]
Revert "[LTO][ThinLTO] Use the linker resolutions to mark global values ..."
Changes more tests then expected on one of the build bots.
reverting to investigate.
This reverts https://llvm.org/svn/llvm-project/llvm/trunk@317374
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317395
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Sat, 4 Nov 2017 00:44:01 +0000 (00:44 +0000)]
[CallSiteSplitting] clang-format my last commit. NFCI.
Thanks to Rui for pointing out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317393
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Fri, 3 Nov 2017 23:03:38 +0000 (23:03 +0000)]
[CallSiteSplitting] Silence GCC's -Wparentheses. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317385
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 3 Nov 2017 22:48:13 +0000 (22:48 +0000)]
[X86] Give unary PERMI priority over SHUF128 in lowerV8I64VectorShuffle to make it possible to fold a load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317382
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Fri, 3 Nov 2017 22:32:11 +0000 (22:32 +0000)]
Move TargetFrameLowering.h to CodeGen where it's implemented
This header already includes a CodeGen header and is implemented in
lib/CodeGen, so move the header there to match.
This fixes a link error with modular codegeneration builds - where a
header and its implementation are circularly dependent and so need to be
in the same library, not split between two like this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317379
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Fri, 3 Nov 2017 21:55:03 +0000 (21:55 +0000)]
Invoke salvageDebugInfo from CodeGenPrepare's SinkCast()
This preserves the debug info for the cast operation in the original location.
rdar://problem/
33460652
Reapplied r317340 with the test moved into an ARM-specific directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317375
91177308-0d34-0410-b5e6-
96231b3b80d8
Sean Fertile [Fri, 3 Nov 2017 21:45:55 +0000 (21:45 +0000)]
[LTO][ThinLTO] Use the linker resolutions to mark global values as dso_local.
Now that we have a way to mark GlobalValues as local we can use the symbol
resolutions that the linker plugin provides as part of lto/thinlto link
step to refine the compilers view on what symbols will end up being local.
Differential Revision: https://reviews.llvm.org/D35702
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317374
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Fri, 3 Nov 2017 21:32:44 +0000 (21:32 +0000)]
Fix a crash in llvm-objdump when printing a bad x86_64 relocation in a Mach-O
file with a bad section number.
rdar://
35207539
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317373
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Fri, 3 Nov 2017 21:30:06 +0000 (21:30 +0000)]
Revert r317046, "Object: Move some code from ELF.h into ELF.cpp."
This change resulted in a measured 1.5-2% perf regression linking
chrome.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317371
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 3 Nov 2017 21:08:13 +0000 (21:08 +0000)]
[SimplifyCFG] When merging conditional stores, don't count the store we're merging against the PHINodeFoldingThreshold
Merging conditional stores tries to check to see if the code is if convertible after the store is moved. But the store hasn't been moved yet so its being counted against the threshold.
The patch adds 1 to the threshold comparison to make sure we don't count the store. I've adjusted a test to use a lower threshold to ensure we still do that conversion with the lower threshold.
Differential Revision: https://reviews.llvm.org/D39570
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317368
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Fri, 3 Nov 2017 20:57:10 +0000 (20:57 +0000)]
GCOV: Move GCOV from IR & Support into ProfileData to fix layering
This class was split between libIR and libSupport, which breaks under
modular code generation. Move it into the one library that uses it,
ProfileData, to resolve this issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317366
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Fri, 3 Nov 2017 20:57:09 +0000 (20:57 +0000)]
llvm-objdump: Fix unused-lambda-capture warning by removing unused lambda capture
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317365
91177308-0d34-0410-b5e6-
96231b3b80d8
Mitch Phillips [Fri, 3 Nov 2017 20:54:26 +0000 (20:54 +0000)]
[cfi-verify] Add blacklist parsing for result filtering.
Adds blacklist parsing behaviour for filtering results into four categories:
- Expected Protected: Things that are not in the blacklist and are protected.
- Unexpected Protected: Things that are in the blacklist and are protected.
- Expected Unprotected: Things that are in the blacklist and are unprotected.
- Unexpected Unprotected: Things that are not in the blacklist and are unprotected.
now can optionally be invoked with a second command line argument, which specifies the blacklist file that the binary was built with.
Current statistics for chromium:
Reviewers: vlad.tsyrklevich
Subscribers: mgorny, llvm-commits, pcc, kcc
Differential Revision: https://reviews.llvm.org/D39525
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317364
91177308-0d34-0410-b5e6-
96231b3b80d8
Jun Bum Lim [Fri, 3 Nov 2017 20:41:16 +0000 (20:41 +0000)]
Recommit r317351 : Add CallSiteSplitting pass
This recommit r317351 after fixing a buildbot failure.
Original commit message:
Summary:
This change add a pass which tries to split a call-site to pass
more constrained arguments if its argument is predicated in the control flow
so that we can expose better context to the later passes (e.g, inliner, jump
threading, or IPA-CP based function cloning, etc.).
As of now we support two cases :
1) If a call site is dominated by an OR condition and if any of its arguments
are predicated on this OR condition, try to split the condition with more
constrained arguments. For example, in the code below, we try to split the
call site since we can predicate the argument (ptr) based on the OR condition.
Split from :
if (!ptr || c)
callee(ptr);
to :
if (!ptr)
callee(null ptr) // set the known constant value
else if (c)
callee(nonnull ptr) // set non-null attribute in the argument
2) We can also split a call-site based on constant incoming values of a PHI
For example,
from :
BB0:
%c = icmp eq i32 %i1, %i2
br i1 %c, label %BB2, label %BB1
BB1:
br label %BB2
BB2:
%p = phi i32 [ 0, %BB0 ], [ 1, %BB1 ]
call void @bar(i32 %p)
to
BB0:
%c = icmp eq i32 %i1, %i2
br i1 %c, label %BB2-split0, label %BB1
BB1:
br label %BB2-split1
BB2-split0:
call void @bar(i32 0)
br label %BB2
BB2-split1:
call void @bar(i32 1)
br label %BB2
BB2:
%p = phi i32 [ 0, %BB2-split0 ], [ 1, %BB2-split1 ]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317362
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Fri, 3 Nov 2017 20:24:19 +0000 (20:24 +0000)]
Modularize: Include some required headers
DenseMaps require the definition of a type to be available when using a
pointer to that type as a key to know how many bits are available for
tombstone/etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317360
91177308-0d34-0410-b5e6-
96231b3b80d8
Martin Storsjo [Fri, 3 Nov 2017 20:09:10 +0000 (20:09 +0000)]
[llvm-ar] Support an options string that start with a dash
Some projects call $AR like "$AR -crs output input1 input2".
Differential Revision: https://reviews.llvm.org/D39538
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317358
91177308-0d34-0410-b5e6-
96231b3b80d8
Aaron Ballman [Fri, 3 Nov 2017 20:05:51 +0000 (20:05 +0000)]
Correcting some CRLFs that snuck in with my previous commit; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317357
91177308-0d34-0410-b5e6-
96231b3b80d8
Aaron Ballman [Fri, 3 Nov 2017 20:01:25 +0000 (20:01 +0000)]
Add llvm::for_each as a range-based extensions to <algorithm> and make use of it in some cases where it is a more clear alternative to std::for_each.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317356
91177308-0d34-0410-b5e6-
96231b3b80d8
Mitch Phillips [Fri, 3 Nov 2017 20:00:05 +0000 (20:00 +0000)]
[cfi-verify] Add an interesting unit test where undef search length changes result.
Add an interesting unit test, found by changing --search-length-undef from the default. Program handles it correctly but good for ensuring correctness on further changes :)
Reviewers: pcc
Subscribers: mgorny, llvm-commits, kcc, vlad.tsyrklevich
Differential Revision: https://reviews.llvm.org/D38658
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317355
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 3 Nov 2017 19:37:41 +0000 (19:37 +0000)]
[X86] Promote athlon, athlon-xp, k8, and k8-sse3 to types instead of subtypes in getHostCPUName. NFCI
This removes the athlon type and simplifies the string decoding. We only really need these type/subtype breaks where we need to match libgcc/compiler-rt and these CPUs aren't part of that.
I'm looking into moving some of this information to a .def file to share with clang's __builtin_cpu_is handling. And while these CPUs aren't part of that the less lines I have to deal with in the .def file the better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317354
91177308-0d34-0410-b5e6-
96231b3b80d8
Jun Bum Lim [Fri, 3 Nov 2017 19:17:11 +0000 (19:17 +0000)]
Revert "Add CallSiteSplitting pass"
Revert due to Buildbot failure.
This reverts commit r317351.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317353
91177308-0d34-0410-b5e6-
96231b3b80d8
Jake Ehrlich [Fri, 3 Nov 2017 19:15:06 +0000 (19:15 +0000)]
Reland "Add support for writing 64-bit symbol tables for archives when offsets become too large for 32-bit"
Tests were failing because some bots were running out of address
space and memory. Additionally the test was very slow. These issues
were solved by changing the test to take advantage of sparse filse and
restricting the test to run only on 64-bit systems.
This should fix https://bugs.llvm.org//show_bug.cgi?id=34189
This change makes it so that if writing a K_GNU style archive, you need
to output a > 32-bit offset it should output in K_GNU64 style instead.
Differential Revision: https://reviews.llvm.org/D36812
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317352
91177308-0d34-0410-b5e6-
96231b3b80d8
Jun Bum Lim [Fri, 3 Nov 2017 19:01:57 +0000 (19:01 +0000)]
Add CallSiteSplitting pass
Summary:
This change add a pass which tries to split a call-site to pass
more constrained arguments if its argument is predicated in the control flow
so that we can expose better context to the later passes (e.g, inliner, jump
threading, or IPA-CP based function cloning, etc.).
As of now we support two cases :
1) If a call site is dominated by an OR condition and if any of its arguments
are predicated on this OR condition, try to split the condition with more
constrained arguments. For example, in the code below, we try to split the
call site since we can predicate the argument (ptr) based on the OR condition.
Split from :
if (!ptr || c)
callee(ptr);
to :
if (!ptr)
callee(null ptr) // set the known constant value
else if (c)
callee(nonnull ptr) // set non-null attribute in the argument
2) We can also split a call-site based on constant incoming values of a PHI
For example,
from :
BB0:
%c = icmp eq i32 %i1, %i2
br i1 %c, label %BB2, label %BB1
BB1:
br label %BB2
BB2:
%p = phi i32 [ 0, %BB0 ], [ 1, %BB1 ]
call void @bar(i32 %p)
to
BB0:
%c = icmp eq i32 %i1, %i2
br i1 %c, label %BB2-split0, label %BB1
BB1:
br label %BB2-split1
BB2-split0:
call void @bar(i32 0)
br label %BB2
BB2-split1:
call void @bar(i32 1)
br label %BB2
BB2:
%p = phi i32 [ 0, %BB2-split0 ], [ 1, %BB2-split1 ]
Reviewers: davidxl, huntergr, chandlerc, mcrosier, eraman, davide
Reviewed By: davidxl
Subscribers: sdesmalen, ashutosh.nema, fhahn, mssimpso, aemerson, mgorny, mehdi_amini, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D39137
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317351
91177308-0d34-0410-b5e6-
96231b3b80d8
Jake Ehrlich [Fri, 3 Nov 2017 18:58:41 +0000 (18:58 +0000)]
[llvm-objcopy] Add support for dwarf fission
This change adds support for dwarf fission.
Differential Revision: https://reviews.llvm.org/D39207
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317350
91177308-0d34-0410-b5e6-
96231b3b80d8
Evandro Menezes [Fri, 3 Nov 2017 18:56:36 +0000 (18:56 +0000)]
[AArch64] Fix the number of iterations for the Newton series
The number of iterations was incorrectly determined for DP FP vector types
and the tests were insufficient to flag this issue.
Differential revision: https://reviews.llvm.org/D39507
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317349
91177308-0d34-0410-b5e6-
96231b3b80d8