OSDN Git Service
Tim Northover [Tue, 5 Jul 2016 21:22:55 +0000 (21:22 +0000)]
TableGen: promote "code" type from syntactic sugar.
It's being immediately converted to a "string", but being able to tell what
type the field was originally can be useful in backends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274575
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Tue, 5 Jul 2016 20:49:50 +0000 (20:49 +0000)]
Transfer ownership of the gold plugin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274574
91177308-0d34-0410-b5e6-
96231b3b80d8
Balaram Makam [Tue, 5 Jul 2016 20:24:05 +0000 (20:24 +0000)]
Revert r259387: "AArch64: Implement missed conditional compare sequences."
This reverts commit r259387 because it inserts illegal code after legalization
in some backends where i64 OR type is illegal for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274573
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 5 Jul 2016 20:11:29 +0000 (20:11 +0000)]
[X86][AVX2] Add support for target shuffle combining to BROADCAST
Only support broadcast from vector register so far - memory folding support will have to wait.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274572
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 5 Jul 2016 18:31:17 +0000 (18:31 +0000)]
[X86][AVX512] Fixed decoding of permd/permpd variable mask shuffles + enabled them for target shuffle combining
Corrected element mask masking to extract the bottom index bits (now matches the perm2 implementation but for unary inputs).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274571
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Tue, 5 Jul 2016 18:30:52 +0000 (18:30 +0000)]
ARM: fix `-mlong-calls` for WoA
Not all code-paths set the relocation model to static for Windows. This
currently breaks on Windows ARM with `-mlong-calls` when built with clang.
Loosen the assertion to what it was previously. We would ideally ensure that
all the configuration sets Windows to static relocation model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274570
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 5 Jul 2016 18:25:02 +0000 (18:25 +0000)]
DAGCombiner: Fold away vector extract of insert with the same index
This only really matters when the index is non-constant since the
constant case already gets taken care of by other combines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274569
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Tue, 5 Jul 2016 18:02:57 +0000 (18:02 +0000)]
AArch64: use correct SDValue # when looking for bitfield placement.
The other use really does only care about the SDNode (it checks the
opcode against a whitelist), but bitFieldPlacement can be misled if
the node produces multiple results.
Patch by Ismail Badawi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274567
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 5 Jul 2016 17:09:01 +0000 (17:09 +0000)]
AMDGPU: Fix folding SGPRs into madak/madmk src0
Because of the special immediate operand, the constant
bus is already used so SGPRs are never useful.
r263212 changed the name of the immediate operand, which
broke the verifier check for the restriction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274564
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Tue, 5 Jul 2016 16:56:09 +0000 (16:56 +0000)]
[MC/Darwin] Fix a -Wmisleading-indentation warning, reported by GCC 6.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274563
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Tue, 5 Jul 2016 16:10:44 +0000 (16:10 +0000)]
AMDGPU/SI: Remove address space query functions from AMDGPUDAGToDAGISel
Summary:
These have been replaced with TableGen code (except for isConstantLoad,
which is still used for R600). The queries were broken for cases
where MemOperand was a PseudoSourceValue.
Reviewers: arsenm
Subscribers: arsenm, kzhuravl, llvm-commits
Differential Revision: http://reviews.llvm.org/D21684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274561
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthew Simpson [Tue, 5 Jul 2016 15:41:28 +0000 (15:41 +0000)]
[LV] Refactor integer induction widening (NFC)
This patch also removes the SCEV variants of getStepVector() since they have no
uses after the refactoring.
Differential Revision: http://reviews.llvm.org/D21903
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274558
91177308-0d34-0410-b5e6-
96231b3b80d8
Valery Pykhtin [Tue, 5 Jul 2016 15:15:28 +0000 (15:15 +0000)]
[AMDGPU] rename DS_1A1D_Off8_NORET to DS_1A2D_Off8_NORET as ds_write2xx use 2 source registers. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274556
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 5 Jul 2016 14:49:58 +0000 (14:49 +0000)]
[X86][AVX512] Remove vector BROADCAST builtins.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274555
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Zuckerman [Tue, 5 Jul 2016 14:42:12 +0000 (14:42 +0000)]
[LLVM][INTRINSICS] adding intrinsics of CLFLUSHOPT
Differential Revision: http://reviews.llvm.org/D21789
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274553
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Kolton [Tue, 5 Jul 2016 14:01:11 +0000 (14:01 +0000)]
[AMDGPU] Assembler: Fix parsing error with floating-point literals passed to integer instructions
Differential Revision: http://reviews.llvm.org/D21972
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274551
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 5 Jul 2016 13:58:47 +0000 (13:58 +0000)]
[X86][AVX512] Autoupgrade the BROADCAST intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274550
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Tue, 5 Jul 2016 13:38:40 +0000 (13:38 +0000)]
[mips][ias] Remove k_PhysReg since it's not possible to create an operand of this kind.
Reviewers: sdardis
Subscribers: dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D21986
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274547
91177308-0d34-0410-b5e6-
96231b3b80d8
John Brawn [Tue, 5 Jul 2016 13:16:54 +0000 (13:16 +0000)]
[CMake] Adjust export_executable_symbols to cope with non-target link libraries
export_executable_symbols looks though the link libraries of the executable in
order to figure out transitive dependencies, but in doing so it assumes that
all link libraries are also targets. This is not true as of r273302, so adjust
it to check if they actually are targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274546
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 5 Jul 2016 13:16:05 +0000 (13:16 +0000)]
[X86][AVX512BW] Added BROADCAST intrinsics fast-isel generic IR tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274545
91177308-0d34-0410-b5e6-
96231b3b80d8
James Molloy [Tue, 5 Jul 2016 12:37:13 +0000 (12:37 +0000)]
[Thumb] Reapply r272251 with a fix for PR28348 (mk 2)
The important thing I was missing was ensuring newly added constants were kept in topological order. Repositioning the node is correct if the constant is newly added (so it has no topological ordering) but wrong if it already existed - positioning it next in the worklist would break the topological ordering.
Original commit message:
[Thumb] Select a BIC instead of AND if the immediate can be encoded more optimally negated
If an immediate is only used in an AND node, it is possible that the immediate can be more optimally materialized when negated. If this is the case, we can negate the immediate and use a BIC instead;
int i(int a) {
return a & 0xfffffeec;
}
Used to produce:
ldr r1, [CONSTPOOL]
ands r0, r1
CONSTPOOL: 0xfffffeec
And now produces:
movs r1, #255
adds r1, #20 ; Less costly immediate generation
bics r0, r1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274543
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Tue, 5 Jul 2016 10:44:24 +0000 (10:44 +0000)]
Revert r274536: [mips][ias] Don't break apart and reconstruct StringRef's for k_Token. NFC.
It turns out that MSVC requires this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274538
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 5 Jul 2016 10:15:14 +0000 (10:15 +0000)]
[X86][AVX512] Added BROADCAST intrinsics fast-isel generic IR tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274537
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Tue, 5 Jul 2016 10:10:36 +0000 (10:10 +0000)]
[mips][ias] Don't break apart and reconstruct StringRef's for k_Token. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274536
91177308-0d34-0410-b5e6-
96231b3b80d8
Nemanja Ivanovic [Tue, 5 Jul 2016 09:22:29 +0000 (09:22 +0000)]
[PowerPC] - Legalize vector types by widening instead of integer promotion
This patch corresponds to review:
http://reviews.llvm.org/D20443
It changes the legalization strategy for illegal vector types from integer
promotion to widening. This only applies for vectors with elements of width
that is a multiple of a byte since we have hardware support for vectors with
1, 2, 3, 8 and 16 byte elements.
Integer promotion for vectors is quite expensive on PPC due to the sequence
of breaking apart the vector, extending the elements and reconstituting the
vector. Two of these operations are expensive.
This patch causes between minor and major improvements in performance on most
benchmarks. There are very few benchmarks whose performance regresses. These
regressions can be handled in a subsequent patch with a DAG combine (similar
to how this patch handles int -> fp conversions of illegal vector types).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274535
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 5 Jul 2016 09:10:07 +0000 (09:10 +0000)]
[X86][AVX512] Added VSHUFPD intrinsics fast-isel generic IR tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274534
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 5 Jul 2016 09:09:41 +0000 (09:09 +0000)]
[X86][AVX512VL] Added VSHUFPD/VSHUFPS intrinsics fast-isel generic IR tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274533
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Tue, 5 Jul 2016 01:14:53 +0000 (01:14 +0000)]
test: relax the match on the timestamp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274529
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Tue, 5 Jul 2016 00:23:05 +0000 (00:23 +0000)]
Object: support empty UID/GID fields
Normal archives do not have empty UID/GID fields. However, the Microsoft
Import library format is a customized archive (it just uses an alternate symbol
index format). When the import library is constructed by lib.exe, the UID and
GID fields are left empty. Do not abort on such an input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274528
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Tue, 5 Jul 2016 00:12:51 +0000 (00:12 +0000)]
AMDGPU/R600: Add PatFrags for selecting the correct vtx id for loads
This moves of the r600 logic out of isGlobalLoad() and into the
TableGen files.
Differential Revision: http://reviews.llvm.org/D21710
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274527
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Mon, 4 Jul 2016 22:47:53 +0000 (22:47 +0000)]
[Support][Error] Make logAllUnhandledErrors take a Twine for the banner, rather
than a const string&.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274526
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 4 Jul 2016 20:56:38 +0000 (20:56 +0000)]
[IR,X86] Remove some intrinsic prefixes earlier in the auto-upgrade code so we can shorten the length of the comparison strings and avoid repeatedly comparing the common prefix. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274522
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Mon, 4 Jul 2016 20:41:48 +0000 (20:41 +0000)]
AMDGPU/SI: Remove hack for selecting < 32-bit loads to MUBUF instructions
Summary:
The isGlobalLoad() query was returning true for constant address space loads
with memory types less than 32-bits, which is wrong. This logic has been
replaced with PatFrag in the TableGen files, to provide the same functionality.
Reviewers: arsenm
Subscribers: arsenm, kzhuravl, llvm-commits
Differential Revision: http://reviews.llvm.org/D21696
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274521
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 4 Jul 2016 20:41:24 +0000 (20:41 +0000)]
[X86][AVX512] Add support for lowering shuffles to VSHUFPD
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274520
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 4 Jul 2016 19:58:38 +0000 (19:58 +0000)]
[AVX512] Remove masked VPERMD/VPERMQ/VPERMILPS/VPERMILPD intrinsics. They were autoupgraded to native IR in r274506 and r274506.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274519
91177308-0d34-0410-b5e6-
96231b3b80d8
Jan Vesely [Mon, 4 Jul 2016 19:45:00 +0000 (19:45 +0000)]
AMDGPU/R600: Add indentation to VTX and TEX fetch asm strings
These are printed as part of Fetch clauses.
Differential Revision: http://reviews.llvm.org/D21730
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274517
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Mon, 4 Jul 2016 19:21:42 +0000 (19:21 +0000)]
[TableGen] Remove dead code. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274515
91177308-0d34-0410-b5e6-
96231b3b80d8
James Molloy [Mon, 4 Jul 2016 17:14:24 +0000 (17:14 +0000)]
Revert "[Thumb] Reapply r272251 with a fix for PR28348"
This reverts commit r274510 - it made green dragon unhappy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274512
91177308-0d34-0410-b5e6-
96231b3b80d8
James Molloy [Mon, 4 Jul 2016 16:35:41 +0000 (16:35 +0000)]
[Thumb] Reapply r272251 with a fix for PR28348
We were using DAG->getConstant instead of DAG->getTargetConstant. This meant that we could inadvertently increase the use count of a constant if stars aligned, which it did in this testcase. Increasing the use count of the constant could cause ISel to fall over (because DAGToDAG lowering assumed the constant had only one use!)
Original commit message:
[Thumb] Select a BIC instead of AND if the immediate can be encoded more optimally negated
If an immediate is only used in an AND node, it is possible that the immediate can be more optimally materialized when negated. If this is the case, we can negate the immediate and use a BIC instead;
int i(int a) {
return a & 0xfffffeec;
}
Used to produce:
ldr r1, [CONSTPOOL]
ands r0, r1
CONSTPOOL: 0xfffffeec
And now produces:
movs r1, #255
adds r1, #20 ; Less costly immediate generation
bics r0, r1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274510
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 4 Jul 2016 14:19:05 +0000 (14:19 +0000)]
[X86][AVX512] Autoupgrade the VPERMPD/VPERMQ intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274506
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 4 Jul 2016 13:43:10 +0000 (13:43 +0000)]
[X86][AVX512] Added VPERMPD/VPERMQ intrinsics fast-isel generic IR tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274503
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 4 Jul 2016 12:40:54 +0000 (12:40 +0000)]
[X86][AVX512] Autoupgrade the VPERMILPD/VPERMILPS intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274498
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Liu [Mon, 4 Jul 2016 12:10:08 +0000 (12:10 +0000)]
Fixed warning caused by r274402.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274497
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 4 Jul 2016 11:07:50 +0000 (11:07 +0000)]
[X86][AVX512] Added VPERMILPD/VPERMILPS intrinsics fast-isel generic IR tests
Added PSHUFD tests as well
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274493
91177308-0d34-0410-b5e6-
96231b3b80d8
Nicolai Haehnle [Mon, 4 Jul 2016 08:01:29 +0000 (08:01 +0000)]
Add writeonly IR attribute
Summary:
This complements the earlier addition of IntrWriteMem and IntrWriteArgMem
LLVM intrinsic properties, see D18291.
Also start using the attribute for memset, memcpy, and memmove intrinsics,
and remove their special-casing in BasicAliasAnalysis.
Reviewers: reames, joker.eph
Subscribers: joker.eph, llvm-commits
Differential Revision: http://reviews.llvm.org/D18714
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274485
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 4 Jul 2016 06:19:35 +0000 (06:19 +0000)]
[CodeGen] Make the code that detects a if a shuffle is really a concatenation of the inputs more general purpose.
We can now handle concatenation of each source multiple times. The previous code just checked for each source to appear once in either order.
This also now handles an entire source vector sized piece having undef indices correctly. We now concat with UNDEF instead of using one of the sources. This is responsible for the test case change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274483
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Mon, 4 Jul 2016 01:26:33 +0000 (01:26 +0000)]
Reformat blank lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274481
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Mon, 4 Jul 2016 01:26:27 +0000 (01:26 +0000)]
Reformat comment lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274480
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Mon, 4 Jul 2016 01:26:21 +0000 (01:26 +0000)]
Untabify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274479
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Mon, 4 Jul 2016 01:26:14 +0000 (01:26 +0000)]
Reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274478
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 3 Jul 2016 21:28:17 +0000 (21:28 +0000)]
[X86] Add shuffle mask rescaling helper function. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274476
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 3 Jul 2016 20:39:42 +0000 (20:39 +0000)]
[X86][AVX2] Merge unary permute matching behind the same V2.isUndef() condition. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274474
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 3 Jul 2016 19:50:06 +0000 (19:50 +0000)]
[X86][AVX512] Add support for 512-bit shuffle lowering to VPERMPD/VPERMQ
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274473
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 3 Jul 2016 19:37:12 +0000 (19:37 +0000)]
[CodeGen] Teach OR combine of shuffles involving zero vectors to better handle undef indices.
Undef indices can now be treated as zeros. Or if its undef ORed with zero, we will keep the undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274472
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 3 Jul 2016 19:37:10 +0000 (19:37 +0000)]
[X86] Add tests to show that the DAG combine for OR of shuffles with zero vectors doesn't handle undefs as well as it could. Fix coming in another commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274471
91177308-0d34-0410-b5e6-
96231b3b80d8
Haicheng Wu [Sun, 3 Jul 2016 19:14:17 +0000 (19:14 +0000)]
[MBB] add a missing corner case in UpdateTerminator()
After the block placement, if a block ends with a conditional branch, but the
next block is not its successor. The conditional branch should be changed to
unconditional branch. This patch fixes PR28307, PR28297, PR28402.
Differential Revision: http://reviews.llvm.org/D21811
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274470
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 3 Jul 2016 18:40:24 +0000 (18:40 +0000)]
[X86][AVX512] Add support for VPERMPD/VPERMQ masked shuffle comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274469
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 3 Jul 2016 18:27:37 +0000 (18:27 +0000)]
[X86][AVX512] Add support for 512-bit shuffle decoding of VPERMPD/VPERMQ
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274468
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 3 Jul 2016 18:02:43 +0000 (18:02 +0000)]
[X86][AVX] Renamed VPERMILPI shuffle comment macros to be more specific
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274467
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 3 Jul 2016 15:00:51 +0000 (15:00 +0000)]
[X86][AVX512] Add support for VPALIGNR/PSHUFD/PSHUFHW/PSHUFLW masked shuffle comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274466
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sun, 3 Jul 2016 14:34:39 +0000 (14:34 +0000)]
[InstCombine] enable vector select of bools -> logic folds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274465
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 3 Jul 2016 14:26:21 +0000 (14:26 +0000)]
[X86][AVX512] Add support for UNPCK masked shuffle comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274464
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sun, 3 Jul 2016 14:08:19 +0000 (14:08 +0000)]
fix formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274463
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 3 Jul 2016 13:55:41 +0000 (13:55 +0000)]
[X86][AVX512] Add support for VPERM/VSHUF masked shuffle comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274462
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 3 Jul 2016 13:33:28 +0000 (13:33 +0000)]
[X86][AVX512] Add support for PMOVZX masked shuffle comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274461
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sun, 3 Jul 2016 13:26:02 +0000 (13:26 +0000)]
add vector bool select tests and regenerate checks for scalar bool select tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274460
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 3 Jul 2016 13:08:29 +0000 (13:08 +0000)]
[X86][AVX512] Add support for masked shuffle comments
This patch adds support for including the avx512 mask register information in the mask/maskz versions of shuffle instruction comments.
This initial version just adds support for MOVDDUP/MOVSHDUP/MOVSLDUP to reduce the mass of test regenerations, other shuffle instructions can be added in due course.
Differential Revision: http://reviews.llvm.org/D21953
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274459
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 3 Jul 2016 12:47:21 +0000 (12:47 +0000)]
[X86][AVX512] Add support for lowering shuffles to VPERMILPS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274458
91177308-0d34-0410-b5e6-
96231b3b80d8
Sean Silva [Sun, 3 Jul 2016 03:35:06 +0000 (03:35 +0000)]
PR28400: Partly undo r274440 to bring test-suite back to life with the new PM
PR28400 seems to be not an isolated issue, but a general problem related
to caching analyses. We will need to discuss on llvm-dev.
A test case is in the PR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274457
91177308-0d34-0410-b5e6-
96231b3b80d8
Sean Silva [Sun, 3 Jul 2016 03:35:03 +0000 (03:35 +0000)]
[PM] Some preparatory refactoring to minimize the diff of D21921
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274456
91177308-0d34-0410-b5e6-
96231b3b80d8
Sean Silva [Sat, 2 Jul 2016 23:47:27 +0000 (23:47 +0000)]
Remove dead TLI arg of isKnownNonNull and propagate deadness. NFC.
This actually uncovered a surprisingly large chain of ultimately unused
TLI args.
From what I can gather, this argument is a remnant of when
isKnownNonNull would look at the TLI directly.
The current approach seems to be that InferFunctionAttrs runs early in
the pipeline and uses TLI to annotate the TLI-dependent non-null
information as return attributes.
This also removes the dependence of functionattrs on TLI altogether.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274455
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Sat, 2 Jul 2016 21:25:12 +0000 (21:25 +0000)]
Fix wrong comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274453
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Sat, 2 Jul 2016 21:18:40 +0000 (21:18 +0000)]
[PM] Port LoopAccessInfo analysis to new PM
It is implemented as a LoopAnalysis pass as
discussed and agreed upon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274452
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 2 Jul 2016 20:21:39 +0000 (20:21 +0000)]
Fix spelling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274451
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 2 Jul 2016 20:20:12 +0000 (20:20 +0000)]
[X86][AVX512] Add support for lowering shuffles to VPERMILPD
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274450
91177308-0d34-0410-b5e6-
96231b3b80d8
Sylvestre Ledru [Sat, 2 Jul 2016 19:28:40 +0000 (19:28 +0000)]
fix some various typos in the doc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274449
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 2 Jul 2016 19:22:46 +0000 (19:22 +0000)]
[X86][AVX512VL] Add fast-isel MOVDDUP/MOVSLDUP/MOVSHDUP shuffle tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274448
91177308-0d34-0410-b5e6-
96231b3b80d8
Sean Silva [Sat, 2 Jul 2016 19:12:56 +0000 (19:12 +0000)]
[PM] Some preparatory refactoring to minimize the diff of D21921
The main change here is just moving stuff to static functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274446
91177308-0d34-0410-b5e6-
96231b3b80d8
Sean Silva [Sat, 2 Jul 2016 18:59:51 +0000 (18:59 +0000)]
[PM] Preparatory cleanups to ArgumentPromotion.
This pulls some obvious changes out of http://reviews.llvm.org/D21921 to
minimize the diff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274445
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 2 Jul 2016 18:14:31 +0000 (18:14 +0000)]
[X86][AVX512] Add support for 512-bit PSHUFB lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274444
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 2 Jul 2016 17:16:41 +0000 (17:16 +0000)]
[X86][AVX512] Converted the MOVDDUP/MOVSLDUP/MOVSHDUP masked intrinsics to generic IR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274443
91177308-0d34-0410-b5e6-
96231b3b80d8
Wilfred Hughes [Sat, 2 Jul 2016 17:01:59 +0000 (17:01 +0000)]
New Kaleidoscope chapter: Creating object files
This new chapter describes compiling LLVM IR to object files.
The new chaper is chapter 8, so later chapters have been renumbered.
Since this brings us to 10 chapters total, I've also needed to rename
the other chapters to use two digit numbering.
Differential Revision: http://reviews.llvm.org/D18070
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274441
91177308-0d34-0410-b5e6-
96231b3b80d8
Sean Silva [Sat, 2 Jul 2016 16:16:44 +0000 (16:16 +0000)]
[PM] Fix a small typo from when I ported JumpThreading
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274440
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 2 Jul 2016 14:42:35 +0000 (14:42 +0000)]
[X86][AVX512] Autoupgrade the MOVDDUP/MOVSLDUP/MOVSHDUP intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274439
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sat, 2 Jul 2016 13:18:38 +0000 (13:18 +0000)]
[DIBuilder] Remove dead code. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274438
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sat, 2 Jul 2016 13:05:12 +0000 (13:05 +0000)]
[Hexagon] Create global std::map lazily.
This could of course be a simple binary search with no global state
involved at all if someone cares enough. Just don't make everyone
linking the hexagon backend pay for it on process startup and shutdown.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274437
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 2 Jul 2016 12:45:03 +0000 (12:45 +0000)]
[X86][AVX512] Add support for lowering shuffles to MOVDDUP/MOVSLDUP/MOVSHDUP
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274436
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 2 Jul 2016 12:20:35 +0000 (12:20 +0000)]
[X86][AVX512] Add test cases that should lower to MOVSLDUP/MOVSHDUP
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274435
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 2 Jul 2016 12:13:29 +0000 (12:13 +0000)]
[X86][AVX512] Add fast-isel shuffle tests
Its not worth trying to write out tests for all the avx512f builtins yet, just adding tests for lowering of generic IR as we transition to it (shuffles mainly right now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274434
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sat, 2 Jul 2016 11:41:39 +0000 (11:41 +0000)]
Use arrays or initializer lists to feed ArrayRefs instead of SmallVector where possible.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274431
91177308-0d34-0410-b5e6-
96231b3b80d8
Qin Zhao [Sat, 2 Jul 2016 03:25:37 +0000 (03:25 +0000)]
[esan|cfrag] Add counters for struct array accesses
Summary:
Adds one counter to the struct counter array for counting struct
array accesses.
Adds instrumentation to insert counter update for struct array
accesses.
Reviewers: aizatsky
Subscribers: llvm-commits, bruening, eugenis, kcc, zhaoqin, vitalybuka
Differential Revision: http://reviews.llvm.org/D21594
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274420
91177308-0d34-0410-b5e6-
96231b3b80d8
Marcin Koscielnicki [Sat, 2 Jul 2016 02:20:40 +0000 (02:20 +0000)]
[SystemZ] Move misplaced SystemZ::TDC to non-memory opcode range.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274417
91177308-0d34-0410-b5e6-
96231b3b80d8
Pirama Arumuga Nainar [Sat, 2 Jul 2016 00:23:09 +0000 (00:23 +0000)]
Add RenderScript ArchType
Summary:
Add renderscript32 and renderscript64 ArchTypes. This is to configure
the ABI requirement on 32-bit RenderScript that 'long' types have 64-bit
size and alignment. 64-bit RenderScript is the same as AArch64, but is
added here for completeness.
Reviewers: echristo, rsmith
Subscribers: aemerson, jfb, rampitec, dschuff, mehdi_amini, llvm-commits, srhines
Differential Revision: http://reviews.llvm.org/D21333
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274412
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Kuperstein [Sat, 2 Jul 2016 00:16:47 +0000 (00:16 +0000)]
[PM] Port ConstantHoisting to the new Pass Manager
Differential Revision: http://reviews.llvm.org/D21945
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274411
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Sat, 2 Jul 2016 00:11:07 +0000 (00:11 +0000)]
[codeview] Set the Nested and Scoped ClassOptions based on the scope chain
These are set on both the declaration record and the definition record.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274410
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Fri, 1 Jul 2016 23:26:54 +0000 (23:26 +0000)]
LoadStoreVectorizer: Fix warning about extra semicolon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274406
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Fri, 1 Jul 2016 23:26:50 +0000 (23:26 +0000)]
TII: Fix inlineasm size counting comments as insts
The main problem was counting comments on their own
line as instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274405
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Fri, 1 Jul 2016 23:15:06 +0000 (23:15 +0000)]
PeepholeOptimizer: Relax assert
Allow implicit defs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274402
91177308-0d34-0410-b5e6-
96231b3b80d8
David Majnemer [Fri, 1 Jul 2016 23:12:48 +0000 (23:12 +0000)]
[CodeView] Include the offset of nested members
Given something like:
struct S {
int a;
struct { int b; };
};
We would fail to give 'b' offset 4. Instead, we would give it the
offset it has inside of it's struct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274400
91177308-0d34-0410-b5e6-
96231b3b80d8
David Majnemer [Fri, 1 Jul 2016 23:12:45 +0000 (23:12 +0000)]
[CodeView] Pretty print anonymous scopes
A namespace without a name should be written out as `anonymous
namespace' while a tag type without a name should be written out as
<unnamed-tag>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274399
91177308-0d34-0410-b5e6-
96231b3b80d8