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David Blaikie [Wed, 14 May 2014 01:08:28 +0000 (01:08 +0000)]
Recommit r208506: DebugInfo: Include lexical scopes in inlined subroutines.
This was reverted in r208642 due to regressions surrounding file changes
within lexical scopes causing inlining information to be lost.
The issue was in LexicalScopes::getOrCreateInlinedScope, where I was
previously testing "isLexicalBlock" which is false for
"DILexicalBlockFile" (a scope used to represent changes in the current
file name) and assuming it was then a function (breaking out of the
inlined scope path and reaching for the parent non-inlined scopes). By
inverting the condition and testing for "isSubprogram" the correct
behavior is attained.
(also found some weirdness in Clang, see r208742 when reducing this test
case - the resulting test case doesn't apply with the Clang fix, but
I've added a more realistic test case to inline-scopes.ll which does
reproduce the issue and demonstrate the fix)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208748
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Eric Christopher [Wed, 14 May 2014 00:31:15 +0000 (00:31 +0000)]
Fix typo in function name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208743
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Matt Arsenault [Tue, 13 May 2014 23:45:50 +0000 (23:45 +0000)]
R600/SI: Try to fix BFE operands when moving to VALU
This was broken by r208479
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208740
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Lang Hames [Tue, 13 May 2014 22:37:41 +0000 (22:37 +0000)]
[tools][llvm-rtdyld] Add a '-dylib <file>' option to llvm-rtdyld to load shared
libraries before linking and executing the target objects.
This allows programs that use external calls (e.g. to libc) to be run under
llvm-rtdyld.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208739
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Lang Hames [Tue, 13 May 2014 22:09:07 +0000 (22:09 +0000)]
[RuntimeDyld] Fix handling of i386 PC-rel external relocations. This fixes
several more i386 MCJIT regression test failures.
<rdar://problem/
16889891>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208735
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Louis Gerbarg [Tue, 13 May 2014 21:54:22 +0000 (21:54 +0000)]
Add missing line breaks to debug output in CodeGenPrepare
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208731
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Benjamin Kramer [Tue, 13 May 2014 21:06:40 +0000 (21:06 +0000)]
GVN: Fix non-determinism in map iteration.
Iterating over a DenseMaop is non-deterministic and results to unpredictable IR
output.
Based on a patch by Daniel Reynaud!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208728
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Benjamin Kramer [Tue, 13 May 2014 21:06:36 +0000 (21:06 +0000)]
GVN: rangify a couple of loops.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208727
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Eric Christopher [Tue, 13 May 2014 20:49:08 +0000 (20:49 +0000)]
Save the optimization level the subtarget was created with in a
member variable and sink the initialization of crbits into the
subtarget feature reset code.
No functional change, but this refactor will be used in a future
commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208726
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Eric Christopher [Tue, 13 May 2014 19:55:17 +0000 (19:55 +0000)]
Make the split function use StringRef::split.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208723
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Tom Stellard [Tue, 13 May 2014 19:37:03 +0000 (19:37 +0000)]
autoconf: Fix soname for libLLVM-Major.Minor.so (2nd try)
We were using libLLVM-Major.Minor.Patch.so for the soname, but we
need the soname to stay consistent for all Major.Minor.* releases
otherwise operating system distributors will need to rebuild all
packages that link with LLVM every time there is a new point release.
This patch also reverses the compatibility symlink, so
libLLVM-Major.Minor.Patch.so is now a symlink that points
to libLLVM-Major-Minor.so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208721
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Rafael Espindola [Tue, 13 May 2014 18:45:48 +0000 (18:45 +0000)]
Split GlobalValue into GlobalValue and GlobalObject.
This allows code to statically accept a Function or a GlobalVariable, but
not an alias. This is already a cleanup by itself IMHO, but the main
reason for it is that it gives a lot more confidence that the refactoring to fix
the design of GlobalAlias is correct. That will be a followup patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208716
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Joerg Sonnenberger [Tue, 13 May 2014 17:58:13 +0000 (17:58 +0000)]
Check explicitly for EHABI and just use the default settings.
Code depends on the assembler and linker to fix things up...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208715
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Christian Pirker [Tue, 13 May 2014 17:06:51 +0000 (17:06 +0000)]
ARM: Additional test files for thumb fixups (checked with llvm-mv -show-encoding)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208712
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Christian Pirker [Tue, 13 May 2014 16:44:30 +0000 (16:44 +0000)]
ARMEB: Fix byte order of EH frame unwinding instructions, with modified test file
This commit was already commited as revision rL208689 and discussd in
phabricator revision D3704.
But the test file was crashing on OS X and windows.
I fixed the test file in the same way as in rL208340.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208711
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Rafael Espindola [Tue, 13 May 2014 16:41:02 +0000 (16:41 +0000)]
Style fix: The name of variables starts with an upper case letter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208710
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Tom Stellard [Tue, 13 May 2014 16:35:56 +0000 (16:35 +0000)]
Revert "autoconf: Fix soname for libLLVM-Major.Minor.so"
This reverts commit r208708.
I forgot to run make clean before testing this and it broke tools
linking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208709
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Tom Stellard [Tue, 13 May 2014 16:18:55 +0000 (16:18 +0000)]
autoconf: Fix soname for libLLVM-Major.Minor.so
We were using libLLVM-Major.Minor.Patch.so for the soname, but we
need the soname to stay consistent for all Major.Minor.* releases
otherwise operating system distributors will need to rebuild all
packages that link with LLVM every time there is a new point release.
This patch also reverses the compatibility symlink, so
libLLVM-Major.Minor.Patch.so is now a symlink that points
to libLLVM-Major-Minor.so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208708
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Joey Gouly [Tue, 13 May 2014 15:42:45 +0000 (15:42 +0000)]
[CGP] r205941 changed the logic, so that a cast happens *before* 'Result' is
compared to 'AddrMode.BaseReg'. In the case that 'AddrMode.BaseReg' is
nullptr, 'Result' will also be nullptr, so the cast causes an assertion. We
should use dyn_cast_or_null here to check 'Result' is not null and it is an
instruction.
Bug found by Mats Petersson, and I reduced his IR to get a test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208705
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Rafael Espindola [Tue, 13 May 2014 15:19:56 +0000 (15:19 +0000)]
Revert "ARMEB: Fix byte order of EH frame unwinding instructions"
This reverts commit r208689.
The test was crashing on OS X and windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208704
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Aaron Ballman [Tue, 13 May 2014 12:52:35 +0000 (12:52 +0000)]
Teach the table generator to not generate switch statements containing only a default label with no cases. This solves some warnings with MSVC.
No functional changes intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208694
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Christian Pirker [Tue, 13 May 2014 11:50:39 +0000 (11:50 +0000)]
ARM: Additional test files for thumb fixups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208691
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Daniel Sanders [Tue, 13 May 2014 11:45:36 +0000 (11:45 +0000)]
[mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them
Summary:
This required a new instruction group representing the 32-bit subset of
MIPS-3 that was available in MIPS32R2.
To limit the number of tests required, only one 32-bit and one 64-bit ISA
prior to MIPS32/MIPS64 are tested.
rdhwr has been deliberately left without an ISA annotation for now. This is
because the assembler and CodeGen disagree on when the instruction is
available. Strictly speaking, it is only available in MIPS32r2 and
MIPS64r2. However, it is emulated by a kernel trap on earlier ISA's and is
necessary for TLS so CodeGen should emit it on older ISA's too.
Depends on D3696
Reviewers: vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3697
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208690
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Christian Pirker [Tue, 13 May 2014 11:41:49 +0000 (11:41 +0000)]
ARMEB: Fix byte order of EH frame unwinding instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208689
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Daniel Sanders [Tue, 13 May 2014 11:17:46 +0000 (11:17 +0000)]
[mips] Free up two values in SubtargetFeatureFlag by folding the redundant IsGP32/IsGP64 into IsGP32bit/IsGP64bit
Summary:
We are currently very close to the 32-bit limit of the current assembler
implementation. This is because there is no way to represent an instruction
that is available in, for example, Mips3 or Mips32. We have to define a
feature bit that represents this.
This patch cleans up a pair of redundant feature bits and slightly postpones the
point we will reach the limit.
Reviewers: zoran.jovanovic, jkolek, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3703
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208685
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Artyom Skrobov [Tue, 13 May 2014 11:16:22 +0000 (11:16 +0000)]
Fix build failure with MSVC, following r208680
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208684
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Artyom Skrobov [Tue, 13 May 2014 10:11:29 +0000 (10:11 +0000)]
include/llvm/Support/Unicode.h didn't have re-include guards
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208681
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Artyom Skrobov [Tue, 13 May 2014 09:45:26 +0000 (09:45 +0000)]
[un]wrap extracted from lib/Target/Target[MachineC].cpp, lib/ExecutionEngine/ExecutionEngineBindings.cpp into include/llvm/IR/DataLayout.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208680
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Tim Northover [Tue, 13 May 2014 09:37:41 +0000 (09:37 +0000)]
TableGen: strengthen assert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208679
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Jay Foad [Tue, 13 May 2014 08:26:53 +0000 (08:26 +0000)]
Fix gcc -Wparentheses warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208675
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Kevin Qin [Tue, 13 May 2014 07:35:12 +0000 (07:35 +0000)]
[ARM64] Fix the misleading diagnostic on bad extend amount of reg+reg addressing mode.
A vague diagnostic replaced the misleading one.
This can fix bug 19502.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208669
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Serge Pavlov [Tue, 13 May 2014 06:07:21 +0000 (06:07 +0000)]
Fix type of shuffle resulted from shuffle merge.
This fix resolves PR19730.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208666
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Rafael Espindola [Tue, 13 May 2014 01:23:21 +0000 (01:23 +0000)]
Assert that we don't RAUW a Constant with a ConstantExpr that contains it.
We already had an assert for foo->RAUW(foo), but not for something like
foo->RAUW(GEP(foo)) and would go in an infinite loop trying to apply
the replacement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208663
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Weiming Zhao [Tue, 13 May 2014 00:40:58 +0000 (00:40 +0000)]
Folding into CSEL when there is ZEXT between SETCC and ADD
Normally, patterns like (add x, (setcc cc ...)) will be folded into
(csel x, x+1, not cc). However, if there is a ZEXT after SETCC, they
won't be folded. This patch recognizes the ZEXT and allows the
generation of CSINC.
This patch fixes bug 19680.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208660
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Rafael Espindola [Tue, 13 May 2014 00:31:31 +0000 (00:31 +0000)]
Convert test to FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208658
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Rafael Espindola [Tue, 13 May 2014 00:07:46 +0000 (00:07 +0000)]
Convert test to FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208644
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David Blaikie [Mon, 12 May 2014 23:53:03 +0000 (23:53 +0000)]
Revert "DebugInfo: Include lexical scopes in inlined subroutines."
This reverts commit r208506.
Some inlined subroutine scopes appear to be missing with this change.
Reverting while I investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208642
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Pete Cooper [Mon, 12 May 2014 23:26:58 +0000 (23:26 +0000)]
Use a logical not when inverting SetCC. This unfortunately doesn't fire on any targets so I couldn't find a test case to trigger it.
The problem occurs when a non-i1 setcc is inverted. For example 'i8 = setcc' will get 'xor 0xff' to invert this. This is clearly wrong when the boolean contents are ZeroOrOne.
This patch introduces getLogicalNOT and updates SetCC legalisation to use it.
Reviewed by Hal Finkel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208641
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Adam Nemet [Mon, 12 May 2014 23:00:03 +0000 (23:00 +0000)]
[DAGCombiner] Split up an indexed load if only the base pointer value is live
Right now the load may not get DCE'd because of the side-effect of updating
the base pointer.
This can happen if we lower a read-modify-write of an illegal larger type
(e.g. i48) such that the modification only affects one of the subparts (the
lower i32 part but not the higher i16 part). See the testcase.
In order to spot the dead load we need to revisit it when SimplifyDemandedBits
decided that the value of the load is masked off. This is the
CommitTargetLoweringOpt piece.
I checked compile time with ARM64 by sending SPEC bitcode files through llc.
No measurable change.
Fixes <rdar://problem/
16031651>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208640
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Louis Gerbarg [Mon, 12 May 2014 22:13:07 +0000 (22:13 +0000)]
Fix ARM bswap16.ll test on Windows
Windows on ARM only supports thumb mode execution, so we have to
explicitly pick some non-Windows OS to test ARM mode codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208638
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Reid Kleckner [Mon, 12 May 2014 22:01:27 +0000 (22:01 +0000)]
Try to fix an SDAG dependence issue with sret
r208453 added support for having sret on the second parameter. In that
change, the code for copying sret into a virtual register was hoisted
into the loop that lowers formal parameters. This caused a "Wrong
topological sorting" assertion failure during scheduling when a
parameter is passed in memory. This change undoes that by creating a
second loop that deals with sret.
I'm worried that this fix is incomplete. I don't fully understand the
dependence issues. However, with this change we produce the same DAGs
we used to produce, so if they are broken, they are just as broken as
they have always been.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208637
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David Blaikie [Mon, 12 May 2014 21:50:44 +0000 (21:50 +0000)]
DebugInfo: Attach DW_AT_inline to inlined subprograms at DIE-construction time rather than as a post-processing step.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208636
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Lang Hames [Mon, 12 May 2014 21:39:59 +0000 (21:39 +0000)]
[RuntimeDyld] Add support for MachO __jump_table and __pointers sections, and
SECTDIFF relocations on 32-bit x86.
This fixes several of the MCJIT regression test failures that show up on 32-bit
builds.
<rdar://problem/
16886294>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208635
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David Blaikie [Mon, 12 May 2014 21:33:03 +0000 (21:33 +0000)]
DebugInfo: Make gmlt debug info more gmlt-like by removing variables.
For some impending improvements to debug info, LLVM will start assuming
that when the CU specifies llvm::DIBuilder::LineTablesOnly, the IR for
functions described by that CU will not include variables, types, etc.
(might be worth having some test coverage for GMLT + non-GMLT CUs,
especially with non-GMLT functions inlined into GMLT CU functions)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208634
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Kevin Enderby [Mon, 12 May 2014 20:45:00 +0000 (20:45 +0000)]
Suggested improvement by Rafael Espindola to use isa<> in a few places
instead of dyn_cast<>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208628
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Matt Arsenault [Mon, 12 May 2014 20:42:57 +0000 (20:42 +0000)]
Use cast<> for unchecked use
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208627
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Sebastian Pop [Mon, 12 May 2014 20:11:01 +0000 (20:11 +0000)]
use nullptr instead of NULL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208622
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Adam Nemet [Mon, 12 May 2014 19:57:31 +0000 (19:57 +0000)]
[Test] Trim unnecessary .c and .cpp from config.suffix in lit.local.cfg
Tested by comparing make check VERBOSE=1 before and after to make sure
no tests are missed. (VERBOSE=1 prints the list of tests.)
Only one test :( remains where .cpp is required:
tools/llvm-cov/range_based_for.cpp:// RUN: llvm-cov range_based_for.cpp | FileCheck %s --check-prefix=STDOUT
The topic was discussed in this thread:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-
20140428/214905.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208621
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Louis Gerbarg [Mon, 12 May 2014 19:53:52 +0000 (19:53 +0000)]
Add support bswap16 to/from memory compiling to rev16 on ARM/Thumb
The current patterns for REV16 misses mostn __builtin_bswap16() due to
legalization promoting the operands to from load/stores toi32s and then
truncing/extending them. This patch adds new patterns that catch the resultant
DAGs and codegens them to rev16 instructions. Tests included.
rdar://
15353652
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208620
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Matt Arsenault [Mon, 12 May 2014 19:26:38 +0000 (19:26 +0000)]
Use cast<> for unchecked use
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208618
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Matt Arsenault [Mon, 12 May 2014 19:23:21 +0000 (19:23 +0000)]
Use range for
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208617
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Sebastian Pop [Mon, 12 May 2014 19:01:53 +0000 (19:01 +0000)]
do not assert when delinearization fails
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208615
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Sebastian Pop [Mon, 12 May 2014 19:01:49 +0000 (19:01 +0000)]
use isZero()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208614
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David Blaikie [Mon, 12 May 2014 18:23:35 +0000 (18:23 +0000)]
DwarfDebug: Avoid an extra map lookup while constructing abstract scope DIEs and reduce nesting/conditionals.
One test case had to be updated as it still had the extra indirection
for the variable list - removing the extra indirection got it back to
passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208608
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Tim Northover [Mon, 12 May 2014 18:04:06 +0000 (18:04 +0000)]
TableGen: use PrintMethods to print more aliases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208607
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Tim Northover [Mon, 12 May 2014 18:03:42 +0000 (18:03 +0000)]
AArch64/ARM64: use InstAliases for NEON logical (imm) instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208606
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Tim Northover [Mon, 12 May 2014 18:03:36 +0000 (18:03 +0000)]
AArch64/ARM64: implement "mov $Rd, $Imm" aliases in TableGen.
This is a slightly different approach to AArch64 (the base instruction
definitions aren't quite right for that to work), but achieves the
same thing and reduces C++ hackery in AsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208605
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Matt Arsenault [Mon, 12 May 2014 17:49:57 +0000 (17:49 +0000)]
R600: Add mul24 intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208604
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Matt Arsenault [Mon, 12 May 2014 17:14:48 +0000 (17:14 +0000)]
Make SimplifyDemandedBits understand BUILD_PAIR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208598
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Matheus Almeida [Mon, 12 May 2014 16:59:34 +0000 (16:59 +0000)]
[mips] Move disassembler test (test_2r_msa64) into correct folder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208594
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Matheus Almeida [Mon, 12 May 2014 16:31:45 +0000 (16:31 +0000)]
[mips] Move disassembler test (Mips MSA test_vec) into correct folder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208592
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Matheus Almeida [Mon, 12 May 2014 16:26:53 +0000 (16:26 +0000)]
[mips] Move disassembler tests (Mips MSA test_i*, test_mi10) into correct folder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208590
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Matheus Almeida [Mon, 12 May 2014 16:23:45 +0000 (16:23 +0000)]
[mips] Move disassembler tests (Mips MSA test_elm*) into correct folder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208589
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Matheus Almeida [Mon, 12 May 2014 16:20:46 +0000 (16:20 +0000)]
[mips] Move disassembler tests (Mips MSA test_lsa, test_dlsa) into correct folder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208588
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Matheus Almeida [Mon, 12 May 2014 16:16:59 +0000 (16:16 +0000)]
[mips] Move disassembler test (Mips MSA test_ctrlregs) into correct folder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208587
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Matheus Almeida [Mon, 12 May 2014 16:10:00 +0000 (16:10 +0000)]
[mips] Move disassembler test (Mips MSA test_bit) into correct folder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208586
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Matheus Almeida [Mon, 12 May 2014 16:03:20 +0000 (16:03 +0000)]
[mips] Move disassembler tests (Mips MSA test_2r, test_2rf, test_3r, test_3rf) into
correct folder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208584
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Daniel Sanders [Mon, 12 May 2014 15:43:41 +0000 (15:43 +0000)]
Revert: r208582 - [mips][mips64r6] Add sel.s and sel.d
Accidentally committed an unreviewed patch. Reverted it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208583
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Daniel Sanders [Mon, 12 May 2014 15:39:10 +0000 (15:39 +0000)]
[mips][mips64r6] Add sel.s and sel.d
Summary:
Also use named constants for common opcode fields.
Depends on D3669
Reviewers: jkolek, vmedic, zoran.jovanovic
Differential Revision: http://reviews.llvm.org/D3670
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208582
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James Molloy [Mon, 12 May 2014 15:30:31 +0000 (15:30 +0000)]
[ARM64-BE] Correct grammar mistake pointed out by Tobias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208580
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Daniel Sanders [Mon, 12 May 2014 15:24:16 +0000 (15:24 +0000)]
[mips][mips64r6] Add d?div, d?mod, d?divu, d?modu
Summary: Depends on D3668
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3669
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208579
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James Molloy [Mon, 12 May 2014 15:13:39 +0000 (15:13 +0000)]
[ARM64-BE] Add sphinx documentation for the ARM64 NEON implementation.
There are some interesting decisions based on non-obvious rationale in
the ARM64-BE NEON implementation - decent documentation is definitely required.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208577
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Daniel Sanders [Mon, 12 May 2014 15:12:45 +0000 (15:12 +0000)]
[mips][mips64r6] Added mul/mulu/muh/muhu
Summary: The 'mul' line of the test is temporarily commented out because it currently matches the MIPS32 mul instead of the MIPS32r6 mul. This line will be uncommented when we disable the MIPS32 mul on MIPS32r6.
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3668
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208576
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Rafael Espindola [Mon, 12 May 2014 14:43:25 +0000 (14:43 +0000)]
Move EmitDwarfAdvanceLineAddr and EmitDwarfAdvanceFrameAddr to the obj streamer.
This lets us delete the MCAsmStreamer implementation. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208570
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Rafael Espindola [Mon, 12 May 2014 14:40:12 +0000 (14:40 +0000)]
Pass a MCObjectStreamer instead of a MCStreamer when possible.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208569
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Rafael Espindola [Mon, 12 May 2014 14:28:48 +0000 (14:28 +0000)]
Pass a MCObjectStreamer instead of a MCStreamer when possible.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208567
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Aaron Ballman [Mon, 12 May 2014 14:22:58 +0000 (14:22 +0000)]
Silencing an MSVC warning about not all control paths returning a value (even though the switch is fully covered). No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208565
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Tim Northover [Mon, 12 May 2014 14:13:21 +0000 (14:13 +0000)]
ARM64: remove dead validation code from the AsmParser.
If this code triggers, any immediate has already been validated so it can't
possibly trigger a diagnostic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208564
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Tim Northover [Mon, 12 May 2014 14:13:17 +0000 (14:13 +0000)]
ARM64: merge "extend" and "shift" addressing-mode enums.
In terms of assembly, these have too much overlap to be neatly modelled as
disjoint classes: in many cases "lsl" is an acceptable alternative to either
"uxtw" or "uxtx".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208563
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Rafael Espindola [Mon, 12 May 2014 14:02:44 +0000 (14:02 +0000)]
Move EH/Debug frame handling to the object streamer.
Now that the asm streamer doesn't use it, the MCStreamer doesn't need to know
about it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208562
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Rafael Espindola [Mon, 12 May 2014 13:47:05 +0000 (13:47 +0000)]
Remove always true argument and unused field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208561
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Rafael Espindola [Mon, 12 May 2014 13:40:49 +0000 (13:40 +0000)]
Remove always true argument and field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208559
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Rafael Espindola [Mon, 12 May 2014 13:34:25 +0000 (13:34 +0000)]
Remove always true argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208558
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Rafael Espindola [Mon, 12 May 2014 13:30:10 +0000 (13:30 +0000)]
Remove an always true argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208557
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Rafael Espindola [Mon, 12 May 2014 13:20:37 +0000 (13:20 +0000)]
Remove write only field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208555
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Rafael Espindola [Mon, 12 May 2014 13:18:13 +0000 (13:18 +0000)]
Remove now empty method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208554
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Rafael Espindola [Mon, 12 May 2014 13:12:22 +0000 (13:12 +0000)]
Remove the always true UseCFI member.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208553
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Benjamin Kramer [Mon, 12 May 2014 13:12:08 +0000 (13:12 +0000)]
X86: Make sure that we have SSE4.1 before we generate insertps nodes.
PR19721.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208552
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Rafael Espindola [Mon, 12 May 2014 13:07:11 +0000 (13:07 +0000)]
Remove the useCFI constructor argument to MCAsmStreamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208551
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Daniel Sanders [Mon, 12 May 2014 13:04:32 +0000 (13:04 +0000)]
[mips] Marked up instructions added in MIPS32 and tested that IAS for -mcpu=mips2 does not accept them
Summary:
To limit the number of tests required, only one 32-bit and one 64-bit ISA
prior to MIPS32/MIPS64 are explicitly tested.
Depends on D3695
Reviewers: vmedic
Differential Revision: http://reviews.llvm.org/D3696
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208549
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Rafael Espindola [Mon, 12 May 2014 13:01:42 +0000 (13:01 +0000)]
Remove MCUseCFI from TargetMachine.
It was always true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208547
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Daniel Sanders [Mon, 12 May 2014 12:52:44 +0000 (12:52 +0000)]
[mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=mips[1234] does not accept them
Summary:
This required a new instruction group representing the 32-bit subset of
MIPS-V that was available in MIPS32R2
Most of these instructions are correctly rejected but with the wrong error
message. These have been placed in a separate test for now. It happens
because many of the MIPS V instructions have not been implemented.
Depends on D3694
Reviewers: vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3695
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208546
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Daniel Sanders [Mon, 12 May 2014 12:41:59 +0000 (12:41 +0000)]
[mips] Fold FeatureBitCount into FeatureMips32 and FeatureMips64
Summary:
DCL[ZO] are now correctly marked as being MIPS64 instructions. This has no
effect on the CodeGen tests since expansion of i64 prevented their use
anyway.
The check for MIPS16 to prevent the use of CLZ no longer prevents DCLZ as
well. This is not a functional change since DCLZ is still prohibited by
being a MIPS64 instruction (MIPS16 is only compatible with MIPS32).
No functional change
Reviewers: vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3694
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208544
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Daniel Sanders [Mon, 12 May 2014 12:28:15 +0000 (12:28 +0000)]
[mips] Fold FeatureSEInReg into FeatureMips32r2
Summary: No functional change
Reviewers: vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3693
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208543
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Daniel Sanders [Mon, 12 May 2014 12:15:41 +0000 (12:15 +0000)]
[mips] Fold FeatureSwap into FeatureMips32r2 and FeatureMips64r2
Summary:
dsbh and dshd are not available on Mips32r2. No codegen test changes
required since expansion of i64 prevented the use of these instructions
anyway.
Depends on D3690
Reviewers: vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3692
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208542
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Daniel Sanders [Mon, 12 May 2014 11:56:16 +0000 (11:56 +0000)]
[mips] Replace FeatureFPIdx with FeatureMips4_32r2
Summary:
No functional change.
The minor change to the MIPS16 code is in preparation for a patch that will handle 32-bit FPIdx instructions separately to 64-bit (because they were added in different revisions)
Depends on D3677
Reviewers: rkotler, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3690
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208541
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Bradley Smith [Mon, 12 May 2014 11:49:16 +0000 (11:49 +0000)]
[ARM64] Add proper bounds checking/diagnostics to logical shifts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208540
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Christian Pirker [Mon, 12 May 2014 11:19:20 +0000 (11:19 +0000)]
ARM: Implement big endian bit-conversion for NEON type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208538
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NAKAMURA Takumi [Mon, 12 May 2014 10:16:46 +0000 (10:16 +0000)]
X86ISelLowering.cpp:LowerINTRINSIC_W_CHAIN(): Prune impossible "default:" [-Wcovered-switch-default]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208533
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Serge Pavlov [Mon, 12 May 2014 10:11:27 +0000 (10:11 +0000)]
Fix type of shuffle obtained from reordering with binary operation
In transformation:
BinOp(shuffle(v1,undef), shuffle(v2,undef)) -> shuffle(BinOp(v1, v2),undef)
type of the undef argument must be same as type of BinOp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208531
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