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Sam McCall [Mon, 23 Jul 2018 10:44:40 +0000 (10:44 +0000)]
[Support] Add a UniqueStringSaver: like StringSaver, but deduplicating.
Summary: Clarify contract of StringSaver (it null-terminates, callers rely on it).
Reviewers: hokein
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D49596
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337677
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Roman Lebedev [Mon, 23 Jul 2018 10:10:13 +0000 (10:10 +0000)]
[NFC][MCA] ZnVer1: Update RegisterFile to identify false dependencies on partially written registers.
Summary:
Pretty mechanical follow-up for D49196.
As microarchitecture.pdf notes, "20 AMD Ryzen pipeline",
"20.8 Register renaming and out-of-order schedulers":
The integer register file has 168 physical registers of 64 bits each.
The floating point register file has 160 registers of 128 bits each.
"20.14 Partial register access":
The processor always keeps the different parts of an integer register together.
...
An instruction that writes to part of a register will therefore have a false dependence
on any previous write to the same register or any part of it.
Reviewers: andreadb, courbet, RKSimon, craig.topper, GGanesh
Reviewed By: GGanesh
Subscribers: gbedwell, llvm-commits
Differential Revision: https://reviews.llvm.org/D49393
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337676
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Roman Lebedev [Mon, 23 Jul 2018 10:10:04 +0000 (10:10 +0000)]
[NFC][MCA] ZnVer1: add partial-reg-update tests
Reviewers: andreadb, courbet, RKSimon, craig.topper, GGanesh
Reviewed By: GGanesh
Subscribers: gbedwell, llvm-commits
Differential Revision: https://reviews.llvm.org/D49392
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337675
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Alexandros Lamprineas [Mon, 23 Jul 2018 09:42:35 +0000 (09:42 +0000)]
[GVNHoist] safeToHoistLdSt allows illegal hoisting
Bug fix for PR36787. When reasoning if it's safe to hoist a load we
want to make sure that the defining memory access dominates the new
insertion point of the hoisted instruction. safeToHoistLdSt calls
firstInBB(InsertionPoint,DefiningAccess) which returns false if
InsertionPoint == DefiningAccess, and therefore it falsely thinks
it's safe to hoist.
Differential Revision: https://reviews.llvm.org/D49555
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337674
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Chandler Carruth [Mon, 23 Jul 2018 07:56:15 +0000 (07:56 +0000)]
[x86/SLH] Fix a bug where we would harden tail calls twice -- once as
a call, and then again as a return.
Also added a comment to try and explain better why we would be doing
what we're doing when hardening the (non-call) returns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337673
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Chandler Carruth [Mon, 23 Jul 2018 07:51:51 +0000 (07:51 +0000)]
[x86/SLH] Add a test covering indirect forms of control flow. NFC.
This specifically covers different ways of making indirect calls and
jumps. There are some bugs in SLH that I will be fixing in subsequent
patches where the diff in the generated instructions makes the bug fix
much more clear, so just checking in a baseline of this test to start.
I'm also going to be adding direct mitigation for variant 1.2 which this
file very specifically tests in the various forms it can arise on x86.
Again, the diff to the generated instructions should make the change for
that much more clear, so having the test as a baseline seems useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337672
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Chandler Carruth [Mon, 23 Jul 2018 04:01:34 +0000 (04:01 +0000)]
[x86/SLH] Rename and comment the main hardening function. NFC.
This provides an overview of the algorithm used to harden specific
loads. It also brings this our terminology further in line with
hardening rather than checking.
Differential Revision: https://reviews.llvm.org/D49583
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337667
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Jiading Gai [Sun, 22 Jul 2018 20:04:42 +0000 (20:04 +0000)]
Test commit, fix a minor typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337657
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Craig Topper [Sun, 22 Jul 2018 19:44:35 +0000 (19:44 +0000)]
[X86] Remove the max vector width restriction from combineLoopMAddPattern and rely splitOpsAndApply to handle splitting.
This seems to be a net improvement. There's still an issue under avx512f where we have a 512-bit vpaddd, but not vpmaddwd so we end up doing two 256-bit vpmaddwds and inserting the results before a 512-bit vpaddd. It might be better to do two 512-bits paddds with zeros in the upper half. Same number of instructions, but breaks a dependency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337656
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Xin Tong [Sun, 22 Jul 2018 05:27:41 +0000 (05:27 +0000)]
[ORE] Move loop invariant ORE checks outside the PM loop.
Summary:
This takes 22ms out of ~20s compiling sqlite3.c because we call it
for every unit of compilation and every pass.
Reviewers: paquette, anemet
Subscribers: mehdi_amini, llvm-commits
Differential Revision: https://reviews.llvm.org/D49586
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337654
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Craig Topper [Sun, 22 Jul 2018 05:16:50 +0000 (05:16 +0000)]
[SelectionDAGBuilder] Use APInt::isZero instead of comparing APInt::getZExtValue to 0 in a place where we can't be sure contents of the APInt fit in a uint64_t.
This is used on an extract vector element index which is most cases is going to be an i32 or i64 and the element will be a valid element number. But it is possible to construct IR with a larger type and large out of range value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337652
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Craig Topper [Sun, 22 Jul 2018 05:16:49 +0000 (05:16 +0000)]
[SelectionDAGBuilder] Restrict vector reduction check to types with a power of 2 number of elements.
The check for the shuffles usages probably isn't correct for non power of 2 vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337651
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Craig Topper [Sun, 22 Jul 2018 05:16:47 +0000 (05:16 +0000)]
[X86] Add more MADD recurrence test cases with larger and narrower vector widths.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337650
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Matt Davis [Sat, 21 Jul 2018 18:32:47 +0000 (18:32 +0000)]
[llvm-mca][docs] Add documentation for the statistic outputs from mca. NFC
Summary: The original text was lifted from the MCA README. I re-ran the dot-product example and updated the output seen in the docs. I also added a few paragraphs discussing the instruction issued and retired histograms, as well as discussing the register file stats.
Reviewers: andreadb, RKSimon, courbet, gbedwell, filcab
Reviewed By: andreadb
Subscribers: tschuett
Differential Revision: https://reviews.llvm.org/D49614
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337648
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Simon Atanasyan [Sat, 21 Jul 2018 16:16:08 +0000 (16:16 +0000)]
[mips] Factor out register class selection for global base register. NFC
Factor out register class selection for global base register into a
separate function to escape long chain of ternary operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337647
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Simon Atanasyan [Sat, 21 Jul 2018 16:16:03 +0000 (16:16 +0000)]
[mips] Move out the WrapperPat declaration from the NotInMicroMips predicate
This is a follow-up to the rL335185. Those commit adds some WrapperPat
patterns for microMIPS target. But declaration of the WrapperPat class
is under the NotInMicroMips predicate and microMIPS patterns cannot be
selected because predicate (Subtarget->inMicroMipsMode()) &&
(!Subtarget->inMicroMipsMode()) is always false.
This change move out the WrapperPat class declaration from the
NotInMicroMips predicate and enables microMIPS WrapperPat patterns.
Differential revision: https://reviews.llvm.org/D49533
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337646
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Zachary Turner [Sat, 21 Jul 2018 15:39:05 +0000 (15:39 +0000)]
[llvm-undname] Flush output before demangling.
If an error occurs and we write it to stderr, it could appear
before we wrote the mangled name which we're undecorating.
By flushing stdout first, we ensure that the messages are always
sequenced in the correct order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337645
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Zachary Turner [Sat, 21 Jul 2018 15:38:47 +0000 (15:38 +0000)]
Fix the MSVC Visualizers for SmallVector classes.
Recent changes to the internal structure of SmallVector<> broke
all of the MSVC visualizers. This fixes them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337644
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Aditya Kumar [Sat, 21 Jul 2018 14:13:44 +0000 (14:13 +0000)]
Early exit with cheaper checks
Reviewers: sebpop,davide,fhahn,trentxintong
Differential Revision: https://reviews.llvm.org/D49617
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337643
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Chen Zheng [Sat, 21 Jul 2018 12:27:54 +0000 (12:27 +0000)]
[InstrSimplify] fold sdiv if two operands are negated and non-overflow
Differential Revision: https://reviews.llvm.org/D49382
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337642
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Aaron Smith [Sat, 21 Jul 2018 05:42:13 +0000 (05:42 +0000)]
[DebugInfo] Add a new DI flag to record if a C++ record is a trivial type
Summary:
This flag is used when emitting debug info and is needed to initialize subprogram and member function attributes (function options) for Codeview. These function options are used to create an accurate compiler type for UDT symbols (class/struct/union) from PDBs.
It is not easy to determine if a C++ record is trivial or not based on the current DICompositeType flags and other accessible debug information from Codeview. For example, without this flag the metadata for a non-trivial C++ record with user-defined ctor and a trivial one with a defaulted ctor are the same.
struct S { S(); }
struct S { S() = default; }
This change introduces a new DI flag and corresponding clang::CXXRecordDecl::isTrivial method to set the flag in the frontend.
Reviewers: rnk, zturner, llvm-commits, dblaikie, aleksandr.urakov, deadalnix
Reviewed By: rnk
Subscribers: asmith, probinson, aprantl, JDevlieghere
Differential Revision: https://reviews.llvm.org/D45122
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337641
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Lang Hames [Sat, 21 Jul 2018 00:12:05 +0000 (00:12 +0000)]
[ORC] Re-apply r336760 with fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337637
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Lang Hames [Fri, 20 Jul 2018 22:22:19 +0000 (22:22 +0000)]
Re-apply r337595 with fix for LLVM_ENABLE_THREADS=Off.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337626
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Benjamin Kramer [Fri, 20 Jul 2018 22:15:09 +0000 (22:15 +0000)]
[ADT] Only run death tests in !NDEBUG
These invoke undefined behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337625
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Krzysztof Parzyszek [Fri, 20 Jul 2018 21:55:55 +0000 (21:55 +0000)]
[Hexagon] Disable packets in test to avoid ordering issues in checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337624
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Peter Collingbourne [Fri, 20 Jul 2018 21:43:20 +0000 (21:43 +0000)]
Change the cap on the amount of padding for each vtable to 32-byte (previously it was 128-byte)
We tested different cap values with a recent commit of Chromium. Our results show that the 32-byte cap yields the smallest binary and all the caps yield similar performance.
Based on the results, we propose to change the cap value to 32-byte.
Patch by Zhaomo Yang!
Differential Revision: https://reviews.llvm.org/D49405
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337622
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Matt Arsenault [Fri, 20 Jul 2018 21:20:36 +0000 (21:20 +0000)]
AMDGPU: Use existing function to check for VGPRs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337621
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Benjamin Kramer [Fri, 20 Jul 2018 20:59:46 +0000 (20:59 +0000)]
Revert "[X86][AVX] Convert X86ISD::VBROADCAST demanded elts combine to use SimplifyDemandedVectorElts"
This reverts commit r337547. It triggers an infinite loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337617
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Martin Storsjo [Fri, 20 Jul 2018 20:48:36 +0000 (20:48 +0000)]
[llvm-undname] Remove a superfluous semicolon. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337615
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Martin Storsjo [Fri, 20 Jul 2018 20:48:33 +0000 (20:48 +0000)]
[COFF] Use symbolic constants instead of hardcoded numbers. NFCI.
Patch by Martell Malone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337614
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Martin Storsjo [Fri, 20 Jul 2018 20:48:29 +0000 (20:48 +0000)]
[COFF] Adjust how we flag weak externals
This fixes PR36096.
Originally based on a patch by Martell Malone.
Differential Revision: https://reviews.llvm.org/D44357
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337613
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George Karpenkov [Fri, 20 Jul 2018 20:21:57 +0000 (20:21 +0000)]
[FileCheck] Provide an option for FileCheck to dump original input to stderr on failure
The option can be either set using environment variable (e.g. env
FILECHECK_DUMP_INPUT_ON_FAILURE=1 ninja check-fuzzer) or with a
FileCheck flag.
This can be extremely useful for debugging, cf.
https://groups.google.com/forum/#!topic/llvm-dev/kLrzg8OM_h8 for
discussion.
Differential Revision: https://reviews.llvm.org/D49328
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337609
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Reid Kleckner [Fri, 20 Jul 2018 20:20:45 +0000 (20:20 +0000)]
Revert r337595 "[ORC] Add new symbol lookup methods to ExecutionSessionBase in preparation for"
Breaks the build with LLVM_ENABLE_THREADS=OFF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337608
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Roman Tereshin [Fri, 20 Jul 2018 20:10:04 +0000 (20:10 +0000)]
Reapply "[LSV] Refactoring + supporting bitcasts to a type of different size"
This reapplies commit r337489 reverted by r337541
Additionally, this commit contains a speculative fix to the issue reported in r337541
(the report does not contain an actionable reproducer, just a stack trace)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337606
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Joel E. Denny [Fri, 20 Jul 2018 20:09:56 +0000 (20:09 +0000)]
[FileCheck] Fix search ranges for DAG-NOT-DAG
A DAG-NOT-DAG is a CHECK-DAG group, X, followed by a CHECK-NOT group,
N, followed by a CHECK-DAG group, Y. Let y be the initial directive
of Y. This patch makes the following changes to the behavior:
1. Directives in N can no longer match within part of Y's match
range just because y happens not to be the earliest match from
Y. Specifically, this patch withdraws N's search range end
from y's match range start to Y's match range start.
2. y can no longer match within X's match range, where a y match
produced a reordering complaint, which is thus no longer
possible. Specifically, this patch withdraws y's search range
start from X's permitted range start to X's match range end,
which was already the search range start for other members of
Y.
Both of these changes can only increase the number of test passes: #1
constrains the ability of CHECK-NOTs to match, and #2 expands the
ability of CHECK-DAGs to match without complaints.
These changes are based on discussions at:
<http://lists.llvm.org/pipermail/llvm-dev/2018-May/123550.html>
<https://reviews.llvm.org/D47106>
which conclude that:
1. These changes simplify the FileCheck conceptual model. First,
it makes search ranges for DAG-NOT-DAG more consistent with
other cases. Second, it was confusing that y was treated
differently from the rest of Y.
2. These changes add theoretical use cases for DAG-NOT-DAG that
had no obvious means to be expressed otherwise. We can justify
the first half of this assertion with the observation that
these changes can only increase the number of test passes.
3. Reordering detection for DAG-NOT-DAG had no obvious real
benefit.
We don't have evidence from real uses cases to help us debate
conclusions #2 and #3, but #1 at least seems intuitive.
Reviewed By: probinson
Differential Revision: https://reviews.llvm.org/D48986
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337605
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Jordan Rupprecht [Fri, 20 Jul 2018 19:54:24 +0000 (19:54 +0000)]
[llvm-objcopy] Add basic support for --rename-section
Summary:
Add basic support for --rename-section=old=new to llvm-objcopy.
A full replacement for GNU objcopy requires also modifying flags (i.e. --rename-section=old=new,flag1,flag2); I'd like to keep that in a separate change to keep this simple.
Reviewers: jakehehrlich, alexshap
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D49576
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337604
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Reid Kleckner [Fri, 20 Jul 2018 18:45:01 +0000 (18:45 +0000)]
And add a lit substitution for llvm-undname, as the comment says to
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337600
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Martin Storsjo [Fri, 20 Jul 2018 18:43:42 +0000 (18:43 +0000)]
Remove a superfluous semicolon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337599
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Reid Kleckner [Fri, 20 Jul 2018 18:42:19 +0000 (18:42 +0000)]
Make check-llvm depend on llvm-undname
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337597
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Zachary Turner [Fri, 20 Jul 2018 18:35:06 +0000 (18:35 +0000)]
[Demangler] Correctly factor in assignment when allocating.
Incidentally all allocations that we currently perform were
properly aligned, but this was only an accident.
Thanks to Erik Pilkington for catching this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337596
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Lang Hames [Fri, 20 Jul 2018 18:31:53 +0000 (18:31 +0000)]
[ORC] Add new symbol lookup methods to ExecutionSessionBase in preparation for
deprecating SymbolResolver and AsynchronousSymbolQuery.
Both lookup overloads take a VSO search order to perform the lookup. The first
overload is non-blocking and takes OnResolved and OnReady callbacks. The second
is blocking, takes a boolean flag to indicate whether to wait until all symbols
are ready, and returns a SymbolMap. Both overloads take a RegisterDependencies
function to register symbol dependencies (if any) on the query.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337595
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Lang Hames [Fri, 20 Jul 2018 18:31:52 +0000 (18:31 +0000)]
[ORC] Simplify VSO::lookupFlags to return the flags map.
This discards the unresolved symbols set and returns the flags map directly
(rather than mutating it via the first argument).
The unresolved symbols result made it easy to chain lookupFlags calls, but such
chaining should be rare to non-existant (especially now that symbol resolvers
are being deprecated) so the simpler method signature is preferable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337594
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Lang Hames [Fri, 20 Jul 2018 18:31:50 +0000 (18:31 +0000)]
[ORC] Replace SymbolResolvers in the new ORC layers with search orders on VSOs.
A search order is a list of VSOs to be searched linearly to find symbols. Each
VSO now has a search order that will be used when fixing up definitions in that
VSO. Each VSO's search order defaults to just that VSO itself.
This is a first step towards removing symbol resolvers from ORC altogether. In
practice symbol resolvers tended to be used to implement a search order anyway,
sometimes with additional programatic generation of symbols. Now that VSOs
support programmatic generation of definitions via fallback generators, search
orders provide a cleaner way to achieve the desired effect (while removing a lot
of boilerplate).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337593
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Benjamin Kramer [Fri, 20 Jul 2018 18:22:12 +0000 (18:22 +0000)]
[Demangler] Add missing overrides
-Winconsistent-missing-override complains about this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337592
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Zachary Turner [Fri, 20 Jul 2018 18:07:33 +0000 (18:07 +0000)]
Fix a few warnings and style issues in MS demangler.
Also remove a broken test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337591
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Craig Topper [Fri, 20 Jul 2018 17:57:53 +0000 (17:57 +0000)]
[X86] Remove isel patterns for MOVSS/MOVSD ISD opcodes with integer types.
Ideally our ISD node types going into the isel table would have types consistent with their instruction domain. This prevents us having to duplicate patterns with different types for the same instruction.
Unfortunately, it seems our shuffle combining is currently relying on this a little remove some bitcasts. This seems to enable some switching between shufps and shufd. Hopefully there's some way we can address this in the combining.
Differential Revision: https://reviews.llvm.org/D49280
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337590
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Craig Topper [Fri, 20 Jul 2018 17:57:42 +0000 (17:57 +0000)]
[X86] Remove what appear to be unnecessary uses of DCI.CombineTo
CombineTo is most useful when you need to replace multiple results, avoid the worklist management, or you need to something else after the combine, etc. Otherwise you should be able to just return the new node and let DAGCombiner go through its usual worklist code.
All of the places changed in this patch look to be standard cases where we should be able to use the more stand behavior of just returning the new node.
Differential Revision: https://reviews.llvm.org/D49569
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337589
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Zachary Turner [Fri, 20 Jul 2018 17:50:53 +0000 (17:50 +0000)]
Fix linker failure with Any.
This is due to a difference in MS ABI which is why I didn't see
it locally. The included fix should work on all compilers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337588
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Fri, 20 Jul 2018 17:43:42 +0000 (17:43 +0000)]
[llvm-mca][x86] Add movsx/movzx instructions to general x86_64 resource tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337586
91177308-0d34-0410-b5e6-
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Zachary Turner [Fri, 20 Jul 2018 17:27:48 +0000 (17:27 +0000)]
Add a Microsoft Demangler.
This adds initial support for a demangling library (LLVMDemangle)
and tool (llvm-undname) for demangling Microsoft names. This
doesn't cover 100% of cases and there are some known limitations
which I intend to address in followup patches, at least until such
time that we have (near) 100% test coverage matching up with all
of the test cases in clang/test/CodeGenCXX/mangle-ms-*.
Differential Revision: https://reviews.llvm.org/D49552
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337584
91177308-0d34-0410-b5e6-
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Philip Pfaffe [Fri, 20 Jul 2018 17:24:11 +0000 (17:24 +0000)]
[Any] Fix a typo: didn't use the correct argument
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337583
91177308-0d34-0410-b5e6-
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Alina Sbirlea [Fri, 20 Jul 2018 17:13:05 +0000 (17:13 +0000)]
[MemorySSA] Add API to update MemoryPhis, following CFG changes.
Summary:
When splitting predecessors in BasicBlockUtils, we create a new block as an immediate predecessor of the original BB, then we connect a given set of predecessors to the new block.
The API in this patch will be used to update MemoryPhis for this CFG change.
If all predecessors are being moved, we move the MemoryPhi directly. Otherwise we create a new MemoryPhi in the NewBB and populate its incoming values, while deleting them from BB's Phi.
[Split from D45299 for easier review]
Reviewers: george.burgess.iv
Subscribers: sanjoy, jlebar, Prazek, llvm-commits
Differential Revision: https://reviews.llvm.org/D49156
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337581
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Fri, 20 Jul 2018 16:55:18 +0000 (16:55 +0000)]
[X86][XOP] Fix SUB constant folding for VPSHA/VPSHL shift lowering
We can safely use getConstant here as we're still lowering, which allows constant folding to kick in and simplify the vector shift codegen.
Noticed while working on D49562.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337578
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Alexander Potapenko [Fri, 20 Jul 2018 16:52:12 +0000 (16:52 +0000)]
[MSan] Hotfix compilation
Make sure NewSI is used in materializeStores()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337577
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Zachary Turner [Fri, 20 Jul 2018 16:51:55 +0000 (16:51 +0000)]
Change bool_constant to integral_constant.
bool_constant is C++17.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337576
91177308-0d34-0410-b5e6-
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Evandro Menezes [Fri, 20 Jul 2018 16:49:28 +0000 (16:49 +0000)]
[ARM] Add new feature to enable optimizing the VFP registers
Enable the optimization of operations on DPR and SPR via a feature instead
of checking the target.
Differential revision: https://reviews.llvm.org/D49463
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337575
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Zachary Turner [Fri, 20 Jul 2018 16:39:32 +0000 (16:39 +0000)]
Add llvm::Any.
This is analogous to std::any which is only available in C++17.
Differential Revision: https://reviews.llvm.org/D48807
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337573
91177308-0d34-0410-b5e6-
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Zachary Turner [Fri, 20 Jul 2018 16:30:02 +0000 (16:30 +0000)]
Rewrite the VS integration scripts.
This is a new modernized VS integration installer. It adds a
Visual Studio .sln file which, when built, outputs a VSIX that can
be used to install ourselves as a "real" Visual Studio Extension.
We can even upload this extension to the visual studio marketplace.
This fixes a longstanding problem where we didn't support installing
into VS 2017 and higher. In addition to supporting VS 2017, due
to the way this is written we now longer need to do anything special
to support future versions of VS as well. Everything should
"just work". This also fixes several bugs with our old integration,
such as MSBuild triggering full rebuilds when /Zi was used.
Finally, we add a new UI page called "LLVM" which becomes visible
when the LLVM toolchain is selected. For now this only contains
one option which is the path to clang-cl.exe, but in the future
we can add more things here.
Differential Revision: https://reviews.llvm.org/D42762
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337572
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Alexander Potapenko [Fri, 20 Jul 2018 16:28:49 +0000 (16:28 +0000)]
[MSan] run materializeChecks() before materializeStores()
When pointer checking is enabled, it's important that every pointer is
checked before its value is used.
For stores MSan used to generate code that calculates shadow/origin
addresses from a pointer before checking it.
For userspace this isn't a problem, because the shadow calculation code
is quite simple and compiler is able to move it after the check on -O2.
But for KMSAN getShadowOriginPtr() creates a runtime call, so we want the
check to be performed strictly before that call.
Swapping materializeChecks() and materializeStores() resolves the issue:
both functions insert code before the given IR location, so the new
insertion order guarantees that the code calculating shadow address is
between the address check and the memory access.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337571
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Fri, 20 Jul 2018 16:20:45 +0000 (16:20 +0000)]
[X86][SSE] Use SplitOpsAndApply to improve HADD/HSUB lowering
Improve AVX1 256-bit vector HADD/HSUB matching by using SplitOpsAndApply to split into 128-bit instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337568
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Stella Stamenova [Fri, 20 Jul 2018 16:19:36 +0000 (16:19 +0000)]
[llvm-objcopy, tests] Fix several llvm-objcopy tests
Summary: In Python 3, sys.stdout.write expects a string rather than bytes. In order to be able to write the bytes to stdout, we need to use the buffer directly instead. This change is borrowing the implementation for writing to stdout that cat.py uses. Note that we cannot use cat.py directly because the file we are trying to open is a gzip file.
Reviewers: asmith, bkramer, alexshap, jakehehrlich
Reviewed By: alexshap, jakehehrlich
Subscribers: jakehehrlich, llvm-commits
Differential Revision: https://reviews.llvm.org/D49515
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337567
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Simon Pilgrim [Fri, 20 Jul 2018 15:51:01 +0000 (15:51 +0000)]
[X86][AVX] Add support for i16 256-bit vector horizontal op redundant shuffle removal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337566
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Fri, 20 Jul 2018 15:41:15 +0000 (15:41 +0000)]
[X86][AVX] Add v16i16 horizontal op redundant shuffle tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337565
91177308-0d34-0410-b5e6-
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Pavel Labath [Fri, 20 Jul 2018 15:40:24 +0000 (15:40 +0000)]
Fix build breakage from r337562
I changed a variable's type from pointer to reference, but forgot to
update the assert-only code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337564
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Nirav Dave [Fri, 20 Jul 2018 15:27:24 +0000 (15:27 +0000)]
[DAG] Avoid Node Update assertion due to AND simplification
Check for construction-time folding for incomplete AND nodes in
BackwardsPropagateMask.
Fixes PR38185.
Reviewers: RKSimon, samparker
Reviewed By: samparker
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D49444
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337563
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Pavel Labath [Fri, 20 Jul 2018 15:24:13 +0000 (15:24 +0000)]
DwarfDebug: Reduce duplication in addAccel*** methods
Summary:
Each of the four methods had a dozen lines and was doing almost exactly
the same thing: get the appropriate accelerator table kind and insert an
entry into it. I move this common logic to a helper function and make
these methods delegate to it.
This came up in the context of D49493, where I've needed to make adding
a string to a string pool slightly more complicated, and it seemed to
make sense to do it in one place instead of five.
To make this work I've needed to unify the interface of the AccelTable
data types, as some used to store DIE& and others DIE*. I chose to unify
to a reference as that's what the caller uses.
This technically isn't NFC, because it changes the StringPool used for
apple tables in the DWO case (now it uses the main file like DWARF v5
instead of the DWO file). However, that shouldn't matter, as DWO is not
a thing on apple targets (clang frontend simply ignores -gsplit-dwarf).
Reviewers: JDevlieghere, aprantl, probinson
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D49542
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337562
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Simon Pilgrim [Fri, 20 Jul 2018 15:24:12 +0000 (15:24 +0000)]
[X86][AVX] Add support for 32/64 bits 256-bit vector horizontal op redundant shuffle removal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337561
91177308-0d34-0410-b5e6-
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Nirav Dave [Fri, 20 Jul 2018 15:20:50 +0000 (15:20 +0000)]
[DAG] Fix Memory ordering check in ReduceLoadOpStore.
When merging through a TokenFactor we need to check that the
load may be ordered such that no other aliasing memory operations may
happen. It is not sufficient to just check that the load is a member
of the chain token factor as it there may be a indirect chain. Require
the load's chain has only one use.
This fixes PR37826.
Reviewers: spatel, davide, efriedma, craig.topper, RKSimon
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D49388
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337560
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Simon Pilgrim [Fri, 20 Jul 2018 15:07:53 +0000 (15:07 +0000)]
[X86][AVX] Add 256-bit vector horizontal op redundant shuffle tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337558
91177308-0d34-0410-b5e6-
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Florian Hahn [Fri, 20 Jul 2018 14:37:10 +0000 (14:37 +0000)]
[IPSCCP] Fix for bot failure caused by r337548
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337554
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Simon Pilgrim [Fri, 20 Jul 2018 13:58:57 +0000 (13:58 +0000)]
Regenerate partial vector fold test. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337551
91177308-0d34-0410-b5e6-
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Chen Zheng [Fri, 20 Jul 2018 13:38:59 +0000 (13:38 +0000)]
[NFC][testcases] fold sdiv if two operands are negated and non-overflow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337549
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Florian Hahn [Fri, 20 Jul 2018 13:29:12 +0000 (13:29 +0000)]
Recommit r328307: [IPSCCP] Use constant range information for comparisons of parameters.
This version contains a fix to add values for which the state in ParamState change
to the worklist if the state in ValueState did not change. To avoid adding the
same value multiple times, mergeInValue returns true, if it added the value to
the worklist. The value is added to the worklist depending on its state in
ValueState.
Original message:
For comparisons with parameters, we can use the ParamState lattice
elements which also provide constant range information. This improves
the code for PR33253 further and gets us closer to use
ValueLatticeElement for all values.
Also, as we are using the range information in the solver directly, we
do not need tryToReplaceWithConstantRange afterwards anymore.
Reviewers: dberlin, mssimpso, davide, efriedma
Reviewed By: mssimpso
Differential Revision: https://reviews.llvm.org/D43762
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337548
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Simon Pilgrim [Fri, 20 Jul 2018 13:26:51 +0000 (13:26 +0000)]
[X86][AVX] Convert X86ISD::VBROADCAST demanded elts combine to use SimplifyDemandedVectorElts
This is an early step towards using SimplifyDemandedVectorElts for target shuffle combining - this merely moves the existing X86ISD::VBROADCAST simplification code to use the SimplifyDemandedVectorElts mechanism.
Adds X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode to handle X86ISD::VBROADCAST - in time we can support all target shuffles (and other ops) here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337547
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Simon Pilgrim [Fri, 20 Jul 2018 13:14:29 +0000 (13:14 +0000)]
Regenerate remainder test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337546
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Chen Zheng [Fri, 20 Jul 2018 13:00:47 +0000 (13:00 +0000)]
[InstSimplify] fold srem instruction if its two operands are negated.
Differential Revision: https://reviews.llvm.org/D49423
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337545
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Pavel Labath [Fri, 20 Jul 2018 12:59:05 +0000 (12:59 +0000)]
[DebugInfo] Generate .debug_names section when it makes sense
Summary:
This patch makes us generate the debug_names section in response to some
user-facing commands (previously it was only generated if explicitly
selected via the -accel-tables option).
My goal was to make this work for DWARF>=5 (as it's an official part of
that standard), and also, as an extension, for DWARF<5 if one is
explicitly tuning for lldb as a debugger (because it brings a large
performance improvement there).
This is slightly complicated by the fact that the debug_names tables are
incompatible with the DWARF v4 type units (they assume that the type
units are in the debug_info section), and unfortunately, right now we
generate DWARF v4-style type units even for -gdwarf-5. For this reason,
I disable all accelerator tables if the user requested type unit
generation. I do this even for apple tables, as they have the same
problem (in fact generating type units for apple targets makes us crash
even before we get around to emitting the accelerator tables).
Reviewers: JDevlieghere, aprantl, dblaikie, echristo, probinson
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D49420
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337544
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Chen Zheng [Fri, 20 Jul 2018 12:53:45 +0000 (12:53 +0000)]
[NFC][testcases] more testcases for folding srem if its two operands are negatived.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337543
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Ulrich Weigand [Fri, 20 Jul 2018 12:12:10 +0000 (12:12 +0000)]
[SystemZ] Test case formatting fixes
Fix systematically wrong whitespace from a prior automated change.
NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337542
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Sam McCall [Fri, 20 Jul 2018 12:03:00 +0000 (12:03 +0000)]
Revert "[LSV] Refactoring + supporting bitcasts to a type of different size"
This reverts commit r337489.
It causes asserts to fire in some TensorFlow tests, e.g.
tensorflow/compiler/tests/gather_test.py on GPU.
Example stack trace:
Start test case: GatherTest.testHigherRank
assertion failed at third_party/llvm/llvm/lib/Support/APInt.cpp:819 in llvm::APInt llvm::APInt::trunc(unsigned int) const: width && "Can't truncate to 0 bits"
@ 0x5559446ebe10 __assert_fail
@ 0x55593ef32f5e llvm::APInt::trunc()
@ 0x55593d78f86e (anonymous namespace)::Vectorizer::lookThroughComplexAddresses()
@ 0x55593d78f2bc (anonymous namespace)::Vectorizer::areConsecutivePointers()
@ 0x55593d78d128 (anonymous namespace)::Vectorizer::isConsecutiveAccess()
@ 0x55593d78c926 (anonymous namespace)::Vectorizer::vectorizeInstructions()
@ 0x55593d78c221 (anonymous namespace)::Vectorizer::vectorizeChains()
@ 0x55593d78b948 (anonymous namespace)::Vectorizer::run()
@ 0x55593d78b725 (anonymous namespace)::LoadStoreVectorizer::runOnFunction()
@ 0x55593edf4b17 llvm::FPPassManager::runOnFunction()
@ 0x55593edf4e55 llvm::FPPassManager::runOnModule()
@ 0x55593edf563c (anonymous namespace)::MPPassManager::runOnModule()
@ 0x55593edf5137 llvm::legacy::PassManagerImpl::run()
@ 0x55593edf5b71 llvm::legacy::PassManager::run()
@ 0x55593ced250d xla::gpu::IrDumpingPassManager::run()
@ 0x55593ced5033 xla::gpu::(anonymous namespace)::EmitModuleToPTX()
@ 0x55593ced40ba xla::gpu::(anonymous namespace)::CompileModuleToPtx()
@ 0x55593ced33d0 xla::gpu::CompileToPtx()
@ 0x55593b26b2a2 xla::gpu::NVPTXCompiler::RunBackend()
@ 0x55593b21f973 xla::Service::BuildExecutable()
@ 0x555938f44e64 xla::LocalService::CompileExecutable()
@ 0x555938f30a85 xla::LocalClient::Compile()
@ 0x555938de3c29 tensorflow::XlaCompilationCache::BuildExecutable()
@ 0x555938de4e9e tensorflow::XlaCompilationCache::CompileImpl()
@ 0x555938de3da5 tensorflow::XlaCompilationCache::Compile()
@ 0x555938c5d962 tensorflow::XlaLocalLaunchBase::Compute()
@ 0x555938c68151 tensorflow::XlaDevice::Compute()
@ 0x55593f389e1f tensorflow::(anonymous namespace)::ExecutorState::Process()
@ 0x55593f38a625 tensorflow::(anonymous namespace)::ExecutorState::ScheduleReady()::$_1::operator()()
*** SIGABRT received by PID 7798 (TID 7837) from PID 7798; ***
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337541
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Florian Hahn [Fri, 20 Jul 2018 10:12:31 +0000 (10:12 +0000)]
[UBSan] Also use blacklist for 'Address; Undefined' setting
It looks like currently the UBSan blacklist is only applied when "Undefined" is selected.
This patch updates the cmake file to apply it whenever Undefined is selected
(e.g. 'Address; Undefined' ). This allows us to use the workaround added in
rL335525 when using AddressSan and UBSan together.
Reviewers: eugenis, vitalybuka
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D49558
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337539
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Jonas Paulsson [Fri, 20 Jul 2018 09:40:43 +0000 (09:40 +0000)]
[SystemZ] Reimplent SchedModel IssueWidth and WriteRes/ReadAdvance mappings.
As a consequence of recent discussions
(http://lists.llvm.org/pipermail/llvm-dev/2018-May/123164.html), this patch
changes the SystemZ SchedModels so that the IssueWidth is 6, which is the
decoder capacity, and NumMicroOps become the number of decoder slots needed
per instruction.
In addition, the SchedWrite latencies now match the MachineInstructions
def-operand indexes, and ReadAdvances have been added on instructions with
one register operand and one memory operand.
Review: Ulrich Weigand
https://reviews.llvm.org/D47008
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337538
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Andrew V. Tischenko [Fri, 20 Jul 2018 09:39:14 +0000 (09:39 +0000)]
Improved sched model for X86 BSWAP* instrs.
Differential Revision: https://reviews.llvm.org/D49477
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337537
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Matt Arsenault [Fri, 20 Jul 2018 09:05:08 +0000 (09:05 +0000)]
Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"
Reverts r337079 with fix for msan error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337535
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Sander de Smalen [Fri, 20 Jul 2018 09:00:44 +0000 (09:00 +0000)]
[AArch64][SVE] Asm: Support for bit/byte reverse operations.
This patch adds the following instructions:
RBIT reverse bits within each active elemnt (predicated), e.g.
rbit z0.d, p0/m, z1.d
for 8, 16, 32 and 64 bit elements.
REV reverse order of elements in data/predicate vector
(unpredicated), e.g.
rev z0.d, z1.d
rev p0.d, p1.d
for 8, 16, 32 and 64 bit elements.
REVB reverse order of bytes within each active element, e.g.
revb z0.d, p0/m, z1.d
for 16, 32 and 64 bit elements.
REVH reverse order of 16-bit half-words within each active
element, e.g.
revh z0.d, p0/m, z1.d
for 32 and 64 bit elements.
REVW reverse order of 32-bit words within each active element,
e.g.
revw z0.d, p0/m, z1.d
for 64 bit elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337534
91177308-0d34-0410-b5e6-
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Sander de Smalen [Fri, 20 Jul 2018 08:47:26 +0000 (08:47 +0000)]
[AArch64][SVE] Asm: Support for FTMAD instruction.
Floating-point trigonometric multiply-add coefficient,
e.g.
ftmad z0.h, z0.h, z1.h, #7
with variants for 16, 32 and 64-bit elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337533
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Stephen Canon [Fri, 20 Jul 2018 03:50:55 +0000 (03:50 +0000)]
Add x86_64-unkown triple to llc for x86 test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337523
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Craig Topper [Fri, 20 Jul 2018 01:40:03 +0000 (01:40 +0000)]
[DAGCombiner] Fold X - (-Y *Z) -> X + (Y * Z)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337518
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Duncan P. N. Exon Smith [Fri, 20 Jul 2018 00:44:58 +0000 (00:44 +0000)]
Reapply "ADT: Shrink size of SmallVector by 8B on 64-bit platforms"
I'm optimistically reverting commit r337511, effectively reapplying
r337504 *without* changes.
The failing bots that had `SmallVector` in the backtrace recovered after
the unrelated commit r337508. The backtraces looked bogus anyway, with
`SmallVector::size()` calling (e.g.) `ConstantArray::get()`.
Here's the original commit message:
ADT: Shrink size of SmallVector by 8B on 64-bit platforms
Represent size and capacity directly as unsigned and calculate
`end()` using `begin() + size()`.
This limits the maximum size/capacity of a vector to UINT32_MAX.
https://reviews.llvm.org/D48518
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337514
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Michael J. Spencer [Fri, 20 Jul 2018 00:24:36 +0000 (00:24 +0000)]
Revert "[docs] Add support for Markdown documentation in Sphinx"
The buildbots have an old version of Sphinx (need at least 1.3). Revert until they are upgraded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337513
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Heejin Ahn [Fri, 20 Jul 2018 00:13:42 +0000 (00:13 +0000)]
[WebAssembly] Disable a test that violates DR1696
Summary:
lifetime2.C violates DR1696, which prevents reference members from being
initialized to temporaries, whose lifetime would end at the end of ctor.
Reviewers: sbc100
Subscribers: dschuff, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D49577
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337512
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Duncan P. N. Exon Smith [Fri, 20 Jul 2018 00:09:56 +0000 (00:09 +0000)]
Revert "ADT: Shrink size of SmallVector by 8B on 64-bit platforms"
This reverts commit r337504 while I investigate a TSan bot failure that
seems related:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-autoconf/builds/26526
#8 0x000055581f2895d8 (/b/sanitizer-x86_64-linux-autoconf/build/tsan_debug_build/bin/clang-7+0x1eb45d8)
#9 0x000055581f294323 llvm::ConstantAggrKeyType<llvm::ConstantArray>::create(llvm::ArrayType*) const /b/sanitizer-x86_64-linux-autoconf/build/llvm/lib/IR/ConstantsContext.h:409:0
#10 0x000055581f294323 llvm::ConstantUniqueMap<llvm::ConstantArray>::create(llvm::ArrayType*, llvm::ConstantAggrKeyType<llvm::ConstantArray>, std::pair<unsigned int, std::pair<llvm::ArrayType*, llvm::ConstantAggrKeyType<llvm::ConstantArray> > >&) /b/sanitizer-x86_64-linux-autoconf/build/llvm/lib/IR/ConstantsContext.h:635:0
#11 0x000055581f294323 llvm::ConstantUniqueMap<llvm::ConstantArray>::getOrCreate(llvm::ArrayType*, llvm::ConstantAggrKeyType<llvm::ConstantArray>) /b/sanitizer-x86_64-linux-autoconf/build/llvm/lib/IR/ConstantsContext.h:654:0
#12 0x000055581f2944cb llvm::ConstantArray::get(llvm::ArrayType*, llvm::ArrayRef<llvm::Constant*>) /b/sanitizer-x86_64-linux-autoconf/build/llvm/lib/IR/Constants.cpp:964:0
#13 0x000055581fa27e19 llvm::SmallVectorBase::size() const /b/sanitizer-x86_64-linux-autoconf/build/llvm/include/llvm/ADT/SmallVector.h:53:0
#14 0x000055581fa27e19 llvm::SmallVectorImpl<llvm::Constant*>::resize(unsigned long) /b/sanitizer-x86_64-linux-autoconf/build/llvm/include/llvm/ADT/SmallVector.h:347:0
#15 0x000055581fa27e19 (anonymous namespace)::EmitArrayConstant(clang::CodeGen::CodeGenModule&, clang::ConstantArrayType const*, llvm::Type*, unsigned int, llvm::SmallVectorImpl<llvm::Constant*>&, llvm::Constant*) /b/sanitizer-x86_64-linux-autoconf/build/llvm/tools/clang/lib/CodeGen/CGExprConstant.cpp:669:0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337511
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Chandler Carruth [Thu, 19 Jul 2018 23:46:24 +0000 (23:46 +0000)]
[x86/SLH] Clean up helper naming for return instruction handling and
remove dead declaration of a call instruction handling helper.
This moves to the 'harden' terminology that I've been trying to settle
on for returns. It also adds a really detailed comment explaining what
all we're trying to accomplish with return instructions and why.
Hopefully this makes it much more clear what exactly is being
"hardened".
Differential Revision: https://reviews.llvm.org/D49571
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337510
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Michael J. Spencer [Thu, 19 Jul 2018 23:40:58 +0000 (23:40 +0000)]
[docs] Add support for Markdown documentation in Sphinx
Differential Revision: https://reviews.llvm.org/D44910
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337509
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Eli Friedman [Thu, 19 Jul 2018 23:02:07 +0000 (23:02 +0000)]
[SCCP] Don't use markForcedConstant on branch conditions.
It's more aggressive than we need to be, and leads to strange
workarounds in other places like call return value inference. Instead,
just directly mark an edge viable.
Tests by Florian Hahn.
Differential Revision: https://reviews.llvm.org/D49408
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337507
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Stephen Canon [Thu, 19 Jul 2018 22:46:42 +0000 (22:46 +0000)]
Skip out of SimplifyDemandedBits for BITCAST of f16 to i16
Mirrors the existing exit path for f128, avoiding a crash later on.
Differential Revision: https://reviews.llvm.org/D49524
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337506
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Duncan P. N. Exon Smith [Thu, 19 Jul 2018 22:29:47 +0000 (22:29 +0000)]
ADT: Shrink size of SmallVector by 8B on 64-bit platforms
Representing size and capacity directly as unsigned and calculate
`end()` using `begin() + size()`.
This limits the maximum size/capacity of a vector to UINT32_MAX.
https://reviews.llvm.org/D48518
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337504
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Teresa Johnson [Thu, 19 Jul 2018 22:25:56 +0000 (22:25 +0000)]
[ThinLTO] Only emit referenced type id records in index files
Summary:
Currently all type ids are emitted into the index file when it is
written. For distributed ThinLTO, that meant that all type ids were
being duplicated into every single distributed index file, regardless of
whether they were referenced, leading to huge amounts of unnecessary
duplication and size bloat.
Keep track of the type id GUIDs actually referenced by the GV summary
records being emitted, and only emit those type IDs.
Add a new test, and fix test/Assembler/thinlto-summary.ll so that all
type ids are referenced to prevent deletion in that test.
Reviewers: pcc
Subscribers: mehdi_amini, inglorion, eraman, steven_wu, dexonsmith, vitalybuka, llvm-commits
Differential Revision: https://reviews.llvm.org/D49565
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337503
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Craig Topper [Thu, 19 Jul 2018 22:24:43 +0000 (22:24 +0000)]
[DAGCombiner] Teach DAGCombiner that A-(-B) is A+B.
We already knew A+(-B) is A-B in visitAdd. This does the opposite for visitSub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337502
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Simon Pilgrim [Thu, 19 Jul 2018 21:52:06 +0000 (21:52 +0000)]
[X86][AVX] Use extract_subvector to reduce vector op widths (PR36761)
We have a number of cases where we fail to reduce vector op widths, performing the op in a larger vector and then extracting a subvector. This is often because by default it would create illegal types.
This peephole patch attempts to handle a few common cases detailed in PR36761, which typically involved extension+conversion to vX2f64 types.
Differential Revision: https://reviews.llvm.org/D49556
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337500
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