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Petr Hosek [Wed, 19 Jul 2017 02:09:37 +0000 (02:09 +0000)]
[llvm-readobj] Install llvm-readelf alias
Install an llvm-readelf symlink to llvm-readobj.
When invoked as *readelf*, default to -elf-output-style=GNU.
Patch by Roland McGrath
Differential Revision: https://reviews.llvm.org/D33869
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308408
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Saleem Abdulrasool [Wed, 19 Jul 2017 02:01:22 +0000 (02:01 +0000)]
Object: preserve more information about DEF file
Preserve the actual library name as provided by the user. This is
required to properly replicate link's behaviour about the module import
name handling. This requires an associated change to lld for updating
the tests for the proper behaviour for the import library module name
handling in various cases.
Associated tests will be part of the lld change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308406
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Weiming Zhao [Wed, 19 Jul 2017 01:27:24 +0000 (01:27 +0000)]
Fix DebugLoc propagation for unreachable LoadInst
Summary: Currently, when GVN creates a load and when InstCombine creates a new store for unreachable Load, the DebugLoc info gets lost.
Reviewers: dberlin, davide, aprantl
Reviewed By: aprantl
Subscribers: davide, llvm-commits
Differential Revision: https://reviews.llvm.org/D34639
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308404
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Adrian Prantl [Wed, 19 Jul 2017 00:09:54 +0000 (00:09 +0000)]
Debug Info: Add a file: field to DIImportedEntity.
DIImportedEntity has a line number, but not a file field. To determine
the decl_line/decl_file we combine the line number from the
DIImportedEntity with the file from the DIImportedEntity's scope. This
does not work correctly when the parent scope is a DINamespace or a
DIModule, both of which do not have a source file.
This patch adds a file field to DIImportedEntity to unambiguously
identify the source location of the using/import declaration. Most
testcase updates are mechanical, the interesting one is the removal of
the FIXME in test/DebugInfo/Generic/namespace.ll.
This fixes PR33822. See https://bugs.llvm.org/show_bug.cgi?id=33822
for more context.
<rdar://problem/
33357889>
https://bugs.llvm.org/show_bug.cgi?id=33822
Differential Revision: https://reviews.llvm.org/D35583
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308398
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Petr Hosek [Tue, 18 Jul 2017 23:58:15 +0000 (23:58 +0000)]
[llvm-readobj] Accept (and ignore) --wide (-W) command-line switch
Accept and ignore --wide/-W. In GNU readelf this switch is
necessary to get the output format that's consistent between
32-bit and 64-bit targets. llvm-readobj always produces that
output format.
Patch by Roland McGrath
Differential Revision: https://reviews.llvm.org/D33873
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308396
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Petr Hosek [Tue, 18 Jul 2017 23:35:22 +0000 (23:35 +0000)]
[llvm-readobj] Accept -S as an alias for --sections
In GNU readelf, the short option for --sections is upper-case -S.
Note that GNU uses lower-case -s to mean --symbols, while LLVM
uses -s to mean --sections and -t to mean --symbols (-t has yet a
different meaning in GNU). So command-line uses with -S can now
be compatible, but uses with -s or -t are still incompatible.
Patch by Roland McGrath
Differential Revision: https://reviews.llvm.org/D33872
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308392
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Evandro Menezes [Tue, 18 Jul 2017 22:51:25 +0000 (22:51 +0000)]
[AArch64] Adjust the feature set for Exynos M2
Add fusion of AES operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308388
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Vitaly Buka [Tue, 18 Jul 2017 22:28:03 +0000 (22:28 +0000)]
[asan] Copy arguments passed by value into explicit allocas for ASan
Summary:
ASan determines the stack layout from alloca instructions. Since
arguments marked as "byval" do not have an explicit alloca instruction, ASan
does not produce red zones for them. This commit produces an explicit alloca
instruction and copies the byval argument into the allocated memory so that red
zones are produced.
Submitted on behalf of @morehouse (Matt Morehouse)
Reviewers: eugenis, vitalybuka
Reviewed By: eugenis
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D34789
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308387
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Saleem Abdulrasool [Tue, 18 Jul 2017 22:11:01 +0000 (22:11 +0000)]
Object: rename parameter from DLLName to ImportName
When I originally wrote this code, I neglected the fact that the import
library may be created for executables. This name is not the name of
the DLL, but rather the name for the imported module. It will be
embedded into the IAT/ILT reference. Rename it to make it more obvious.
NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308384
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Saleem Abdulrasool [Tue, 18 Jul 2017 22:11:00 +0000 (22:11 +0000)]
Object: handle extensions properly in def files
When given an extension as part of the `library` directive in a def
file, the extension is preserved/honoured by link/lib. Behave similarly
when parsing the def file. This requires checking if a native extension
is provided as a keyword parameter. If no extension is present, append
a standard `.dll` or `.exe` extension.
This is best tested via lld, and I will add tests there as a follow up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308383
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Martell Malone [Tue, 18 Jul 2017 21:26:38 +0000 (21:26 +0000)]
llvm: add llvm-dlltool support to the archiver
A PE COFF spec compliant import library generator.
Intended to be used with mingw-w64.
Supports:
PE COFF spec (section 8, Import Library Format)
PE COFF spec (Aux Format 3: Weak Externals)
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D29892
This reapplies rL308329, which was reverted in rL308374
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308379
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Lang Hames [Tue, 18 Jul 2017 21:12:03 +0000 (21:12 +0000)]
[RuntimeDyld][MachO/ARM] Don't add a redundant relocation entry.
We only need to add this entry once for it to be fixed up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308375
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Rui Ueyama [Tue, 18 Jul 2017 21:07:13 +0000 (21:07 +0000)]
Revert r308329: llvm: add llvm-dlltool support to the archiver
This reverts commit r308329 because it broke buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308374
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Martell Malone [Tue, 18 Jul 2017 20:58:21 +0000 (20:58 +0000)]
llvm: fix -Wcast gcc warn error from rL308329
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308360
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Petr Hosek [Tue, 18 Jul 2017 20:54:02 +0000 (20:54 +0000)]
[CMake] Set toolchain tools in cross-target runtimes build
This is needed for runtimes build to work on Darwin.
Differential Revision: https://reviews.llvm.org/D35343
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308359
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Mandeep Singh Grang [Tue, 18 Jul 2017 20:41:33 +0000 (20:41 +0000)]
[COFF, ARM64] Reserve X18 register by default
Reviewers: compnerd, rnk, ruiu, mstorsjo
Reviewed By: mstorsjo
Subscribers: aemerson, javed.absar, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D35531
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308358
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Jakub Kuderski [Tue, 18 Jul 2017 20:19:52 +0000 (20:19 +0000)]
[Dominators] Improve error checking in deleteEdge
Summary: This patch improves error detection in deleteEdge. It asserts that the edge doesn't exist in the CFG and that DomTree knew about this edge before.
Reviewers: dberlin, grosser, brzycki, sanjoy
Reviewed By: dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35571
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308354
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Nirav Dave [Tue, 18 Jul 2017 20:06:24 +0000 (20:06 +0000)]
[DAG] Improve Aliasing of operations to static alloca
Re-recommiting after landing DAG extension-crash fix.
Recommiting after adding check to avoid miscomputing alias information
on addresses of the same base but different subindices.
Memory accesses offset from frame indices may alias, e.g., we
may merge write from function arguments passed on the stack when they
are contiguous. As a result, when checking aliasing, we consider the
underlying frame index's offset from the stack pointer.
Static allocs are realized as stack objects in SelectionDAG, but its
offset is not set until post-DAG causing DAGCombiner's alias check to
consider access to static allocas to frequently alias. Modify isAlias
to consider access between static allocas and access from other frame
objects to be considered aliasing.
Many test changes are included here. Most are fixes for tests which
indirectly relied on our aliasing ability and needed to be modified to
preserve their original intent.
The remaining tests have minor improvements due to relaxed
ordering. The exception is CodeGen/X86/2011-10-19-widen_vselect.ll
which has a minor degradation dispite though the pre-legalized DAG is
improved.
Reviewers: rnk, mkuper, jonpa, hfinkel, uweigand
Reviewed By: rnk
Subscribers: sdardis, nemanjai, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D33345
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308350
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Nirav Dave [Tue, 18 Jul 2017 19:49:20 +0000 (19:49 +0000)]
[DAG] Reverse node replacement in extension operation. NFCI.
Reorder replacements to be user first in preparation for multi-level
folding to premptively avoid inadvertantly deleting later nodes from
sharing found from replacement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308348
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Brian Gesiak [Tue, 18 Jul 2017 19:25:34 +0000 (19:25 +0000)]
[opt-viewer] Handle file names that contain '#'
Summary:
When using opt-viewer.py with files with '#' in their name, such as
'foo#bar.cpp', opt-viewer.py would generate links such as
'/path/to/foo#bar.cpp.opt.yaml#L42'. In this case, the link is
interpreted by browsers as a link to the file '/path/to/foo', and to the
section within that file with ID 'bar.cpp.opt.yaml#L42'.
To work around this issue, replace '#' with '_' in file names and links
in opt-viewer.py.
Reviewers: anemet, davidxl
Reviewed By: davidxl
Subscribers: llvm-commits, fhahn
Differential Revision: https://reviews.llvm.org/D34646
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308346
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James Y Knight [Tue, 18 Jul 2017 19:08:38 +0000 (19:08 +0000)]
[Sparc] Added software multiplication/division feature
Added a feature to the Sparc back-end that replaces the integer multiply and
divide instructions with calls to .mul/.sdiv/.udiv. This is a step towards
having full v7 support.
Patch by: Eric Kedaigle
Differential Revision: https://reviews.llvm.org/D35500
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308343
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Kostya Serebryany [Tue, 18 Jul 2017 18:47:36 +0000 (18:47 +0000)]
[libFuzzer] when adding a reduced input print REDUCED instead of NEW
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308336
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Hiroshi Inoue [Tue, 18 Jul 2017 17:52:47 +0000 (17:52 +0000)]
fix typos in a document; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308331
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Nirav Dave [Tue, 18 Jul 2017 17:39:15 +0000 (17:39 +0000)]
[DAG] Avoid deleting nodes before combining them.
When replacing a node and it's operand, replacing the operand node may
cause the deletion of the original node leading to an assertion
failure. Case around these replacements to avoid this without relying
on inspecting the DELETED_NODE opcode in various extend
dagcombiner cases.
Fixes PR32515.
Reviewers: dbabokin, RKSimon, davide, chandlerc
Subscribers: chandlerc, llvm-commits
Differential Revision: https://reviews.llvm.org/D34095
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308330
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Martell Malone [Tue, 18 Jul 2017 17:39:11 +0000 (17:39 +0000)]
llvm: add llvm-dlltool support to the archiver
A PE COFF spec compliant import library generator.
Intended to be used with mingw-w64.
Supports:
PE COFF spec (section 8, Import Library Format)
PE COFF spec (Aux Format 3: Weak Externals)
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D29892
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308329
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Matt Arsenault [Tue, 18 Jul 2017 16:44:58 +0000 (16:44 +0000)]
AMDGPU: Annotate necessity of flat-scratch-init
As an approximation of the existing handling to avoid
regressions. Fixes using too many registers with calls
on subtargets with the SGPR allocation bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308326
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Matt Arsenault [Tue, 18 Jul 2017 16:44:56 +0000 (16:44 +0000)]
AMDGPU: Figure out private memory regs after lowering
Introduce pseudo-registers for registers needed for stack
access, which are replaced during finalizeLowering.
Note these pseudo-registers are currently only used for the
used register location, and not for determining their
input argument register.
This is better because it avoids the need to try to predict
whether a call will be emitted from the IR, and also
detects stack objects introduced by legalization.
Test changes are from the HasStackObjects check being more
accurate since stack objects introduced during legalization
are now known.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308325
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Geoff Berry [Tue, 18 Jul 2017 16:14:22 +0000 (16:14 +0000)]
[AArch64][Falkor] Avoid HW prefetcher tag collisions (step 2)
Summary:
Avoid HW prefetcher instruction tag collisions in loops by inserting
MOVs to change the base address register of strided loads.
Reviewers: t.p.northover, mcrosier
Subscribers: aemerson, rengolin, javed.absar, kristof.beyls, hfinkel, llvm-commits
Differential Revision: https://reviews.llvm.org/D35366
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308324
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Simon Pilgrim [Tue, 18 Jul 2017 16:07:12 +0000 (16:07 +0000)]
[X86][AVX] Regenerate shift test to show constant broadcast comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308323
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Simon Pilgrim [Tue, 18 Jul 2017 15:55:30 +0000 (15:55 +0000)]
[x86, CGP] increase memcmp() expansion up to 4 load pairs
It should be a win to avoid going out to the system lib for all small memcmp() calls using scalar ops. For x86 32-bit, this means most everything up to 16 bytes. For 64-bit, that doubles because we can do 8-byte loads.
Notes:
Reduced from 4 to 2 loads for -Os behavior, which might not be optimal in all cases. It's effectively a question of how much do we trust the system implementation. Linux and macOS (and Windows I assume, but did not test) have optimized memcmp() code for x86, so it's probably not bad either way? PPC is using 8/4 for defaults on these. We do not expand at all for -Oz.
There are still potential improvements to make for the CGP expansion IR and/or lowering such as avoiding select-of-constants (D34904) and not doing zexts to the max load type before doing a compare.
We have special-case SSE/AVX codegen for (memcmp(x, y, 16/32) == 0) that will no longer be produced after this patch. I've shown the experimental justification for that change in PR33329:
https://bugs.llvm.org/show_bug.cgi?id=33329#c12
TLDR: While the vector code is a likely winner, we can't guarantee that it's a winner in all cases on all CPUs, so I'm willing to sacrifice it for the greater good of expanding all small memcmp(). If we want to resurrect that codegen, it can be done by adjusting the CGP params or poking a hole to let those fall-through the CGP expansion.
Committed on behalf of Sanjay Patel
Differential Revision: https://reviews.llvm.org/D35067
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308322
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Frederich Munch [Tue, 18 Jul 2017 15:50:28 +0000 (15:50 +0000)]
Make EHFrames available to sub-classes of RTDyldMemoryManager.
Summary: This information can be useful; and in the case of Win64, necessary for getting exceptions to work in the JIT.
Reviewers: lhames
Reviewed By: lhames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35102
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308321
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Davide Italiano [Tue, 18 Jul 2017 15:42:59 +0000 (15:42 +0000)]
[TRE] Simplify canTRE() a bit using all_of(). NFCI.
This has a ~11 years old FIXME, which may not be true today.
We might consider removing this code altogether.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308319
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Sumanth Gundapaneni [Tue, 18 Jul 2017 15:31:37 +0000 (15:31 +0000)]
[Hexagon] Emit lookup tables in text section based on a flag
The flag "-hexagon-emit-lut-text" (defaulted to false) is added to decide
on where to keep the switch generated lookup table.
Differential Revision: https://reviews.llvm.org/D34818
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308316
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Nicolai Haehnle [Tue, 18 Jul 2017 14:54:41 +0000 (14:54 +0000)]
AMDGPU: Fix crash when folding immediates into multiple uses
Summary:
When an immediate is folded by constant folding, we re-scan the entire
use list for two reasons:
1. The constant folding may have created a new use of the same reg.
2. The constant folding may have removed an additional use in the list
we're currently traversing (e.g., constant folding an S_ADD_I32 c, c).
However, this could previously lead to a crash when an unrelated use was
added twice into the FoldList. Since we re-scan the whole list anyway, we
might as well just clear the FoldList again before we do so.
Using a MIR test to show this because real code seems to trigger the issue
only in connection with some really subtle control flow structures.
Fixes GL45-CTS.shading_language_420pack.binding_images on gfx9.
Reviewers: arsenm
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D35416
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308314
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Nirav Dave [Tue, 18 Jul 2017 14:39:09 +0000 (14:39 +0000)]
[DAG] Allow base element type of store merge type to also be a vector.
Correctly calculate merged vector size if MemVT is already a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308312
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Simon Pilgrim [Tue, 18 Jul 2017 14:26:07 +0000 (14:26 +0000)]
[X86] Add optsize and minsize memcmp tests (D35067)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308311
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Sam Kolton [Tue, 18 Jul 2017 14:23:26 +0000 (14:23 +0000)]
[AMDGPU] resubmit r308179: CodeGen: check dst operand type to determine if omod is supported for VOP3 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308310
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Simon Pilgrim [Tue, 18 Jul 2017 14:19:34 +0000 (14:19 +0000)]
[X86] Added cmov target to memcmp test
As discussed by @spatel on D35067:
"I added the cmov attribute to the 32-bit codegen test because it removes some noise for that file. I think the intent for the SSE vs no-SSE runs is to show the potential difference for the 16 and 32 byte cases rather than the lack of cmov (which has been available for all CPUs since SSE1, so that's why it shows up automatically with -mattr=sse2)."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308309
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Daniel Sanders [Tue, 18 Jul 2017 14:10:07 +0000 (14:10 +0000)]
[globalisel][tablegen] Enable the import of rules involving fma.
Summary:
G_FMA was recently added to GlobalISel which enables the import of rules
involving fma. Add the mapping to allow it.
Reviewers: ab, t.p.northover, qcolombet, rovka, aditya_nandakumar
Reviewed By: rovka
Subscribers: kristof.beyls, javed.absar, igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D35130
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308308
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Hiroshi Inoue [Tue, 18 Jul 2017 13:31:40 +0000 (13:31 +0000)]
fix formatting issue; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308305
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Dmitry Preobrazhensky [Tue, 18 Jul 2017 13:12:48 +0000 (13:12 +0000)]
[AMDGPU][MC] Corrected disassembler for proper decoding of v_mqsad_u32_u8
See Bug 33639: https://bugs.llvm.org//show_bug.cgi?id=33639
Reviewers: vpykhtin, artem.tamazov
Differential Revision: https://reviews.llvm.org/D34892
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308303
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Simon Pilgrim [Tue, 18 Jul 2017 12:31:46 +0000 (12:31 +0000)]
[DAGCombine] Fix issue with out of bound constant rotation (PR33828)
Take the modulo of rotations by a constant greater than or equal to the bit-width
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308302
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Stefan Maksimovic [Tue, 18 Jul 2017 12:05:35 +0000 (12:05 +0000)]
[mips] Alter register classes for MSA pseudo f16 instructions
This change introduces additional machine instructions in functions
dealing with the expansion of msa pseudo f16 instructions due to
register classes being inappropriate when checked with machine
verifier.
Differential Revision: https://reviews.llvm.org/D34276
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308301
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Dorit Nuzman [Tue, 18 Jul 2017 11:57:08 +0000 (11:57 +0000)]
PSCEV] Create AddRec for Phis in cases of possible integer overflow,
using runtime checks
Extend the SCEVPredicateRewriter to work a bit harder when it encounters an
UnknownSCEV for a Phi node; Try to build an AddRecurrence also for Phi nodes
whose update chain involves casts that can be ignored under the proper runtime
overflow test. This is one step towards addressing PR30654.
Differential revision: http://reviews.llvm.org/D30041
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308299
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Alexander Potapenko [Tue, 18 Jul 2017 11:47:56 +0000 (11:47 +0000)]
[sancov] Fix PR33732
Coverage hooks that take less-than-64-bit-integers as parameters need the
zeroext parameter attribute (http://llvm.org/docs/LangRef.html#paramattrs)
to make sure they are properly extended by the x86_64 ABI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308296
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Simon Pilgrim [Tue, 18 Jul 2017 11:18:38 +0000 (11:18 +0000)]
[X86][AVX512] Add ISD::ROTL/ISD::ROTR constant folding tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308295
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Dmitry Preobrazhensky [Tue, 18 Jul 2017 11:14:02 +0000 (11:14 +0000)]
[AMDGPU][MC] Optimized IsRegIntersect function
Optimized IsRegIntersect by using MCRegAliasIterator
See Bug 33800: https://bugs.llvm.org//show_bug.cgi?id=33800
Reviewers: arsenm, artem.tamazov
Differential Revision: https://reviews.llvm.org/D35452
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308294
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George Rimar [Tue, 18 Jul 2017 10:59:30 +0000 (10:59 +0000)]
[libOption] - Replace std::pair with helper struct. NFC.
Splitted from D35476.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308293
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Javed Absar [Tue, 18 Jul 2017 10:19:48 +0000 (10:19 +0000)]
[ARM|CodeGen] Improve the code in FastISel
Cleaned up the code in FastISel a bit.
Had to add make_range to MCInstrDesc as that was needed and seems missing.
Reviewed by: @t.p.northover
Differential Revision: https://reviews.llvm.org/D35494
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308291
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Simon Pilgrim [Tue, 18 Jul 2017 10:09:40 +0000 (10:09 +0000)]
[X86] Add test case for PR32282
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308286
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Diana Picus [Tue, 18 Jul 2017 10:07:01 +0000 (10:07 +0000)]
[ARM] GlobalISel: Support G_(S|U)REM for s8 and s16
Widen to s32, and then do whatever Lowering/Custom/Libcall action the
subtarget wants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308285
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Florian Hahn [Tue, 18 Jul 2017 09:47:06 +0000 (09:47 +0000)]
[LoopInterchange] Split up interchange.ll test case (NFC).
Summary:
Currently most tests for the loop interchange pass are in
test/Transforms/LoopInterchange/interchange.ll. This patch splits up the
large test file in smaller pieces, which makes debugging test failures
easier.
Reviewers: karthikthecool, blitz.opensource, hfinkel
Reviewed By: hfinkel
Subscribers: hfinkel, mcrosier, mkuper, mzolotukhin, mssimpso, llvm-commits
Differential Revision: https://reviews.llvm.org/D35488
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308284
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Florian Hahn [Tue, 18 Jul 2017 09:31:18 +0000 (09:31 +0000)]
[AArch64] Use 16 bytes as preferred function alignment on Cortex-A73.
Summary:
Using 16 byte alignment is beneficial on Cortex-A73, similar to
Cortex-A72 (added in D34961).
Reviewers: mcrosier, t.p.northover, aadg, silviu.baranga
Reviewed By: t.p.northover
Subscribers: aemerson, rengolin, javed.absar, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D35493
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308283
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Dmitry Preobrazhensky [Tue, 18 Jul 2017 09:24:10 +0000 (09:24 +0000)]
[AMDGPU][MC] Added missing VOP3P opcodes
Added support of the following opcodes:
v_pk_sub_u16
v_pk_mad_i16
v_pk_mad_u16
See Bug 33593: https://bugs.llvm.org//show_bug.cgi?id=33593
Reviewers: vpykhtin, artem.tamazov, arsenm
Differential Revision: https://reviews.llvm.org/D34890
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308281
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Jonas Paulsson [Tue, 18 Jul 2017 09:17:00 +0000 (09:17 +0000)]
[SystemZ, AsmParser] Enable the mnemonic spell corrector.
This enables the suggestions of other mnemonics when invalid ones are
specified.
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308280
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Diana Picus [Tue, 18 Jul 2017 09:08:47 +0000 (09:08 +0000)]
GlobalISel: Support G_(S|U)REM widening in LegalizerHelper
Treat widening G_SREM and G_UREM the same as G_SDIV and G_UDIV. This is
going to be used in the ARM backend (and that's when the test will come
too).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308278
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NAKAMURA Takumi [Tue, 18 Jul 2017 08:52:02 +0000 (08:52 +0000)]
llvm/DebugInfo/CodeView/TypeStreamMerger.h: Prune a couple of \param(s), removed in r308212. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308276
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Serge Guelton [Tue, 18 Jul 2017 08:36:22 +0000 (08:36 +0000)]
Normalize constructor call syntax, NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308275
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Chandler Carruth [Tue, 18 Jul 2017 08:20:50 +0000 (08:20 +0000)]
Revert part of r308100 since the cause (r308025) was also reverted.
The commit r308100 updated WebAssembly tests for r308025. In one case it
merely made the test more resilient but in another case it made
a substantive update. Because r308025 was reverted in r308271, these
changes to the test also need to be reverted. They should be folded into
the recommit of r308025 when it is ready.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308273
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Chandler Carruth [Tue, 18 Jul 2017 08:16:32 +0000 (08:16 +0000)]
[x86] Add a missing triple, without which the CPU won't parse.
Notably, this is failing on our PPC build bots:
http://lab.llvm.org:8011/builders/clang-ppc64le-linux/builds/8338/steps/ninja%20check%201/logs/FAIL%3A%20LLVM%3A%3Apr33772.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308272
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Chandler Carruth [Tue, 18 Jul 2017 07:53:47 +0000 (07:53 +0000)]
Revert r308025 due to uncovering a crash in SelectionDAG. This is filed
with a minimal test case in http://llvm.org/PR33833.
Original commit message:
Improve Aliasing of operations to static alloca
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308271
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Chandler Carruth [Tue, 18 Jul 2017 07:40:47 +0000 (07:40 +0000)]
Revert r308179 which causes tablegen to spam stderr on every build.
Original commit log:
[AMDGPU] CodeGen: check dst operand type to determine if omod is supported for VOP3 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308270
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Craig Topper [Tue, 18 Jul 2017 06:49:23 +0000 (06:49 +0000)]
[X86] Prevent an assertion failure if a gather intrinsic is passed a non-constant scale value.
This isn't legal code, but we shouldn't crash on it. Now we just don't convert the gather intrinsic if the scale isn't constant and let it go through to isel where we'll report an isel failure.
Fixes PR33772.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308267
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Serguei Katkov [Tue, 18 Jul 2017 05:16:38 +0000 (05:16 +0000)]
[CGP] Cleanup - remove redundant code in OptimizeMemoryInst. NFC
optimizeMemoryInst contains a vector AddrModeInsts.
The only use of this vector is to check that all instructions are in the same
block as memory instruction. This check is guarded by PhiSeen flag,
so if we traversed through phi node then we do not need to keep information
in AddrModeInsts. AddModeInsts is set first time we found some addressing mode
and updated if we found new one later.
We can find next addressing mode only if we traverse phi node so all code
related to update of AddModeInsts can be safely removed.
Reviewers: loladiro, spatel, efriedma
Reviewed By: efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35291
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308265
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Max Kazantsev [Tue, 18 Jul 2017 04:53:48 +0000 (04:53 +0000)]
[IRCE] Recognize loops with ne/eq latch conditions
In some particular cases eq/ne conditions can be turned into equivalent
slt/sgt conditions. This patch teaches parseLoopStructure to handle some
of these cases.
Differential Revision: https://reviews.llvm.org/D35010
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308264
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Eric Beckmann [Tue, 18 Jul 2017 03:38:04 +0000 (03:38 +0000)]
Revert "Adding temporary debugging info to llvm-mt to solve fedora failure."
This reverts commit
223ef99f839f6b056272bcf4390841fcb26dda3c.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308263
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Eric Beckmann [Tue, 18 Jul 2017 03:37:49 +0000 (03:37 +0000)]
Revert "Adding yet more debug info to fix fedora issue."
This reverts commit
f3aaaac609f801df6c12655ec203455be7094627.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308262
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Eric Beckmann [Tue, 18 Jul 2017 03:37:34 +0000 (03:37 +0000)]
Revert "Adding extra test info for llvm-mt."
This reverts commit
66093fd60b848572f676023b8387bff69b151511.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308261
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Craig Topper [Tue, 18 Jul 2017 02:41:12 +0000 (02:41 +0000)]
[Analysis] RemoveTotalMemInst counting in InstCount to avoid reading back other Statistic variables
Summary:
Previously, we counted TotalMemInst by reading certain instruction counters before and after calling visit and then finding the difference. But that wouldn't be thread safe if this same pass was being ran on multiple threads.
This list of "memory instructions" doesn't make sense to me as it includes call/invoke and is missing atomics.
This patch removes the counter all together.
Reviewers: hfinkel, chandlerc, davide
Reviewed By: davide
Subscribers: davide, llvm-commits
Differential Revision: https://reviews.llvm.org/D33608
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308260
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Eric Beckmann [Tue, 18 Jul 2017 02:18:19 +0000 (02:18 +0000)]
Change '?' to 'h' in llvm-mt test.
Some shells seem to have trouble parsing non-alphanumeric symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308259
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Kostya Serebryany [Tue, 18 Jul 2017 01:36:50 +0000 (01:36 +0000)]
[libFuzzer] improve -reduce_inputs=1: now only consider the unique features of very input (seems to work much better)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308253
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Eric Beckmann [Tue, 18 Jul 2017 01:13:10 +0000 (01:13 +0000)]
Adding extra test info for llvm-mt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308252
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Daniel Neilson [Tue, 18 Jul 2017 01:06:54 +0000 (01:06 +0000)]
Add element-atomic mem intrinsic canary tests for Memory Sanitizer.
Summary:
Add canary tests to verify that MSAN currently does nothing with the element atomic memory intrinsics for memcpy, memmove, and memset.
Placeholder tests that will fail once element atomic @llvm.mem[cpy|move|set] instrinsics have been added to the MemIntrinsic class hierarchy. These will act as a reminder to verify that MSAN handles these intrinsics properly once they have been added to that class hierarchy.
Reviewers: reames
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35510
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308251
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Daniel Neilson [Tue, 18 Jul 2017 01:06:53 +0000 (01:06 +0000)]
Add element-atomic mem intrinsic canary tests for Efficiency Sanitizer.
Summary:
Add canary tests to verify that ESAN currently does nothing with the element atomic memory intrinsics for memcpy, memmove, and memset.
Placeholder tests that will fail once element atomic @llvm.mem[cpy|move|set] instrinsics have been added to the MemIntrinsic class hierarchy. These will act as a reminder to verify that ESAN handles these intrinsics properly once they have been added to that class hierarchy.
Reviewers: reames
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35508
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308250
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Daniel Neilson [Tue, 18 Jul 2017 01:06:52 +0000 (01:06 +0000)]
Add element-atomic mem intrinsic canary tests for Dataflow Sanitizer.
Summary:
Add canary tests to verify that DFSAN currently does nothing with the element atomic memory intrinsics for memcpy, memmove, and memset.
Placeholder tests that will fail once @llvm.mem[cpy|move|set] instrinsics have been added to the MemIntrinsic class hierarchy. These will act as a reminder to verify that DFSAN handles these intrinsics properly once they have been added to that class hierarchy.
Note that there could be some trickiness with these element-atomic intrinsics for the dataflow sanitizer in racy multithreaded programs. The data flow sanitizer inserts additional lib calls to mirror the memory intrinsic's action, so it is possible (very likely, even) that the dfsan buffers will not be in sync with the original buffers. Furthermore, implementation of the dfsan buffer updates for the element atomic intrinsics will have to also use unordered atomic instructions. If we can assume that dfsan is never run on racy multithreaded programs, then the element atomic memory intrinsics can pretty much be treated the same as the regular memory intrinsics.
Reviewers: reames
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35507
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308249
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Daniel Neilson [Tue, 18 Jul 2017 01:06:52 +0000 (01:06 +0000)]
Add element-atomic mem intrinsic canary tests for Address Sanitizer.
Summary:
Add canary tests to verify that ASAN currently does nothing with the element atomic memory intrinsics for memcpy, memmove, and memset.
Placeholder tests that will fail once element atomic @llvm.mem[cpy|move|set] instrinsics have been added to the MemIntrinsic class hierarchy. These will act as a reminder to verify that ASAN handles these intrinsics properly once they have been added to that class hierarchy.
Reviewers: reames
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35505
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308248
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Daniel Neilson [Tue, 18 Jul 2017 01:06:47 +0000 (01:06 +0000)]
Add element-atomic mem intrinsic canary tests for InstCombine.
Summary:
Add canary tests to verify that InstCombine currently does nothing with the element atomic memory intrinsics for memmove and memset.
Placeholder tests that will fail once element atomic @llvm.mem[move|set] instrinsics have been added to the MemIntrinsic class hierarchy. These will act as a reminder to verify that inst combine handles these intrinsics properly once they have been added to that class hierarchy.
Reviewers: reames
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35502
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308247
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Kostya Serebryany [Tue, 18 Jul 2017 01:00:28 +0000 (01:00 +0000)]
[libFuzzer] disable fuzzer-flags.test on windows to fix the bots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308246
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Spyridoula Gravani [Tue, 18 Jul 2017 01:00:26 +0000 (01:00 +0000)]
[DWARF] Modification of code for the verification of .debug_info section.
Summary:
This patch modifies the handleDebugInfo() function so that we verify the contents of each unit
in the .debug_info section only if its header has been successfully verified.
This change will allow for more/different verification checks depending on the type of the unit since from
dwarf5, the .debug_info section may consist of different types of units.
Subscribers: aprantl
Differential Revision: https://reviews.llvm.org/D35521
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308245
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Reid Kleckner [Tue, 18 Jul 2017 00:44:10 +0000 (00:44 +0000)]
Fix pdbdump-headers.test after TPI hash changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308244
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Reid Kleckner [Tue, 18 Jul 2017 00:33:45 +0000 (00:33 +0000)]
[PDB] Finish and simplify TPI hashing
Summary:
This removes the CVTypeVisitor updater and verifier classes. They were
made dead by the minimal type dumping refactoring. Replace them with a
single function that takes a type record and produces a hash. Call this
from the minimal type dumper and compare the hash.
I also noticed that the microsoft-pdb reference repository uses a basic
CRC32 for records that aren't special. We already have an implementation
of that CRC ready to use, because it's used in COFF for ICF.
I'll make LLD call this hashing utility in a follow-up change. We might
also consider using this same hash in type stream merging, so that we
don't have to hash our records twice.
Reviewers: inglorion, ruiu
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D35515
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308240
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Reid Kleckner [Tue, 18 Jul 2017 00:21:25 +0000 (00:21 +0000)]
[PDB] Merge in types and items from type servers (/Zi)
Summary:
Object files compiled with /Zi emit type information into a type server
PDB. The .debug$S section will contain a single TypeServer2Record with
the absolute path and GUID of the type server. LLD needs to load the
type server PDB and merge all types and items it finds in it into the
destination PDB.
Depends on D35495
Reviewers: ruiu, inglorion
Subscribers: zturner, llvm-commits
Differential Revision: https://reviews.llvm.org/D35504
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308235
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Reid Kleckner [Mon, 17 Jul 2017 23:59:44 +0000 (23:59 +0000)]
[codeview] Fix YAML for LF_TYPESERVER2 by hoisting PDB_UniqueId
Summary:
We were treating the GUIDs in TypeServer2Record as strings, and the
non-ASCII bytes in the GUID would not round-trip through YAML.
We already had the PDB_UniqueId type portably represent a Windows GUID,
but we need to hoist that up to the DebugInfo/CodeView library so that
we can use it in the TypeServer2Record as well as in PDB parsing code.
Reviewers: inglorion, amccarth
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D35495
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308234
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Eric Beckmann [Mon, 17 Jul 2017 23:36:13 +0000 (23:36 +0000)]
Adding yet more debug info to fix fedora issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308232
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Eric Beckmann [Mon, 17 Jul 2017 22:46:10 +0000 (22:46 +0000)]
Adding temporary debugging info to llvm-mt to solve fedora failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308227
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Matt Arsenault [Mon, 17 Jul 2017 22:35:50 +0000 (22:35 +0000)]
AMDGPU: Annotate features from x work item/group IDs.
This wasn't necessary before since they are always enabled
for kernels, but this is necessary if they need to be
forwarded to a callable function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308226
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Eric Beckmann [Mon, 17 Jul 2017 21:35:12 +0000 (21:35 +0000)]
Create empty shell of llvm-mt.
Summary:
This is the first patch towards creating the llvm-mt tool for merging
Windows manifests. This is a reimplementation of mt.exe.
Reviewers: zturner, ruiu, rnk
Subscribers: llvm-commits, mgorny
Differential Revision: https://reviews.llvm.org/D35333
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308224
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Mandeep Singh Grang [Mon, 17 Jul 2017 21:25:19 +0000 (21:25 +0000)]
[COFF, ARM64] Correct the data layout string for COFF ARM64 target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308223
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Reid Kleckner [Mon, 17 Jul 2017 20:31:38 +0000 (20:31 +0000)]
[codeview] Don't use the type visitor to merge types
Summary:
This didn't do much to speed things up, but it implements a FIXME, and I
think it's a nice simplification. We don't need the record kind switch.
We're doing that ourselves.
Reviewers: ruiu, inglorion
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D35496
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308213
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Reid Kleckner [Mon, 17 Jul 2017 20:28:06 +0000 (20:28 +0000)]
[codeview] Remove TypeServerHandler and PDBTypeServerHandler
Summary:
Instead of wiring these through the CVTypeVisitor interface, clients
should inspect the CVTypeArray before visiting it and potentially load
up the type server's TPI stream if they need it.
No tests relied on this functionality because LLD was the only client.
Reviewers: ruiu
Subscribers: mgorny, hiraditya, zturner, llvm-commits
Differential Revision: https://reviews.llvm.org/D35394
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308212
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Geoff Berry [Mon, 17 Jul 2017 20:19:05 +0000 (20:19 +0000)]
[AArch64][Falkor] Address some stylistic review comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308211
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Martin Storsjo [Mon, 17 Jul 2017 20:05:19 +0000 (20:05 +0000)]
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
Rename the enum value from X86_64_Win64 to plain Win64.
The symbol exposed in the textual IR is changed from 'x86_64_win64cc'
to 'win64cc', but the numeric value is kept, keeping support for
old bitcode.
Differential Revision: https://reviews.llvm.org/D34474
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308208
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Teresa Johnson [Mon, 17 Jul 2017 19:25:38 +0000 (19:25 +0000)]
Revert "Restore with fix "[ThinLTO] Ensure we always select the same function copy to import""
This reverts commit r308114 (and follow on fixes to test).
There is a linking failure in a ThinLTO bot:
http://green.lab.llvm.org/green/job/clang-stage2-configure-Rthinlto_build/3663/
(and undefined reference). It seems like it must be a second order
effect of the heuristic change I made, and may take some time to try
to reproduce locally and track down. Therefore, reverting for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308206
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Lang Hames [Mon, 17 Jul 2017 18:36:35 +0000 (18:36 +0000)]
[ORC] Remove extraneous else.
As suggested by Dave Blaikie in review on r307952. Thanks Dave!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308203
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George Karpenkov [Mon, 17 Jul 2017 18:18:03 +0000 (18:18 +0000)]
Revert "[libFuzzer] Add a dependency on symbolizer from libFuzzer tests"
This reverts commit
546e006a023cccd0fd32afd442ab992d3515d4b8.
Reverting until I can figure out llvm-symbolizer breakages on mac os.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308202
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Adam Nemet [Mon, 17 Jul 2017 18:00:41 +0000 (18:00 +0000)]
[opt-viewer] Accept directories that are searched for opt.yaml files
This allows to pass the build directory where all the opt.yaml files are
rather than find | xargs which may invoke opt-viewer multiple times producing
incomplete html output.
The patch generalizes the same functionality from opt-diff.
Differential Revision: https://reviews.llvm.org/D35491
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308200
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Ulrich Weigand [Mon, 17 Jul 2017 17:44:20 +0000 (17:44 +0000)]
[SystemZ] Add support for IBM z14 processor (3/3)
This adds support for the new 128-bit vector float instructions of z14.
Note that these instructions actually only operate on the f128 type,
since only each 128-bit vector register can hold only one 128-bit
float value. However, this is still preferable to the legacy 128-bit
float instructions, since those operate on pairs of floating-point
registers (so we can hold at most 8 values in registers), while the
new instructions use single vector registers (so we hold up to 32
value in registers).
Adding support includes:
- Enabling the instructions for the assembler/disassembler.
- CodeGen for the instructions. This includes allocating the f128
type now to the VR128BitRegClass instead of FP128BitRegClass.
- Scheduler description support for the instructions.
Note that for a small number of operations, we have no new vector
instructions (like integer <-> 128-bit float conversions), and so
we use the legacy instruction and then reformat the operand
(i.e. copy between a pair of floating-point registers and a
vector register).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308196
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Ulrich Weigand [Mon, 17 Jul 2017 17:42:48 +0000 (17:42 +0000)]
[SystemZ] Add support for IBM z14 processor (2/3)
This adds support for the new 32-bit vector float instructions of z14.
This includes:
- Enabling the instructions for the assembler/disassembler.
- CodeGen for the instructions, including new LLVM intrinsics.
- Scheduler description support for the instructions.
- Update to the vector cost function calculations.
In general, CodeGen support for the new v4f32 instructions closely
matches support for the existing v2f64 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308195
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Ulrich Weigand [Mon, 17 Jul 2017 17:41:11 +0000 (17:41 +0000)]
[SystemZ] Add support for IBM z14 processor (1/3)
This patch series adds support for the IBM z14 processor. This part includes:
- Basic support for the new processor and its features.
- Support for new instructions (except vector 32-bit float and 128-bit float).
- CodeGen for new instructions, including new LLVM intrinsics.
- Scheduler description for the new processor.
- Detection of z14 as host processor.
Support for the new 32-bit vector float and 128-bit vector float
instructions is provided by separate patches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308194
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Mandeep Singh Grang [Mon, 17 Jul 2017 17:32:45 +0000 (17:32 +0000)]
[llvm] Remove redundant check-prefix=CHECK from tests. NFC.
Reviewers: t.p.northover, oren_ben_simhon, niravd, mcrosier
Reviewed By: oren_ben_simhon, mcrosier
Subscribers: nhaehnle, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D35466
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308193
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