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7 years ago[MC] Fix some Clang-tidy modernize and Include What You Use warnings; other minor...
Eugene Zelenko [Tue, 7 Feb 2017 23:02:00 +0000 (23:02 +0000)]
[MC] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294369 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Fix some Include What You Use warnings; other minor fixes (NFC).
Eugene Zelenko [Tue, 7 Feb 2017 22:59:46 +0000 (22:59 +0000)]
[PowerPC] Fix some Include What You Use warnings; other minor fixes (NFC).

This is preparation to reduce MC headers dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294368 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CMake] Fix USE_LLVM_SANITIZER configuration for out-of-tree builds.
Eric Fiselier [Tue, 7 Feb 2017 22:48:20 +0000 (22:48 +0000)]
[CMake] Fix USE_LLVM_SANITIZER configuration for out-of-tree builds.

Summary:
r291918 changed `HandleLLVMOptions.cmake` to add `-fsanitize-blacklist=<llvm-file>` when `LLVM_USE_SANITIZER=Undefined` is specified. This breaks out-of-tree users of `LLVM_USE_SANITIZER` since that file is not present.

This patch fixes the issue by checking if the file exists first.

Reviewers: mgorny, bogner, vitalybuka, krasin

Reviewed By: krasin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29686

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294367 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] replace std::random_shuffle with std::shuffle as std::random_shuffle...
Kostya Serebryany [Tue, 7 Feb 2017 22:37:34 +0000 (22:37 +0000)]
[libFuzzer] replace std::random_shuffle with std::shuffle as std::random_shuffle is being deprecated in C++17. Also simplify fuzzer::Random. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294366 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Add SSE2 build vector insertion tests
Simon Pilgrim [Tue, 7 Feb 2017 22:23:12 +0000 (22:23 +0000)]
[X86][SSE] Add SSE2 build vector insertion tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294365 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPredicateInfo: Some compilers are unhappy with naming Use *'s Use. Change the name.
Daniel Berlin [Tue, 7 Feb 2017 22:11:43 +0000 (22:11 +0000)]
PredicateInfo: Some compilers are unhappy with naming Use *'s Use. Change the name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294364 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Add additional v4i32/v8i16/v16i8 build vector insertion tests
Simon Pilgrim [Tue, 7 Feb 2017 22:03:37 +0000 (22:03 +0000)]
[X86][SSE] Add additional v4i32/v8i16/v16i8 build vector insertion tests

With particular interest in cases where we don't make use of implicit zeroing or fail to break register dependencies

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294363 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix some missing negations in the traits checking from r294349
David Blaikie [Tue, 7 Feb 2017 21:31:03 +0000 (21:31 +0000)]
Fix some missing negations in the traits checking from r294349

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294357 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDebugInfo: Track spilled variables in LiveDebugValues
Wolfgang Pieb [Tue, 7 Feb 2017 21:23:15 +0000 (21:23 +0000)]
DebugInfo: Track spilled variables in LiveDebugValues

When variables are spilled to the stack by the register allocator, keep track of their
debug locations in LiveDebugValues and insert DBG_VALUE instructions at the appropriate
place. Ensure that the locations are propagated down the dominator tree via the existing
mechanisms.

Reviewer: aprantl

Differential Revision: https://reviews.llvm.org/D29500

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294356 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a typo in an error message for a check of invalid Mach-O files where
Kevin Enderby [Tue, 7 Feb 2017 21:20:44 +0000 (21:20 +0000)]
Fix a typo in an error message for a check of invalid Mach-O files where
it was printing the field name fileoff instead of filesize.  The original check
was added in r278557.

This was found in tracking down the problem that lead to the fix in
r293842 - [dsymutil] Fix __LINKEDIT vmsize in dsymutil upgrade path

rdar://30386075

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294354 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd PredicateInfo utility and printing pass
Daniel Berlin [Tue, 7 Feb 2017 21:10:46 +0000 (21:10 +0000)]
Add PredicateInfo utility and printing pass

Summary:
This patch adds a utility to build extended SSA (see "ABCD: eliminating
array bounds checks on demand"), and an intrinsic to support it. This
is then used to get functionality equivalent to propagateEquality in
GVN, in NewGVN (without having to replace instructions as we go). It
would work similarly in SCCP or other passes. This has been talked
about a few times, so i built a real implementation and tried to
productionize it.

Copies are inserted for operands used in assumes and conditional
branches that are based on comparisons (see below for more)

Every use affected by the predicate is renamed to the appropriate
intrinsic result.

E.g.
%cmp = icmp eq i32 %x, 50
br i1 %cmp, label %true, label %false
true:
ret i32 %x
false:
ret i32 1

will become

%cmp = icmp eq i32, %x, 50
br i1 %cmp, label %true, label %false
true:
; Has predicate info
; branch predicate info { TrueEdge: 1 Comparison: %cmp = icmp eq i32 %x, 50 }
%x.0 = call @llvm.ssa_copy.i32(i32 %x)
ret i32 %x.0
false:
ret i23 1

(you can use -print-predicateinfo to get an annotated-with-predicateinfo dump)

This enables us to easily determine what operations are affected by a
given predicate, and how operations affected by a chain of
predicates.

Reviewers: davide, sanjoy

Subscribers: mgorny, llvm-commits, Prazek

Differential Revision: https://reviews.llvm.org/D29519

Update for review comments

Fix a bug Nuno noticed where we are giving information about and/or on edges where the info is not useful and easy to use wrong

Update for review comments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294351 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoADT: Add explicit conversions for reverse ilist iterators
Duncan P. N. Exon Smith [Tue, 7 Feb 2017 21:03:50 +0000 (21:03 +0000)]
ADT: Add explicit conversions for reverse ilist iterators

Add explicit conversions between forward and reverse ilist iterators.
These follow the conversion conventions of std::reverse_iterator, which
are off-by-one: the newly-constructed "reverse" iterator dereferences to
the previous node of the one sent in.  This has the benefit of
converting reverse ranges in place:
  - If [I, E) is a valid range,
  - then [reverse(E), reverse(I)) gives the same range in reverse order.

ilist_iterator::getReverse() is unchanged: it returns a reverse iterator
to the *same* node.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294349 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Disable conditional tail calls (PR31257)
Hans Wennborg [Tue, 7 Feb 2017 20:37:45 +0000 (20:37 +0000)]
[X86] Disable conditional tail calls (PR31257)

They are currently modelled incorrectly (as calls, which clobber
registers, confusing e.g. Machine Copy Propagation).

Reverting until we figure out the proper solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294348 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix the docs build
Sanjoy Das [Tue, 7 Feb 2017 20:36:03 +0000 (20:36 +0000)]
Fix the docs build

(and add a bit of formatting.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294347 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoGlobalISel: translate @llvm.va_end intrinsic.
Tim Northover [Tue, 7 Feb 2017 20:08:59 +0000 (20:08 +0000)]
GlobalISel: translate @llvm.va_end intrinsic.

Turns out no-one actually cares about this one (at least) in tree so we can
just drop it entirely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294345 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] improve comments for SHRUNKBLEND node creation; NFC
Sanjay Patel [Tue, 7 Feb 2017 19:54:16 +0000 (19:54 +0000)]
[x86] improve comments for SHRUNKBLEND node creation; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294344 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LV] Add new ARM/AArch64 interleaved access cost model tests (NFC)
Matthew Simpson [Tue, 7 Feb 2017 19:34:24 +0000 (19:34 +0000)]
[LV] Add new ARM/AArch64 interleaved access cost model tests (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294342 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThis patch adds a ssa_copy intrinsic, as part of splitting up D29316.
Daniel Berlin [Tue, 7 Feb 2017 19:29:25 +0000 (19:29 +0000)]
This patch adds a ssa_copy intrinsic, as part of splitting up D29316.

Summary:
The intrinsic, marked as returning it's first argument, has no code
generation effect (though currently not every optimization pass knows
that intrinsics with the returned attribute can be looked through).

It is about to be used to by the PredicateInfo pass to attach
predicate information to existing operands, and be able to tell what
the predicate information affects.

We deliberately do not attach any info through a second operand so
that the intrinsics do not need to dominate the comparisons/etc (since
in the case of assume, we may want to push them up the post-dominator
tree).

Reviewers: davide, sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29517

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294341 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReplace custom written DFS walk with depth first iterator
Daniel Berlin [Tue, 7 Feb 2017 19:24:26 +0000 (19:24 +0000)]
Replace custom written DFS walk with depth first iterator

Summary:
GenericDomTreeConstruction had its own written DFS walk.
It is basically identical to the DFS walk df_* is doing in the iterators.
the one difference is that df_iterator uses an internal visited set.
The GenericDomTreeConstruction one reused a field in an existing densemap lookup.

Time-wise, this way is actually more cache-friendly (the previous way has a random store
into a successor's info, the new way does that store at the same time and in the same place
as other stores to the same info)

It costs some very small amount of memory to do this, and one we pay in some other part of
dom tree construction *anyway*, so we aren't really increasing dom tree constructions's
peak memory usage.

It could still be changed to use the old field with a little work on df_ext_* if we care
(and if someone find performance regressions)

Reviewers: chandlerc

Reviewed By: chandlerc

Subscribers: Eugene.Zelenko, llvm-commits

Differential Revision: https://reviews.llvm.org/D8932

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294339 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ImplicitNullCheck] Extend Implicit Null Check scope by using stores
Sanjoy Das [Tue, 7 Feb 2017 19:19:49 +0000 (19:19 +0000)]
[ImplicitNullCheck] Extend Implicit Null Check scope by using stores

Summary:
This change allows usage of store instruction for implicit null check.

Memory Aliasing Analisys is not used and change conservatively supposes
that any store and load may access the same memory. As a result
re-ordering of store-store, store-load and load-store is prohibited.

Patch by Serguei Katkov!

Reviewers: reames, sanjoy

Reviewed By: sanjoy

Subscribers: atrick, llvm-commits

Differential Revision: https://reviews.llvm.org/D29400

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294338 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] use range-for loops; NFCI
Sanjay Patel [Tue, 7 Feb 2017 19:18:25 +0000 (19:18 +0000)]
[x86] use range-for loops; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294337 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LV] Simplify ARM/AArch64 interleaved access cost model tests (NFC)
Matthew Simpson [Tue, 7 Feb 2017 19:17:44 +0000 (19:17 +0000)]
[LV] Simplify ARM/AArch64 interleaved access cost model tests (NFC)

This patch removes unneeded instructions from the existing ARM/AArch64
interleaved access cost model tests. I'll be adding a similar set of tests in a
follow-on patch to increase coverage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294336 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CMake] Move ninja job pool options to HandleLLVMOptions
Chris Bieneman [Tue, 7 Feb 2017 19:06:22 +0000 (19:06 +0000)]
[CMake] Move ninja job pool options to HandleLLVMOptions

Moving the Ninja job pool configuration settings into the HandleLLVMOptions module will allow standalone builds of LLVM sub-projects to use the LLVM options without needing to re-implement them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294334 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] use getSignBit() for clarity; NFCI
Sanjay Patel [Tue, 7 Feb 2017 19:01:35 +0000 (19:01 +0000)]
[x86] use getSignBit() for clarity; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294333 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix the -Werror build for some sign-comparisons
David Blaikie [Tue, 7 Feb 2017 18:58:17 +0000 (18:58 +0000)]
Fix the -Werror build for some sign-comparisons

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294331 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC][Altivec] Add vnot extended mnemonic
Nemanja Ivanovic [Tue, 7 Feb 2017 18:57:29 +0000 (18:57 +0000)]
[PowerPC][Altivec] Add vnot extended mnemonic

Adds the vnot extended mnemonic for the vnor instruction.

Committing on behalf of brunoalr (Bruno Rosa).

Differential Revision: https://reviews.llvm.org/D29225

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294330 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SDAGISel] Simplify some SDAGISel code, NFC
Reid Kleckner [Tue, 7 Feb 2017 18:42:53 +0000 (18:42 +0000)]
[SDAGISel] Simplify some SDAGISel code, NFC

Hoist entry block code for arguments and swift error values out of the
basic block instruction selection loop. Lowering arguments once up front
seems much more readable than doing it conditionally inside the loop. It
also makes it clear that argument lowering can update StaticAllocaMap
because no instructions have been selected yet.

Also use range-based for loops where possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294329 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAttempt to fix MSVC build broken by r294326
Pavel Labath [Tue, 7 Feb 2017 18:35:36 +0000 (18:35 +0000)]
Attempt to fix MSVC build broken by r294326

MSVC does not think that `char []` can be constexpr. Switch to regular const.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294327 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Support] Add FormatVariadic support for chrono types
Pavel Labath [Tue, 7 Feb 2017 18:11:33 +0000 (18:11 +0000)]
[Support] Add FormatVariadic support for chrono types

Summary:
The formatter has three knobs:
- the user can choose which time unit to use for formatting (default: whatever is the unit of the input)
- he can choose whether the unit gets displayed (default: yes)
- he can affect the way the number itself is formatted via standard number formatting options (default:default)

Reviewers: zturner, inglorion

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29481

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294326 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TargetLowering] fix formatting and comments for ShrinkDemandedConstant; NFC
Sanjay Patel [Tue, 7 Feb 2017 18:04:26 +0000 (18:04 +0000)]
[TargetLowering] fix formatting and comments for ShrinkDemandedConstant; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294325 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AMDGPU] Fix for SIMachineScheduler crash. SI Scheduler should track
Alexander Timofeev [Tue, 7 Feb 2017 17:57:48 +0000 (17:57 +0000)]
[AMDGPU] Fix for SIMachineScheduler crash. SI Scheduler should track
         lane masks.

 Differential revision: https://reviews.llvm.org/D29442

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294324 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Make max size array combine a tunable.
Davide Italiano [Tue, 7 Feb 2017 17:56:50 +0000 (17:56 +0000)]
[InstCombine] Make max size array combine a tunable.

Requested by Sanjoy/Hal a while ago, and forgotten by me
(r283612).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294323 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Update instruction types
Krzysztof Parzyszek [Tue, 7 Feb 2017 17:47:37 +0000 (17:47 +0000)]
[Hexagon] Update instruction types

Remove TypeXTYPE, TypeALU32, TypeSYSTEM, TypeJR, and instead use their
architecture counterparts.

Patch by Colin LeMahieu.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294321 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Remove encoding bits from mapped instructions
Krzysztof Parzyszek [Tue, 7 Feb 2017 17:42:11 +0000 (17:42 +0000)]
[Hexagon] Remove encoding bits from mapped instructions

- Map A2_zxtb to A2_andir.
- Map PS_call_nr J2_call.
- Map A2_tfr[t|f][new] to A2_padd[t|f][new].

Patch by Colin LeMahieu.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294320 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix my GVNHoist test case from r294317
Reid Kleckner [Tue, 7 Feb 2017 17:35:53 +0000 (17:35 +0000)]
Fix my GVNHoist test case from r294317

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294319 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix the bitcode upgrade for DIGlobalVariable in a DIImportedEntity context.
Adrian Prantl [Tue, 7 Feb 2017 17:35:41 +0000 (17:35 +0000)]
Fix the bitcode upgrade for DIGlobalVariable in a DIImportedEntity context.

The bitcode upgrade for DIGlobalVariable unconditionally wrapped
DIGlobalVariables in a DIGlobalVariableExpression. When a
DIGlobalVariable is referenced by a DIImportedEntity, however, this is
wrong. This patch fixes the bitcode upgrade by deferring the creation
of DIGlobalVariableExpressions until we know the context of the
DIGlobalVariable.

<rdar://problem/30134279>

Differential Revision: https://reviews.llvm.org/D29349

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294318 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[GVNHoist] Merge DebugLoc metadata on hoisted instructions"
Reid Kleckner [Tue, 7 Feb 2017 17:31:13 +0000 (17:31 +0000)]
Revert "[GVNHoist] Merge DebugLoc metadata on hoisted instructions"

This reverts commit r294250. It caused PR31891.

Add a test case that shows that inlinable calls retain location
information with an accurate scope.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294317 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMemorySSA: Remove unnecessary classof functions
Daniel Berlin [Tue, 7 Feb 2017 16:58:22 +0000 (16:58 +0000)]
MemorySSA: Remove unnecessary classof functions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294316 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Ensure that vector shift-by-immediate inputs are correctly bitcast to...
Simon Pilgrim [Tue, 7 Feb 2017 14:22:25 +0000 (14:22 +0000)]
[X86][SSE] Ensure that vector shift-by-immediate inputs are correctly bitcast to the result type

vXi8/vXi64 vector shifts are often shifted as vYi16/vYi32 types but we weren't always remembering to bitcast the input.

Tested with a new assert as we don't currently manipulate these shifts enough for test cases to catch them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294308 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd DAGCombiner load combine tests for {a|s}ext, {a|z|s}ext load nodes
Artur Pilipenko [Tue, 7 Feb 2017 14:09:37 +0000 (14:09 +0000)]
Add DAGCombiner load combine tests for {a|s}ext, {a|z|s}ext load nodes

Currently we don't support these nodes, so the tests check the current codegen without load combine. This change makes the review of the change to support these nodes more clear.

Separated from https://reviews.llvm.org/D29591 review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294305 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeGenPrepare] Hoist all getSubtargetImpl calls to the beginning of the pass
Igor Laevsky [Tue, 7 Feb 2017 13:27:20 +0000 (13:27 +0000)]
[CodeGenPrepare] Hoist all getSubtargetImpl calls to the beginning of the pass

Differential Revision: https://reviews.llvm.org/D29456

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294301 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Generalized integer absolute tests to test canonical pattern as well as...
Simon Pilgrim [Tue, 7 Feb 2017 13:15:09 +0000 (13:15 +0000)]
[X86][SSE] Generalized integer absolute tests to test canonical pattern as well as intrinsics

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294300 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Make RWPI use movw/movt when available
Christof Douma [Tue, 7 Feb 2017 13:07:12 +0000 (13:07 +0000)]
[ARM] Make RWPI use movw/movt when available

When constructing global address literals while targeting the RWPI
relocation model. LLVM currently only uses literal pools. If MOVW/MOVT
instructions are available we can use these instead. Beside being more
efficient it allows -arm-execute-only to work with
-relocation-model=RWPI as well.

When we generate MOVW/MOVT for global addresses when targeting the RWPI
relocation model, we need to use base relative relocations. This patch
does the needed plumbing in MC to generate these for MOVW/MOVT.

Differential Revision: https://reviews.llvm.org/D29487

Change-Id: I446786e43a6f5aa9b6a5bb2cd216d60d41c7755d

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294298 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Added 256-bit vector tests cases
Simon Pilgrim [Tue, 7 Feb 2017 12:01:36 +0000 (12:01 +0000)]
[X86][SSE] Added 256-bit vector tests cases

Exposes some poor codegen with identity shuffle due to bad interaction with insert_subvector(extract_subvector) / concat_subvectors

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294296 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Fix rotl/rotr when the shift amount is greater than the total bit width.
Joey Gouly [Tue, 7 Feb 2017 11:58:22 +0000 (11:58 +0000)]
[APInt] Fix rotl/rotr when the shift amount is greater than the total bit width.

Review: https://reviews.llvm.org/D27749

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294295 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[DAGCombiner] (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)"
Daniel Jasper [Tue, 7 Feb 2017 08:57:50 +0000 (08:57 +0000)]
Revert "[DAGCombiner] (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)"

This reverts commit r294186.

On an internal test, this triggers an out-of-memory error on PPC,
presumably because there is another dagcombine that does the exact
opposite triggering and endless loop consuming more and more memory.

Chandler has started at creating a reduced test case and we'll attach it
as soon as possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294288 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Add masked and unmasked shift by immediate instructions to load folding...
Craig Topper [Tue, 7 Feb 2017 07:31:00 +0000 (07:31 +0000)]
[AVX-512] Add masked and unmasked shift by immediate instructions to load folding tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294287 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Add masked shift instructions to load folding tables.
Craig Topper [Tue, 7 Feb 2017 07:30:57 +0000 (07:30 +0000)]
[AVX-512] Add masked shift instructions to load folding tables.

This adds the masked versions of everything, but the shift by immediate instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294286 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Add some of the shift instructions to the load folding tables.
Craig Topper [Tue, 7 Feb 2017 07:30:54 +0000 (07:30 +0000)]
[AVX-512] Add some of the shift instructions to the load folding tables.

This includes unmasked forms of variable shift and shifting by the lower element of a register.

Still need to do shift by immediate which was not foldable prior to avx512 and all the masked forms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294285 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Fix missing static
Matt Arsenault [Tue, 7 Feb 2017 04:37:59 +0000 (04:37 +0000)]
AMDGPU: Fix missing static

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294281 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Change the Defs list for VZEROALL/VZEROUPPER back to not including YMM16-31.
Craig Topper [Tue, 7 Feb 2017 04:10:57 +0000 (04:10 +0000)]
[X86] Change the Defs list for VZEROALL/VZEROUPPER back to not including YMM16-31.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294277 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Put the integer stack folding tests in alphabetical order.
Craig Topper [Tue, 7 Feb 2017 04:10:54 +0000 (04:10 +0000)]
[AVX-512] Put the integer stack folding tests in alphabetical order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294276 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM] Defend against getting slightly wrong template arguments passed
Chandler Carruth [Tue, 7 Feb 2017 03:34:08 +0000 (03:34 +0000)]
[PM] Defend against getting slightly wrong template arguments passed
into CRTP base classes.

This can sometimes happen and not cause an immediate failure when the
derived class is, itself, a template. You can end up essentially calling
methods on the wrong derived type but a type where many things will
appear to "work".

To fail fast and with a clear error message we can use a static_assert,
but we have to stash that static_assert inside a method body or nested
type that won't need to be completed while building the base class. I've
tried to pick a reasonably small number of places that seemed like they
would definitely get triggered on use.

This is the last of the patch series defending against this that I have
planned, so far no bugs other than the original were found.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294275 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLowerTypeTests: Simplify. NFC.
Peter Collingbourne [Tue, 7 Feb 2017 03:20:58 +0000 (03:20 +0000)]
LowerTypeTests: Simplify. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294273 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[IR/Analysis] Defend against getting slightly wrong template arguments
Chandler Carruth [Tue, 7 Feb 2017 03:17:30 +0000 (03:17 +0000)]
[IR/Analysis] Defend against getting slightly wrong template arguments
passed into CRTP base classes.

This can sometimes happen and not cause an immediate failure when the
derived class is, itself, a template. You can end up essentially calling
methods on the wrong derived type but a type where many things will
appear to "work".

To fail fast and with a clear error message we can use a static_assert,
but we have to stash that static_assert inside a method body or nested
type that won't need to be completed while building the base class. I've
tried to pick a reasonably small number of places that seemed like
reliably places for this to be instantiated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294272 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ADT] Defend against getting slightly wrong template arguments passed
Chandler Carruth [Tue, 7 Feb 2017 03:15:12 +0000 (03:15 +0000)]
[ADT] Defend against getting slightly wrong template arguments passed
into CRTP base classes.

This can sometimes happen and not cause an immediate failure when the
derived class is, itself, a template. You can end up essentially calling
methods on the wrong derived type but a type where many things will
appear to "work".

To fail fast and with a clear error message we can use a static_assert,
but we have to stash that static_assert inside a method body or nested
type that won't need to be completed while building the base class. I've
tried to pick a reasonably small number of places that seemed like
reliably places for this to be instantiated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294271 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Address ASAN and UBSAN failures after r294226
Krzysztof Parzyszek [Tue, 7 Feb 2017 02:31:53 +0000 (02:31 +0000)]
[Hexagon] Address ASAN and UBSAN failures after r294226

Reinstate r294256 with a fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294269 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRegisterCoalescer: Fix joinReservedPhysReg()
Matthias Braun [Tue, 7 Feb 2017 01:59:39 +0000 (01:59 +0000)]
RegisterCoalescer: Fix joinReservedPhysReg()

joinReservedPhysReg() can only deal with a liverange in a single basic
block when copying from a vreg into a physreg.

See also rdar://30306405

Differential Revision: https://reviews.llvm.org/D29436

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294268 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r293017 and fix the actual underlying issue.
Chandler Carruth [Tue, 7 Feb 2017 01:50:48 +0000 (01:50 +0000)]
Revert r293017 and fix the actual underlying issue.

The patch committed in r293017, as discussed on the list, doesn't really
make sense but was causing an actual issue to go away.

The issue turns out to be that in one place the extra template arguments
were dropped from the OuterAnalysisManagerProxy. This in turn caused the
types used in one set of places to access the key to be completely
different from the types used in another set of places for both Loop and
CGSCC cases where there are extra arguments.

I have literally no idea how anything seemed to work with this bug in
place. It blows my mind. But it did except for mingw64 in a DLL build.

I've added a really handy static assert that helps ensure we don't break
this in the future. It immediately diagnoses the issue with a compile
failure and a very clear error message. Much better that staring at
backtraces on a build bot. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294267 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AMDGPU] Lower null pointers in static variable initializer
Yaxun Liu [Tue, 7 Feb 2017 00:43:21 +0000 (00:43 +0000)]
[AMDGPU] Lower null pointers in static variable initializer

    For amdgcn target Clang generates addrspacecast to represent null pointers in private and local address spaces.

    In LLVM codegen, the static variable initializer is lowered by virtual function AsmPrinter::lowerConstant which is target generic. Since addrspacecast is target specific, AsmPrinter::lowerConst

    This patch overrides AsmPrinter::lowerConstant with AMDGPUAsmPrinter::lowerConstant, which is able to lower the target-specific addrspacecast in the null pointer representation so that -1 is co

    Differential Revision: https://reviews.llvm.org/D29284

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294265 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LVI] Switch from BFS to DFS exploration order
Philip Reames [Tue, 7 Feb 2017 00:25:24 +0000 (00:25 +0000)]
[LVI] Switch from BFS to DFS exploration order

This patch changes the order in which LVI explores previously unexplored paths.

Previously, the code used an BFS strategy where each unexplored input was added to the search queue before any of them were explored. This has the effect of causing all inputs to be explored before returning to re-evaluate the merge point (non-local or phi node). This has the unfortunate property of doing redundant work if one of the inputs to the merge is found to be overdefined (i.e. unanalysable). If any input is overdefined, the result of the merge will be too; regardless of the values of other inputs.

The new code uses a DFS strategy where we re-evaluate the merge after evaluating each input. If we discover an overdefined input, we immediately return without exploring other inputs.

We have reports of large (4-10x) improvements of compile time with this patch and some reports of more precise analysis results as well.  See the review discussion for details.  The original motivating case was pr10584.

Differential Revision: https://reviews.llvm.org/D28190

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294264 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] add tests to show current codegen for vblendv*; NFC
Sanjay Patel [Tue, 7 Feb 2017 00:10:50 +0000 (00:10 +0000)]
[x86] add tests to show current codegen for vblendv*; NFC

As noted in the comments, we should be able to eliminate cmp ops
in several cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294263 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoGlobalISel: legalize narrow G_SELECTS on AArch64.
Tim Northover [Mon, 6 Feb 2017 23:41:27 +0000 (23:41 +0000)]
GlobalISel: legalize narrow G_SELECTS on AArch64.

Otherwise there aren't any patterns to select them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294261 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix the samplepgo indirect call promotion bug: we should not promote a direct call.
Dehao Chen [Mon, 6 Feb 2017 23:33:15 +0000 (23:33 +0000)]
Fix the samplepgo indirect call promotion bug: we should not promote a direct call.

Summary: Checking CS.getCalledFunction() == nullptr does not necessary indicate indirect call. We also need to check if CS.getCalledValue() is not a constant.

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29570

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294260 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[Hexagon] Address ASAN and UBSAN failures after r294226"
Krzysztof Parzyszek [Mon, 6 Feb 2017 23:30:17 +0000 (23:30 +0000)]
Revert "[Hexagon] Address ASAN and UBSAN failures after r294226"

This reverts commit r294256. It seems to be causing more problems instead
of solving them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294259 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Adding gp+ to the syntax of gp-relative instructions
Krzysztof Parzyszek [Mon, 6 Feb 2017 23:18:57 +0000 (23:18 +0000)]
[Hexagon] Adding gp+ to the syntax of gp-relative instructions

Patch by Colin LeMahieu.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294258 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AMDGPU] Fix GCNSchedStrategy.cpp debug output
Stanislav Mekhanoshin [Mon, 6 Feb 2017 23:16:51 +0000 (23:16 +0000)]
[AMDGPU] Fix GCNSchedStrategy.cpp debug output

There is typo in the debug output: top and bottom candidates are switched.

Differential Revision: https://reviews.llvm.org/D29608

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294257 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Address ASAN and UBSAN failures after r294226
Krzysztof Parzyszek [Mon, 6 Feb 2017 23:11:32 +0000 (23:11 +0000)]
[Hexagon] Address ASAN and UBSAN failures after r294226

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294256 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Tests showing the lowering of float/double complex multiplications with...
Simon Pilgrim [Mon, 6 Feb 2017 22:42:43 +0000 (22:42 +0000)]
[X86][SSE] Tests showing the lowering of float/double complex multiplications with fastmath (PR31866)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294254 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMerge DebugLoc on combined stores; in this case, when combining stores
Paul Robinson [Mon, 6 Feb 2017 22:19:04 +0000 (22:19 +0000)]
Merge DebugLoc on combined stores; in this case, when combining stores
from the end of two blocks, merge instead of arbitrarily picking one.

Differential Revision: http://reviews.llvm.org/D29504

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294251 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GVNHoist] Merge DebugLoc metadata on hoisted instructions
Taewook Oh [Mon, 6 Feb 2017 22:05:04 +0000 (22:05 +0000)]
[GVNHoist] Merge DebugLoc metadata on hoisted instructions

Summary:
When instructions are hoisted, current implementation keeps DebugLoc metadata of the instruction that chosen as Repl (and its GEP operand if Repl is a load or a store). However, DebugLoc metadata should be updated to the 'merged' location across all hoisted instructions. See the following example code:

```
  1:  typedef struct {
  2:    int a[10];
  3:  } S1;
  4:
  5:  extern S1 *s1[10];
  6:
  7:  void foo(int x, int y, int i) {
  8:    if (y)
  9:      s1[i]->a[i] = x + y;
 10:    else
 11:      s1[i]->a[i] = x;
 12:  }
```

Below is LLVM IR representation of the program before gvn-hoist:

```
%struct.S1 = type { [10 x i32] }
@s1 = external local_unnamed_addr global [10 x %struct.S1*], align 16

define void @foo(i32 %x, i32 %y, i32 %i) !dbg !4 {
entry:
  %tobool = icmp ne i32 %y, 0, !dbg !8
  br i1 %tobool, label %if.then, label %if.else, !dbg !10

if.then:                                          ; preds = %entry
  %add = add nsw i32 %x, %y, !dbg !11
  %idxprom = sext i32 %i to i64, !dbg !12
  %arrayidx = getelementptr inbounds [10 x %struct.S1*], [10 x %struct.S1*]* @s1, i64 0, i64 %idxprom, !dbg !12
  %0 = load %struct.S1*, %struct.S1** %arrayidx, align 8, !dbg !12, !tbaa !13
  %a = getelementptr inbounds %struct.S1, %struct.S1* %0, i32 0, i32 0, !dbg !17
  br label %if.end, !dbg !12

if.else:                                          ; preds = %entry
  %idxprom3 = sext i32 %i to i64, !dbg !18
  %arrayidx4 = getelementptr inbounds [10 x %struct.S1*], [10 x %struct.S1*]* @s1, i64 0, i64 %idxprom3, !dbg !18
  %1 = load %struct.S1*, %struct.S1** %arrayidx4, align 8, !dbg !18, !tbaa !13
  %a5 = getelementptr inbounds %struct.S1, %struct.S1* %1, i32 0, i32 0, !dbg !19
  br label %if.end

if.end:                                           ; preds = %if.else, %if.then
  %a5.sink = phi [10 x i32]* [ %a5, %if.else ], [ %a, %if.then ]
  %.sink = phi i32 [ %x, %if.else ], [ %add, %if.then ]
  %idxprom6 = sext i32 %i to i64
  %arrayidx7 = getelementptr inbounds [10 x i32], [10 x i32]* %a5.sink, i64 0, i64 %idxprom6
  store i32 %.sink, i32* %arrayidx7, align 4, !tbaa !20
  ret void, !dbg !22
}

```
where

```
!11 = !DILocation(line: 9, column: 18, scope: !9)
!12 = !DILocation(line: 9, column: 5, scope: !9)
!18 = !DILocation(line: 11, column: 5, scope: !9)
!19 = !DILocation(line: 11, column: 9, scope: !9)
```

. And below is after gvn-hoist:

```
define void @foo(i32 %x, i32 %y, i32 %i) !dbg !4 {
entry:
  %tobool = icmp ne i32 %y, 0, !dbg !8
  %idxprom = sext i32 %i to i64, !dbg !10
  %0 = getelementptr inbounds [10 x %struct.S1*], [10 x %struct.S1*]* @s1, i64 0, i64 %idxprom, !dbg !10
  %1 = load %struct.S1*, %struct.S1** %0, align 8, !dbg !10, !tbaa !11
  br i1 %tobool, label %if.then, label %if.else, !dbg !15

if.then:                                          ; preds = %entry
  %add = add nsw i32 %x, %y, !dbg !16
  %arrayidx = getelementptr inbounds [10 x %struct.S1*], [10 x %struct.S1*]* @s1, i64 0, i64 %idxprom, !dbg !10
  %a = getelementptr inbounds %struct.S1, %struct.S1* %1, i32 0, i32 0, !dbg !17
  br label %if.end, !dbg !10

if.else:                                          ; preds = %entry
  %arrayidx4 = getelementptr inbounds [10 x %struct.S1*], [10 x %struct.S1*]* @s1, i64 0, i64 %idxprom, !dbg !18
  %a5 = getelementptr inbounds %struct.S1, %struct.S1* %1, i32 0, i32 0, !dbg !19
  br label %if.end

if.end:                                           ; preds = %if.else, %if.then
  %a5.sink = phi [10 x i32]* [ %a5, %if.else ], [ %a, %if.then ]
  %.sink = phi i32 [ %x, %if.else ], [ %add, %if.then ]
  %arrayidx7 = getelementptr inbounds [10 x i32], [10 x i32]* %a5.sink, i64 0, i64 %idxprom
  store i32 %.sink, i32* %arrayidx7, align 4, !tbaa !20
  ret void, !dbg !22
}

```
As you see, loads and their GEPs have been hosited from if.then/if.else block to entry block. However, DebugLoc metadata of these new instructions are still same as the instructions in if.then block, as they are moved/cloned from if.then block. This may result incorrect stepping and imprecise sample profile result.

Reviewers: majnemer, pcc, sebpop

Reviewed By: sebpop

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29377

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294250 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoGlobalISel: fall back gracefully when we can't map an operand's size.
Tim Northover [Mon, 6 Feb 2017 21:57:06 +0000 (21:57 +0000)]
GlobalISel: fall back gracefully when we can't map an operand's size.

AArch64 was asserting when it was asked to provide a register-bank of a size it
couldn't deal with (in this case an s128 IMPLICIT_DEF). But we want a robust
fallback path so this isn't allowed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294248 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoGlobalISel: legalize G_INSERT instructions
Tim Northover [Mon, 6 Feb 2017 21:56:47 +0000 (21:56 +0000)]
GlobalISel: legalize G_INSERT instructions

We don't handle all cases yet (see arm64-fallback.ll for an example), but this
is enough to cover most common C++ code so it's a good place to start.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294247 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Fix some Include What You Use warnings; other minor fixes (NFC).
Eugene Zelenko [Mon, 6 Feb 2017 21:55:43 +0000 (21:55 +0000)]
[X86] Fix some Include What You Use warnings; other minor fixes (NFC).

This is preparation to reduce MCExpr.h dependencies.(vlsj-clangbuild)[622]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294246 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SLP] Revert "Allow using of extra values in horizontal reductions."
Michael Kuperstein [Mon, 6 Feb 2017 21:50:59 +0000 (21:50 +0000)]
[SLP] Revert "Allow using of extra values in horizontal reductions."

This breaks when one of the extra values is also a scalar that
participates in the same vectorization tree which we'll end up
reducing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294245 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCEV] Scale back the test added in r294181 as it goes quadratic in
Chandler Carruth [Mon, 6 Feb 2017 21:27:12 +0000 (21:27 +0000)]
[SCEV] Scale back the test added in r294181 as it goes quadratic in
SCEV.

This test was immediately the slowest test in 'check-llvm' even in an
optimized build and was driving up the total test time by 50% for me.

Sanjoy has filed a PR about the quadratic behavior in SCEV but it is
also concerning that the test still passes given that r294181 added
a threshold at 32 to SCEV. I've followed up on the original patch to
figure out how this test should work long-term, but for now I want to
get check-llvm to be fast again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294241 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIR: Consider two DISubprograms to be odr-equal if they have the same template parameters.
Peter Collingbourne [Mon, 6 Feb 2017 21:23:03 +0000 (21:23 +0000)]
IR: Consider two DISubprograms to be odr-equal if they have the same template parameters.

In ValueMapper we create new operands for MDNodes and
rely on MDNode::replaceWithUniqued to create a new MDNode
with the specified operands. However this doesn't always
actually happen correctly for DISubprograms because when we
uniquify the new node, we only odr-compare it with existing nodes
(MDNodeSubsetEqualImpl<DISubprogram>::isDeclarationOfODRMember). Although
the TemplateParameters field can refer to a distinct DICompileUnit via
DITemplateTypeParameter::type -> DICompositeType::scope -> DISubprogram::unit,
it is not currently included in the odr comparison. As a result, we can end
up getting our original DISubprogram back, which means we will have a cloned
module referring to the DICompileUnit in the original module, which causes
a verification error.

The fix I implemented was to consider TemplateParameters to be one of the
odr-equal properties. But I'm a little uncomfortable with this. In general it
seems unsound to rely on distinct MDNodes never being reachable from nodes
which we only check odr-equality of. My only long term suggestion would be
to separate odr-uniquing from full uniquing.

Differential Revision: https://reviews.llvm.org/D29240

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294240 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] make code less clever to avoid fallthrough in switch (and in turn avoid...
Kostya Serebryany [Mon, 6 Feb 2017 21:21:37 +0000 (21:21 +0000)]
[libFuzzer] make code less clever to avoid fallthrough in switch (and in turn avoid compiler warnings). NFC. Suggested by Christian Holler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294239 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a bug in llvm-obdump(1) with the -macho and -info-plist options
Kevin Enderby [Mon, 6 Feb 2017 21:01:08 +0000 (21:01 +0000)]
Fix a bug in llvm-obdump(1) with the -macho and -info-plist options
which caused it to print more than the (__TEXT,__info_plist) if that
section did not end with a null.

rdar://27378808

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294236 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM/LCG] Fix the no-asserts build after r294227. Sorry for the noise.
Chandler Carruth [Mon, 6 Feb 2017 20:59:07 +0000 (20:59 +0000)]
[PM/LCG] Fix the no-asserts build after r294227. Sorry for the noise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294235 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoGet function start line number from DWARF info
David Blaikie [Mon, 6 Feb 2017 20:19:02 +0000 (20:19 +0000)]
Get function start line number from DWARF info

DWARF info contains info about the line number at which a function starts (DW_AT_decl_line).

This patch creates a function to look up the start line number for a function, and returns it in
DILineInfo when looking up debug info for a particular address.

Patch by Simon Que!

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D27962

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294231 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TableGen] Use less stack in DAGISelMatcherOpt
Jon Chesterfield [Mon, 6 Feb 2017 19:41:44 +0000 (19:41 +0000)]
[TableGen] Use less stack in DAGISelMatcherOpt

Refactor a helper function, FactorNodes, to search for a push node in constant space. This resolves a problem in a not-yet-upstreamed backend where a recursive pattern blew the call stack (at a depth of 255) under a debug build of tablegen. No functional change so no new test coverage. The change is minimal to avoid disturbing existing behaviour.

Differential Revision: https://reviews.llvm.org/D29080

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294230 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r294228
Jon Chesterfield [Mon, 6 Feb 2017 19:40:56 +0000 (19:40 +0000)]
Revert r294228

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294229 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTest commit access
Jon Chesterfield [Mon, 6 Feb 2017 19:39:47 +0000 (19:39 +0000)]
Test commit access

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294228 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM/LCG] Remove the lazy RefSCC formation from the LazyCallGraph during
Chandler Carruth [Mon, 6 Feb 2017 19:38:06 +0000 (19:38 +0000)]
[PM/LCG] Remove the lazy RefSCC formation from the LazyCallGraph during
iteration.

The lazy formation of RefSCCs isn't really the most important part of
the laziness here -- that has to do with walking the functions
themselves -- and isn't essential to maintain. Originally, there were
incremental update algorithms that relied on updates happening
predominantly near the most recent RefSCC formed, but those have been
replaced with ones that have much tighter general case bounds at this
point. We do still perform asserts that only scale well due to this
incrementality, but those are easy to place behind EXPENSIVE_CHECKS.

Removing this simplifies the entire analysis by having a single up-front
step that builds all of the RefSCCs in a direct Tarjan walk. We can even
easily replace this with other or better algorithms at will and with
much less confusion now that there is no iterator-based incremental
logic involved. This removes a lot of complexity from LCG.

Another advantage of moving in this direction is that it simplifies
testing the system substantially as we no longer have to worry about
observing and mutating the graph half-way through the RefSCC formation.

We still need a somewhat special iterator for RefSCCs because we want
the iterator to remain stable in the face of graph updates. However,
this now merely involves relative indexing to the current RefSCC's
position in the sequence which isn't too hard.

Differential Revision: https://reviews.llvm.org/D29381

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294227 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Update MCTargetDesc
Krzysztof Parzyszek [Mon, 6 Feb 2017 19:35:46 +0000 (19:35 +0000)]
[Hexagon] Update MCTargetDesc

Changes include:
- Updates to the instruction descriptor flags.
- Improvements to the packet shuffler and checker.
- Updates to the handling of certain relocations.
- Better handling of duplex instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294226 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Add tests showing missed opportunities to simplify integer absolute instru...
Simon Pilgrim [Mon, 6 Feb 2017 18:57:51 +0000 (18:57 +0000)]
[X86][SSE] Add tests showing missed opportunities to simplify integer absolute instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294216 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a bug in llvm-obdump(1) with the -macho and -disassemble options
Kevin Enderby [Mon, 6 Feb 2017 18:43:18 +0000 (18:43 +0000)]
Fix a bug in llvm-obdump(1) with the -macho and -disassemble options
which caused it to not disassemble the bytes a the start of the section if
the section had symbols and the first symbol was not at the start of the
section.

rdar://30143243

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294212 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Support] Add support for runtime endian values.
Zachary Turner [Mon, 6 Feb 2017 18:31:21 +0000 (18:31 +0000)]
[Support] Add support for runtime endian values.

Endian functions only support reading and writing when the
endianness is known at compile time.  This patch adds overloads
where the endianness is a runtime value, and then delegates the
compile-time versions to the runtime versions.

Differential Revision: https://reviews.llvm.org/D29467

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294209 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ValueTracking] emit a remark when we detect a conflicting assumption (PR31809)
Sanjay Patel [Mon, 6 Feb 2017 18:26:06 +0000 (18:26 +0000)]
[ValueTracking] emit a remark when we detect a conflicting assumption (PR31809)

This is a follow-up to D29395 where we try to be good citizens and let the user know that
we've probably gone off the rails.

This should allow us to resolve:
https://llvm.org/bugs/show_bug.cgi?id=31809

Differential Revision: https://reviews.llvm.org/D29404

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294208 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix the bug of samplepgo indirect call promption when type casting of the return...
Dehao Chen [Mon, 6 Feb 2017 18:10:36 +0000 (18:10 +0000)]
Fix the bug of samplepgo indirect call promption when type casting of the return value is needed.

Summary: When type casting of the return value is needed, promoteIndirectCall will return the type casting instruction instead of the direct call. This patch changed to return the direct call instruction instead.

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29569

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294205 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LangRef] Document some LLVM inline asm special escapes
Reid Kleckner [Mon, 6 Feb 2017 18:08:45 +0000 (18:08 +0000)]
[LangRef] Document some LLVM inline asm special escapes

As discussed on llvm-dev:
http://lists.llvm.org/pipermail/llvm-dev/2017-February/109862.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294204 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Fix incorrect MachinePointerInfo in splitStoreSplat
John Brawn [Mon, 6 Feb 2017 18:07:20 +0000 (18:07 +0000)]
[AArch64] Fix incorrect MachinePointerInfo in splitStoreSplat

When splitting up one store into several in splitStoreSplat we have to
make sure we get the MachinePointerInfo right, otherwise alias
analysis thinks they all store to the same location. This can then
cause invalid scheduling later on.

Differential Revision: https://reviews.llvm.org/D29446

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294203 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] Support bswap as a part of load combine patterns
Artur Pilipenko [Mon, 6 Feb 2017 17:48:08 +0000 (17:48 +0000)]
[DAGCombiner] Support bswap as a part of load combine patterns

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D29397

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294201 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] simplify dyn_cast + isa; NFCI
Sanjay Patel [Mon, 6 Feb 2017 17:16:16 +0000 (17:16 +0000)]
[InstCombine] simplify dyn_cast + isa; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294198 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCommit full codegen for mul-i256.ll . NFC
Amaury Sechet [Mon, 6 Feb 2017 16:21:41 +0000 (16:21 +0000)]
Commit full codegen for mul-i256.ll . NFC

The full codegen is committed for larger multiply, so that won't make the test suite more fragile. However, it'll allow to expose the effects fo various DAG combine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294196 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRuntimeDyldELF/AArch64: Implement basic GOT support
Eugene Leviant [Mon, 6 Feb 2017 15:31:28 +0000 (15:31 +0000)]
RuntimeDyldELF/AArch64: Implement basic GOT support

This patch implements two GOT relocations:
R_AARCH64_ADR_GOT_PAGE and R_AARCH64_LD64_GOT_LO12_NC

Differential revision: https://reviews.llvm.org/D28571

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294191 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd ADDC to SelectionDAG::computeKnownBits and ComputeNumSignBits.
Amaury Sechet [Mon, 6 Feb 2017 14:59:06 +0000 (14:59 +0000)]
Add ADDC to SelectionDAG::computeKnownBits and ComputeNumSignBits.

Summary: As per title.

Reviewers: bkramer, sunfish, lattner, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29521

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294188 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] Make DAGCombiner smarter about overflow
Amaury Sechet [Mon, 6 Feb 2017 14:54:49 +0000 (14:54 +0000)]
[DAGCombiner] Make DAGCombiner smarter about overflow

Summary: Leverage it to transform addc into add.

Reviewers: mkuper, spatel, RKSimon, zvi

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29524

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294187 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)
Amaury Sechet [Mon, 6 Feb 2017 14:28:39 +0000 (14:28 +0000)]
[DAGCombiner] (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)

Summary: This is extracted from D29443 .

Reviewers: mkuper, spatel, RKSimon, zvi, bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29564

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294186 91177308-0d34-0410-b5e6-96231b3b80d8