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Clement Courbet [Wed, 16 May 2018 11:49:15 +0000 (11:49 +0000)]
[llvm-exegesis] Fix unused variable warning in release mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332455
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Matt Arsenault [Wed, 16 May 2018 11:47:30 +0000 (11:47 +0000)]
AMDGPU: Custom lower v4i16/v4f16 vector operations
Avoids stack access.
Also handle extract hi elt pattern from truncate + shift
to avoid a couple test regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332453
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David Bolvansky [Wed, 16 May 2018 11:39:52 +0000 (11:39 +0000)]
[SimplifyLibcalls] Replace locked IO with unlocked IO
Summary: If file stream arg is not captured and source is fopen, we could replace IO calls by unlocked IO ("_unlocked" function variants) to gain better speed,
Reviewers: efriedma, RKSimon, spatel, sanjoy, hfinkel, majnemer, lebedev.ri, rja
Reviewed By: rja
Subscribers: rja, srhines, efriedma, lebedev.ri, llvm-commits
Differential Revision: https://reviews.llvm.org/D45736
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332452
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Simon Pilgrim [Wed, 16 May 2018 10:53:45 +0000 (10:53 +0000)]
[X86] Split WriteCvtI2F/WriteCvtF2I into I<->F32 and I<->F64 scheduler classes
A lot of the models still have too many InstRW overrides for these new classes - this needs cleaning up but I wanted to get the classes in first
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332451
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David Green [Wed, 16 May 2018 10:41:58 +0000 (10:41 +0000)]
[LoopUnroll] Split out simplify code after Unroll into a new function. NFC
So that it can be shared with other passes that may end up doing the same
thing.
Differential Revision: https://reviews.llvm.org/D45874
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332450
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Amara Emerson [Wed, 16 May 2018 10:32:02 +0000 (10:32 +0000)]
[GlobalISel][IRTranslator] Split aggregates during IR translation.
We currently handle all aggregates by creating one large LLT, and letting the
legalizer deal with splitting them up. However using this approach means that
we can't support big endian code correctly.
This patch changes the way that the IRTranslator deals with aggregate values,
by splitting them up into their constituent element values. To do this, parts
of the translator need to be modified to deal with multiple VRegs for a single
Value.
A new Value to VReg mapper is introduced to help keep compile time under
control, currently there is no measurable impact on CTMark despite the extra
code being generated in some cases.
Patch is based on the original work of Tim Northover.
Differential Revision: https://reviews.llvm.org/D46018
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332449
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Andrea Di Biagio [Wed, 16 May 2018 10:12:06 +0000 (10:12 +0000)]
[llvm-mca] Regenerate tests after r332381 and r332361. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332447
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Simon Dardis [Wed, 16 May 2018 10:03:05 +0000 (10:03 +0000)]
[mips] Add support for isBranchOffsetInRange and use it for MipsLongBranch
Add support for this target hook, covering MIPS, microMIPS and MIPSR6, along
with some tests. Also add missing getOppositeBranchOpc() cases exposed by the
tests.
Reviewers: atanasyan, abeserminji, smaksimovic
Differential Revision: https://reviews.llvm.org/D46794
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332446
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Clement Courbet [Wed, 16 May 2018 09:50:04 +0000 (09:50 +0000)]
[llvm-exegesis] Add a flag to output analysis csv to a file.
Reviewers: gchatelet
Subscribers: llvm-commits, tschuett
Differential Revision: https://reviews.llvm.org/D46931
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332445
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Peter Smith [Wed, 16 May 2018 09:33:25 +0000 (09:33 +0000)]
[AArch64] Support "S" inline assembler constraint
This patch re-introduces the "S" inline assembler constraint. This matches
an absolute symbolic address or a label reference. The primary use case is
asm("adrp %0, %1\n\t"
"add %0, %0, :lo12:%1" : "=r"(addr) : "S"(&var));
I say re-introduces as it seems like "S" was implemented in the original
AArch64 backend, but it looks like it wasn't carried forward to the merged
backend. The original implementation had A and L modifiers that could be
used to print ":lo12:" to the string. It looks like gcc doesn't use these
and :lo12: is expected to be written in the inline assembly string so I've
not implemented A and L. Clang already supports the S modifier.
Fixes PR37180
Differential Revision: https://reviews.llvm.org/D46745
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332444
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Andrea Di Biagio [Wed, 16 May 2018 09:24:38 +0000 (09:24 +0000)]
[llvm-mca] Remove redundant includes in Stage.h.
This patch also makes Stage::isReady() a const method.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332443
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Sander de Smalen [Wed, 16 May 2018 09:16:20 +0000 (09:16 +0000)]
[AArch64][SVE] Asm: Support for structured LD2, LD3 and LD4 (scalar+scalar) load instructions.
Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D46679
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332442
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Clement Courbet [Wed, 16 May 2018 09:10:04 +0000 (09:10 +0000)]
Fix unused variable warning in r332437.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332441
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Alexander Richardson [Wed, 16 May 2018 09:00:28 +0000 (09:00 +0000)]
Escape ]]> in xunit xml output
Summary:
This sequence ends the CDATA block so any characters after that are no
longer escaped. This can be fixed by replacing "]]>" with "]]]]><![CDATA[>".
Reviewers: cmatthews
Reviewed By: cmatthews
Differential Revision: https://reviews.llvm.org/D46886
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332440
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Alexander Richardson [Wed, 16 May 2018 08:58:26 +0000 (08:58 +0000)]
Emit a left-shift instead of a power-of-two multiply for jump-tables
Summary:
SelectionDAGLegalize::ExpandNode() inserts an ISD::MUL when lowering a
BR_JT opcode. While many backends optimize this multiply into a shift, e.g.
the MIPS backend currently always lowers this into a sequence of
load-immediate+multiply+mflo in MipsSETargetLowering::lowerMulDiv().
I initially changed the multiply to a shift in the MIPS backend but it
turns out that would not have handled the MIPSR6 case and was a lot more
code than doing it in LegalizeDAG.
I believe performing this simple optimization in LegalizeDAG instead of
each individual backend is the better solution since this also fixes other
backeds such as MSP430 which calls the multiply runtime function
__mspabi_mpyi without this patch.
Reviewers: sdardis, atanasyan, pftbest, asl
Reviewed By: sdardis
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45760
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332439
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Clement Courbet [Wed, 16 May 2018 08:47:21 +0000 (08:47 +0000)]
[llvm-exegesis] Analysis: Display sched class for instructions.
Reviewers: gchatelet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D46883
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332437
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Simon Pilgrim [Wed, 16 May 2018 08:23:47 +0000 (08:23 +0000)]
[X86][SSE] Fix tests for vector rotates by splat variable.
We weren't correctly splatting the offset shift
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332435
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Sander de Smalen [Wed, 16 May 2018 07:50:09 +0000 (07:50 +0000)]
[AArch64][SVE] Asm: Support for contiguous PRF prefetch instructions.
Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D46682
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332433
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Fangrui Song [Wed, 16 May 2018 06:43:27 +0000 (06:43 +0000)]
[Unix] Indent ChangeStd{in,out}ToBinary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332432
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Mikael Holmen [Wed, 16 May 2018 06:36:11 +0000 (06:36 +0000)]
Remove unused variable introduced in r332336
The unused variable caused a compilation warning:
../lib/Target/X86/X86ISelLowering.cpp:34614:17: error: unused variable 'SMax' [-Werror,-Wunused-variable]
if (SDValue SMax = MatchMinMax(SMin, ISD::SMAX, C1))
^
1 error generated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332431
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Shoaib Meenai [Wed, 16 May 2018 04:52:18 +0000 (04:52 +0000)]
[ObjCARC] Prevent code motion into a catchswitch
A catchswitch must be the only non-phi instruction in its basic block;
attempting to move a retain or release into a catchswitch basic block
will result in invalid IR. Explicitly mark a CFG hazard in this case to
prevent the code motion.
Differential Revision: https://reviews.llvm.org/D46482
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332430
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JF Bastien [Wed, 16 May 2018 04:36:37 +0000 (04:36 +0000)]
Revert "Signal handling should be signal-safe"
Some bots don't have double-pointer width compare-and-exchange. Revert for now.q
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332429
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JF Bastien [Wed, 16 May 2018 04:30:00 +0000 (04:30 +0000)]
Signal handling should be signal-safe
Summary:
Before this patch, signal handling wasn't signal safe. This leads to real-world
crashes. It used ManagedStatic inside of signals, this can allocate and can lead
to unexpected state when a signal occurs during llvm_shutdown (because
llvm_shutdown destroys the ManagedStatic). It also used cl::opt without custom
backing storage. Some de-allocation was performed as well. Acquiring a lock in a
signal handler is also a great way to deadlock.
We can't just disable signals on llvm_shutdown because the signals might do
useful work during that shutdown. We also can't just disable llvm_shutdown for
programs (instead of library uses of clang) because we'd have to then mark the
pointers as not leaked and make sure all the ManagedStatic uses are OK to leak
and remain so.
Move all of the code to lock-free datastructures instead, and avoid having any
of them in an inconsistent state. I'm not trying to be fancy, I'm not using any
explicit memory order because this code isn't hot. The only purpose of the
atomics is to guarantee that a signal firing on the same or a different thread
doesn't see an inconsistent state and crash. In some cases we might miss some
state (for example, we might fail to delete a temporary file), but that's fine.
Note that I haven't touched any of the backtrace support despite it not
technically being totally signal-safe. When that code is called we know
something bad is up and we don't expect to continue execution, so calling
something that e.g. sets errno is the least of our problems.
A similar patch should be applied to lib/Support/Windows/Signals.inc, but that
can be done separately.
<rdar://problem/
28010281>
Reviewers: dexonsmith
Subscribers: aheejin, llvm-commits
Differential Revision: https://reviews.llvm.org/D46858
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332428
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Shiva Chen [Wed, 16 May 2018 02:57:26 +0000 (02:57 +0000)]
[DebugInfo] Only handle DBG_VALUE in InlineSpiller.
The instructions using registers should be DBG_VALUE and normal
instructions. Use isDebugValue() to filter out DBG_VALUE and add
an assert to ensure there is no other kind of debug instructions
using the registers.
Differential Revision: https://reviews.llvm.org/D46739
Patch by Hsiangkai Wang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332427
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Evgeny Stupachenko [Wed, 16 May 2018 02:48:50 +0000 (02:48 +0000)]
Fix LSR compile time hang.
Summary:
Limit number of reassociations in GenerateReassociationsImpl.
Reviewers: qcolombet, mkazantsev
Differential Revision: https://reviews.llvm.org/D46039
From: Evgeny Stupachenko <evstupac@gmail.com>
<evgeny.v.stupachenko@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332426
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Chris Matthews [Wed, 16 May 2018 00:37:00 +0000 (00:37 +0000)]
remove output xml incase it is leftover from another run
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332424
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Chris Matthews [Wed, 16 May 2018 00:33:29 +0000 (00:33 +0000)]
Use not to catch unexpected pass as well as remove old test results
As per review feedback, make sure we rm temp files, and make the return
code checking for lit more specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332423
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Peter Collingbourne [Wed, 16 May 2018 00:21:47 +0000 (00:21 +0000)]
ARM: Remove unnecessary argument. NFCI.
IsLittleEndian is already a field of ARMAsmBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332420
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Peter Collingbourne [Wed, 16 May 2018 00:21:31 +0000 (00:21 +0000)]
ARM: Deduplicate code and remove unnecessary declaration. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332419
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Anastasis Grammenos [Wed, 16 May 2018 00:11:52 +0000 (00:11 +0000)]
[Debugify] Fix test failing after r332416
I missed a test that needed an update.
Failing bot: http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/30071
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332418
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Anastasis Grammenos [Tue, 15 May 2018 23:38:05 +0000 (23:38 +0000)]
[Debugfiy] Print the pass name next to the result
CheckDebugify now prints the pass name right next to the result of the check.
Differential Revision: https://reviews.llvm.org/D46908
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332416
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Eli Friedman [Tue, 15 May 2018 23:36:46 +0000 (23:36 +0000)]
[MachineOutliner] Add optsize markings to outlined functions.
It doesn't matter much this late in the pipeline, but one place that
does check for it is the function alignment code.
Differential Revision: https://reviews.llvm.org/D46373
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332415
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Simon Pilgrim [Tue, 15 May 2018 22:11:51 +0000 (22:11 +0000)]
[X86][SSE] Add tests for vector rotates by splat variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332410
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Stanislav Mekhanoshin [Tue, 15 May 2018 22:07:51 +0000 (22:07 +0000)]
[AMDGPU] Fix handling of void types in isLegalAddressingMode
It is legal for the type passed to isLegalAddressingMode to be
unsized or, more specifically, VoidTy. In this case, we must
check the legality of load / stores for all legal types. Directly
trying to call getTypeStoreSize is incorrect, and leads to breakage
in e.g. Loop Strength Reduction. This change guards against that
behaviour.
Differential Revision: https://reviews.llvm.org/D40405
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332409
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Sanjay Patel [Tue, 15 May 2018 22:00:37 +0000 (22:00 +0000)]
[InstCombine] fix binop (shuffle X), C --> shuffle (binop X, C') to check uses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332407
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Sam Clegg [Tue, 15 May 2018 21:49:58 +0000 (21:49 +0000)]
[WebAssembly] Provide WasmFunction content offset information.
WasmObjectWriter mostly operates with function segments offsets that do
not include their size fields. WasmObjectFile needs to have and provide
this information to the lld to maintain proper
R_WEBASSEMBLY_FUNCTION_OFFSET_I32 relocations entries.
Patch by Yury Delendik
Differential Revision: https://reviews.llvm.org/D46763
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332406
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Marek Olsak [Tue, 15 May 2018 21:41:57 +0000 (21:41 +0000)]
AMDGPU: Add a missing test for the 128-bit local addr space option
This should have been pushed with:
"AMDGPU: enable 128-bit for local addr space under an option"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332404
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Marek Olsak [Tue, 15 May 2018 21:41:55 +0000 (21:41 +0000)]
StructurizeCFG: fix inverting conditions
Author: Samuel Pitoiset
Without this patch, it appears to me that we are selecting
the wrong operand when inverting conditions. In the attached
test, it will select %tmp3 instead of %tmp4. To fix it, just
use 'A' as everywhere.
This fixes a regression introduced by
"[PatternMatch] define m_Not using m_Xor and cst_pred_ty"
https://reviews.llvm.org/D46351
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332403
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Evgeniy Stepanov [Tue, 15 May 2018 21:28:25 +0000 (21:28 +0000)]
[msan] Instrument masked.store, masked.load intrinsics.
Summary: Instrument masked store/load intrinsics.
Reviewers: kcc
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D46785
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332402
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Benjamin Kramer [Tue, 15 May 2018 21:26:47 +0000 (21:26 +0000)]
Move helper classes into anonymous namespaces. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332400
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Sanjay Patel [Tue, 15 May 2018 21:23:58 +0000 (21:23 +0000)]
[InstCombine] clean up code for binop-shuffle transforms; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332399
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Jake Ehrlich [Tue, 15 May 2018 20:53:53 +0000 (20:53 +0000)]
[llvm-objcopy] Add --only-keep-debug as a noop
This option just keeps being a problem and really needs to be implemented
in some fashion. Implementing it properly requires some kind of
"replaceSectionReference" method because all the existing links need to be
maintained. The desired behavior is just for allocated sections to become
NOBITS but actually implementing that is rather tricky due to the current
design of llvm-objcopy. However converting allocated sections to NOBITS is
just an optimization and not something debuggers need. Debuggers can debug
a stripped executable and take an unstripped executable for that stripped
executable as input. Additionally allocated sections account for a very
small part of debug binaries so this optimization is quite small. I propose
that for the time being we implement this as a NOP so that people can use
llvm-objcopy where they need to, just in a sub-optimal way.
This option has already blocked a lot of people and its currently blocking me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332396
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Evandro Menezes [Tue, 15 May 2018 20:41:12 +0000 (20:41 +0000)]
[AArch64] Improve single vector lane unscaled stores
When storing the 0th lane of a vector, use a simpler and usually more
efficient scalar store instead. In this case, also using the unscaled
offset.
Differential revision: https://reviews.llvm.org/D46762
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332394
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Sanjay Patel [Tue, 15 May 2018 20:34:09 +0000 (20:34 +0000)]
[InstCombine] add more tests for binop-shuffle; NFC
The splat pattern is part of PR37463:
https://bugs.llvm.org/show_bug.cgi?id=37463
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332393
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Nirav Dave [Tue, 15 May 2018 20:31:53 +0000 (20:31 +0000)]
[DAGCombine] Move load checks on store of loads into candidate
search. NFCI.
Migrate single-use and non-volatility, non-indexed requirements on
stores of immediate store values to candidate collection pass from
later stage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332392
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Peter Collingbourne [Tue, 15 May 2018 20:21:58 +0000 (20:21 +0000)]
Nios2: Unbreak build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332391
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Matt Davis [Tue, 15 May 2018 20:21:04 +0000 (20:21 +0000)]
[llvm-mca] Introduce a pipeline Stage class and FetchStage.
Summary:
This is just an idea, really two ideas. I expect some push-back,
but I realize that posting a diff is the most comprehensive way to express
these concepts.
This patch introduces a Stage class which represents the
various stages of an instruction pipeline. As a start, I have created a simple
FetchStage that is based on existing logic for how MCA produces
instructions, but now encapsulated in a Stage. The idea should become more concrete
once we introduce additional stages. The idea being, that when a stage completes,
the next stage in the pipeline will be executed. Stages are chained together
as a singly linked list to closely model a real pipeline. For now there is only one stage,
so the stage-to-stage flow of instructions isn't immediately obvious.
Eventually, Stage will also handle event notifications, but that functionality
is not complete, and not destined for this patch. Ideally, an interested party
can register for notifications from a particular stage. Callbacks will be issued to
these listeners at various points in the execution of the stage.
For now, eventing functionality remains similar to what it has been in mca::Backend.
We will be building-up the Stage class as we move on, such as adding debug output.
This patch also removes the unique_ptr<Instruction> return value from
InstrBuilder::createInstruction. An Instruction pointer is still produced,
but now it's up to the caller to decide how that item should be managed post-allocation
(e.g., smart pointer). This allows the Fetch stage to create instructions and
manage the lifetime of those instructions as it wishes, and not have to be bound to any
specific managed pointer type. Other callers of createInstruction might have different
requirements, and thus can manage the pointer to fit their needs. Another idea would be to push the
ownership to the RCU.
Currently, the FetchStage will wrap the Instruction
pointer in a shared_ptr. This allows us to remove the Instruction container in
Backend, which was probably going to disappear, or move, at some point anyways.
Note that I did run these changes through valgrind, to make sure we are not leaking
memory. While the shared_ptr comes with some additional overhead it relieves us
from having to manage a list of generated instructions, and/or make lookup calls
to remove the instructions.
I realize that both the Stage class and the Instruction pointer management
(mentioned directly above) are separate but related ideas, and probably should
land as separate patches; I am happy to do that if either idea is decent.
The main reason these two ideas are together is that
Stage::execute() can mutate an InstRef. For the fetch stage, the InstRef is populated
as the primary action of that stage (execute()). I didn't want to change the Stage interface
to support the idea of generating an instruction. Ideally, instructions are to
be pushed through the pipeline. I didn't want to draw too much of a
specialization just for the fetch stage. Excuse the word-salad.
Reviewers: andreadb, courbet, RKSimon
Reviewed By: andreadb
Subscribers: llvm-commits, mgorny, javed.absar, tschuett, gbedwell
Differential Revision: https://reviews.llvm.org/D46741
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332390
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Chandler Carruth [Tue, 15 May 2018 20:16:57 +0000 (20:16 +0000)]
[x86][eflags] Fix PR37431 by teaching the EFLAGS copy lowering to
specially handle SETB_C* pseudo instructions.
Summary:
While the logic here is somewhat similar to the arithmetic lowering, it
is different enough that it made sense to have its own function.
I actually tried a bunch of different optimizations here and none worked
well so I gave up and just always do the arithmetic based lowering.
Looking at code from the PR test case, we actually pessimize a bunch of
code when generating these. Because SETB_C* pseudo instructions clobber
EFLAGS, we end up creating a bunch of copies of EFLAGS to feed multiple
SETB_C* pseudos from a single set of EFLAGS. This in turn causes the
lowering code to ruin all the clever code generation that SETB_C* was
hoping to achieve. None of this is needed. Whenever we're generating
multiple SETB_C* instructions from a single set of EFLAGS we should
instead generate a single maximally wide one and extract subregs for all
the different desired widths. That would result in substantially better
code generation. But this patch doesn't attempt to address that.
The test case from the PR is included as well as more directed testing
of the specific lowering pattern used for these pseudos.
Reviewers: craig.topper
Subscribers: sanjoy, mcrosier, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D46799
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332389
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Benjamin Kramer [Tue, 15 May 2018 20:08:15 +0000 (20:08 +0000)]
Use perfect forwarding to deduplicate code in unit test. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332388
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Konstantin Zhuravlyov [Tue, 15 May 2018 19:32:47 +0000 (19:32 +0000)]
AMDGPU: Fix v_dot{4, 8}* instruction encoding
Differential Revision: https://reviews.llvm.org/D46848
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332387
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Martin Storsjo [Tue, 15 May 2018 19:21:28 +0000 (19:21 +0000)]
[llvm-rc] Add support for the optional CLASS statement for dialogs
Differential Revision: https://reviews.llvm.org/D46875
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332386
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Michael Zolotukhin [Tue, 15 May 2018 18:40:29 +0000 (18:40 +0000)]
[MemorySSA] Don't sort IDF blocks.
Summary:
After r332167 we started to sort the IDF blocks inside IDF calculation, so
there is no need to re-sort them on the user site. The test changes are due to
a slightly different order we're using now (originally we used DFSInNumber and
now the blocks are sorted by a pair (LevelFromRoot, DFSInNumber)).
Reviewers: dberlin, mgrang
Subscribers: Prazek, hiraditya, george.burgess.iv, llvm-commits
Differential Revision: https://reviews.llvm.org/D46899
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332385
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Andrea Di Biagio [Tue, 15 May 2018 18:11:45 +0000 (18:11 +0000)]
[llvm-mca] use a formatted_raw_ostream to insert padding and get rid of tabs. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332381
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Tom Stellard [Tue, 15 May 2018 17:57:09 +0000 (17:57 +0000)]
AMDGPU/GlobalISel: Implement select() for G_FCONSTANT
Summary: Also clean up G_CONSTANT selection.
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D46170
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332379
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Konstantin Zhuravlyov [Tue, 15 May 2018 17:39:13 +0000 (17:39 +0000)]
AMDGPU: Add disasm tests for deep learning instructions + fix v_fmac_f32 disasm
Differential Revision: https://reviews.llvm.org/D46853
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332377
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Simon Pilgrim [Tue, 15 May 2018 17:36:49 +0000 (17:36 +0000)]
[X86] Split WriteCvtF2F into F32->F64 and F64->F32 scheduler classes
BtVer2 - Fixes schedules for (V)CVTPS2PD instructions
A lot of the Intel models still have too many InstRW overrides for these new classes - this needs cleaning up but I wanted to get the classes in first
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332376
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Sanjay Patel [Tue, 15 May 2018 17:14:23 +0000 (17:14 +0000)]
[InstCombine] fix binop-of-shuffles to check uses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332375
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Sanjay Patel [Tue, 15 May 2018 16:47:47 +0000 (16:47 +0000)]
[InstCombine] add multi-use shuffle tests and regenerate checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332373
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Krzysztof Parzyszek [Tue, 15 May 2018 16:32:24 +0000 (16:32 +0000)]
[Hexagon] Remove unused function from subtarget
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332369
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Nico Weber [Tue, 15 May 2018 16:30:30 +0000 (16:30 +0000)]
Rename three cxx files in unittests to cpp.
LLVM uses cpp as its C++ file extension, these are the only three cxx file in
the monorepo. These files apparently were called to escape a CMake check -- use
the LLVM_OPTIONAL_SOURCES mechanism that's meant as an escape for this case
instead.
No intended behavior change.
https://reviews.llvm.org/D46843
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332368
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Geoff Berry [Tue, 15 May 2018 16:27:34 +0000 (16:27 +0000)]
[AArch64] Fix mir test case liveins info.
The test case added in r332265 had incomplete livein information which
was caught by the EXPENSIVE_CHECKS bot. Fix the livein information and
add -verify-machineinstrs to the test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332367
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Krzysztof Parzyszek [Tue, 15 May 2018 16:13:52 +0000 (16:13 +0000)]
[Hexagon] Remove unused flag from subtarget and (non)corresponding test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332365
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Simon Dardis [Tue, 15 May 2018 16:05:04 +0000 (16:05 +0000)]
[mips] Mark select instructions correctly
Reviewers: atanasyan, abeserminji, smaksimovic
Differential Revision: https://reviews.llvm.org/D46702
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332364
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Andrea Di Biagio [Tue, 15 May 2018 15:18:05 +0000 (15:18 +0000)]
[llvm-mca] Strip leading tabs and spaces from instruction strings before printing. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332361
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Sanjay Patel [Tue, 15 May 2018 14:16:24 +0000 (14:16 +0000)]
[DAG] propagate FMF for all FPMathOperators
This is a simple hack based on what's proposed in D37686, but we can extend it if needed in follow-ups.
It gets us most of the FMF functionality that we want without adding any state bits to the flags. It
also intentionally leaves out non-FMF flags (nsw, etc) to minimize the patch.
It should provide a superset of the functionality from D46563 - the extra tests show propagation and
codegen diffs for fcmp, vecreduce, and FP libcalls.
The PPC log2() test shows the limits of this most basic approach - we only applied 'afn' to the last
node created for the call. AFAIK, there aren't any libcall optimizations based on the flags currently,
so that shouldn't make any difference.
Differential Revision: https://reviews.llvm.org/D46854
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332358
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Simon Pilgrim [Tue, 15 May 2018 14:12:32 +0000 (14:12 +0000)]
[X86] Split off F16C WriteCvtPH2PS/WriteCvtPS2PH scheduler classes
Btver2 - VCVTPH2PSYrm needs to double pump the AGU
Broadwell - missing VCVTPS2PH*mr stores extra latency
Allows us to remove the WriteCvtF2FSt conversion store class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332357
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Paul Semel [Tue, 15 May 2018 14:09:37 +0000 (14:09 +0000)]
[llvm-objcopy] Add --keep-symbol (-K) option
This option permits to explicitly keep the specified
symbol so that it doesn't get removed.
Differential Revision: https://reviews.llvm.org/D46819
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332356
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Eric Liu [Tue, 15 May 2018 13:43:20 +0000 (13:43 +0000)]
Fix broken asan Support tests
The asan failures were caught in google internal asan tests after r332311
o Make StackOption support cl::list
o Rememeber to removeArguments for cl::alias in tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332354
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Pavel Labath [Tue, 15 May 2018 13:24:10 +0000 (13:24 +0000)]
Reapply "DWARFVerifier: Check "completeness" of .debug_names section"
This is a resubmit of r331868 (D46583), which was reverted due to
failures on the PS4 bot.
These have been resolved with r332246/D46748.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332349
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Clement Courbet [Tue, 15 May 2018 13:07:05 +0000 (13:07 +0000)]
[llvm-exegesis] Split AsmTemplate.Name into components.
Summary:
AsmTemplate becomes IntructionBenchmarkKey, which has three components.
This allows retreiving the opcode for analysis.
Reviewers: gchatelet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D46873
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332348
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Simon Pilgrim [Tue, 15 May 2018 12:50:06 +0000 (12:50 +0000)]
[llvm-mca][x86] Add F16C instruction tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332347
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Clement Courbet [Tue, 15 May 2018 12:38:06 +0000 (12:38 +0000)]
Fix compilation under pre-c++14 gccs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332346
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Clement Courbet [Tue, 15 May 2018 12:27:36 +0000 (12:27 +0000)]
Fix r332344: only the native target is linked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332345
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Clement Courbet [Tue, 15 May 2018 12:08:00 +0000 (12:08 +0000)]
[llvm-exegesis] Add an analysis mode.
Summary:
The analysis mode gives the user a clustered view of the measurement results.
Next steps are (requires the split ok AsmTemplate.Name into {mnemonic, mode}):
- Show the sched class.
- Highlight any inconsistencies with the checked-in data.
Reviewers: gchatelet
Subscribers: mgorny, llvm-commits, tschuett
Differential Revision: https://reviews.llvm.org/D46865
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332344
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whitequark [Tue, 15 May 2018 11:31:07 +0000 (11:31 +0000)]
[MergeFunctions] Fix merging of small weak functions
When two interposable functions are merged, we cannot replace
uses and have to emit calls to a common internal function. However,
writeThunk() will not actually emit a thunk if the function is too
small. This leaves us in a broken state where mergeTwoFunctions
already rewired the functions, but writeThunk doesn't do anything.
This patch changes the implementation so that:
* writeThunk() does just that.
* The direct replacement of calls is moved into mergeTwoFunctions()
into the non-interposable case only.
* isThunkProfitable() is extracted and will be called for
the non-iterposable case always, and in the interposable case
only if uses are still left after replacement.
This issue has been introduced in https://reviews.llvm.org/D34806,
where the code for checking thunk profitability has been moved.
Differential Revision: https://reviews.llvm.org/D46804
Reviewed By: whitequark
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332342
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Simon Dardis [Tue, 15 May 2018 11:21:07 +0000 (11:21 +0000)]
[mips] Fix formatting of floating point conversion patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332341
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Simon Dardis [Tue, 15 May 2018 11:18:24 +0000 (11:18 +0000)]
[mips] Add disassembly support for comparison instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332340
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Simon Dardis [Tue, 15 May 2018 11:10:30 +0000 (11:10 +0000)]
[mips] Fix predicates of mfc1, mtc1 instructions
Reviewers: atanasyan, abeserminji, smaksimovic
Differential Revision: https://reviews.llvm.org/D46692
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332339
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Andrea Di Biagio [Tue, 15 May 2018 10:30:39 +0000 (10:30 +0000)]
[llvm-mca] Remove unused include header files. NFC
Also, run clang-format on RetireControlUnit.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332337
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Artur Gainullin [Tue, 15 May 2018 10:24:12 +0000 (10:24 +0000)]
[X86] Improve unsigned saturation downconvert detection.
Summary:
New unsigned saturation downconvert patterns detection was implemented in
X86 Codegen:
(truncate (smin (smax (x, C1), C2)) to dest_type),
where C1 >= 0 and C2 is unsigned max of destination type.
(truncate (smax (smin (x, C2), C1)) to dest_type)
where C1 >= 0, C2 is unsigned max of destination type and C1 <= C2.
These two patterns are equivalent to:
(truncate (umin (smax(x, C1), unsigned_max_of_dest_type)) to dest_type)
Reviewers: RKSimon
Subscribers: llvm-commits, a.elovikov
Differential Revision: https://reviews.llvm.org/D45315
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332336
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Andrea Di Biagio [Tue, 15 May 2018 09:31:32 +0000 (09:31 +0000)]
[llvm-mca] Add file header to RetireControlUnit.cpp.
Strictly speaking, this is not necessary for .cpp files. However, other .cpp
files from this same tool have it. This also matches what we do in other tools.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332334
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Clement Courbet [Tue, 15 May 2018 07:40:21 +0000 (07:40 +0000)]
[llvm-exegesis] InMemoryAssembler: handle return-less targets (e.g. arm).
Summary: Arm does not have a ret code per se.
Reviewers: gchatelet
Subscribers: mgorny, javed.absar, kristof.beyls, tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D45672
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332331
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Clement Courbet [Tue, 15 May 2018 07:35:21 +0000 (07:35 +0000)]
[llvm-exegesis] Check perf event validity.
This was part of https://reviews.llvm.org/D46821.
Authored by Guillaume Chatelet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332330
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Martin Storsjo [Tue, 15 May 2018 06:35:29 +0000 (06:35 +0000)]
[llvm-rc] Add support for parsing memory flags
Most of the handling is pretty straightforward; fetch the default
memory flags for the specific resource type before parsing the flags
and apply them on top of that, except that some flags imply others
and some flags clear more than one flag.
For icons and cursors, the flags set get passed on to all individual
single icon/cursor resources, while only some flags affect the icon/cursor
group resource.
For stringtables, the behaviour is pretty simple; the first stringtable
resource of a bundle sets the flags for the whole bundle.
The output of these tests match rc.exe byte for byte.
The actual use of these memory flags is deprecated and they have no
effect since Win16, but some resource script files may still happen
to have them in place.
Differential Revision: https://reviews.llvm.org/D46818
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332329
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Martin Storsjo [Tue, 15 May 2018 06:35:20 +0000 (06:35 +0000)]
[llvm-rc] Read the Planes/BitCount fields from BITMAPINFOHEADER for icons
Previously these fields were only read from this header for cursors,
while Planes was hardcoded to 1 for icons (with a comment that it was
unknown why this was needed) and BitCount was left at the value
read originally in the RESDIRENTRY.
This fixes the single byte that was differing for the icon/cursor test
compared to rc.exe.
This is based on research/testing by Nico Weber.
Differential Revision: https://reviews.llvm.org/D46816
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332328
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Craig Topper [Tue, 15 May 2018 04:26:27 +0000 (04:26 +0000)]
[X86] Add fast isel tests for some of the avx512 truncate intrinsics to match current clang codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332326
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JF Bastien [Tue, 15 May 2018 04:23:48 +0000 (04:23 +0000)]
[NFC] pull a function into its own lambda
As requested in D46858, pulling this function into its own lambda makes it
easier to read that part of the code and reason as to what's going on because
the scope it can be called from is extremely limited. We want to keep it as a
function because it's called from the two subsequent lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332325
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JF Bastien [Tue, 15 May 2018 04:06:28 +0000 (04:06 +0000)]
[NFC] Update comments
Don't prepend function or data name before each comment. Split into its own NFC patch as requested in D46858.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332323
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Craig Topper [Tue, 15 May 2018 03:17:05 +0000 (03:17 +0000)]
[X86] Revert part of r332267: Remove GCCBuiltin from the intrinsics that clang stopped using in r332266.
The masking of instructions that produce byte or word elements doesn't work right without avx512bw since the generic i8/i16 select won't be legal in the SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332321
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Shiva Chen [Tue, 15 May 2018 01:28:50 +0000 (01:28 +0000)]
[RISCV] Define FeatureRelax and shouldForceRelocation for RISCV linker relaxation
1. Deine FeatureRelax to enable/disable linker relaxation.
2. Define shouldForceRelocation to preserve relocation types even if the fixup
can be resolved when linker relaxation enabled. This is necessary for
correctness as offsets may change during relaxation.
Differential Revision: https://reviews.llvm.org/D46674
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332318
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Max Kazantsev [Tue, 15 May 2018 01:21:56 +0000 (01:21 +0000)]
[NFC] Add const to method signature
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332317
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Sam Clegg [Tue, 15 May 2018 00:46:43 +0000 (00:46 +0000)]
Fix debug build by adding missing dependencies on libBinaryFormat
Debug BUILD_SHARED_LIBS build was broken by rL332305
Differential Revision: https://reviews.llvm.org/D46859
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332315
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Vedant Kumar [Tue, 15 May 2018 00:29:27 +0000 (00:29 +0000)]
[Debugify] Add -debugify-each for testing each pass in a pipeline
This adds a -debugify-each mode to opt which, when enabled, wraps each
{Module,Function}Pass in a pipeline with logic to add, check, and strip
synthetic debug info for testing purposes.
This mode can be used to test complex pipelines for debug info bugs, or
to collect statistics about the number of debug values & locations lost
throughout various stages of a pipeline.
Patch by Son Tuan Vu!
Differential Revision: https://reviews.llvm.org/D46525
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332312
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Keno Fischer [Mon, 14 May 2018 23:26:06 +0000 (23:26 +0000)]
[CommandLine] Error message for incorrect PositionalEatArgs usage
Summary:
bugpoint has several options specified as `PositionalEatArgs` to pass
options through to the underlying tool, e.g. `-tool-args`. The `-help`
message suggests the usage is: `-tool-args=<string>`. However, this is
misleading, because that's not how these arguments work. Rather than taking
a value, the option consumes all positional arguments until the next
recognized option (or all arguments if `--` is specified at some point).
To make this slightly clearer, instead print the help as:
```
-tool-args <string>... - <tool arguments>...
```
Additionally, add an error if the user attempts to use a `PositionalEatArgs`
argument with a value, instead of silently ignoring it. Example:
```
./bin/bugpoint -tool-args=-mpcu=skylake-avx512
bugpoint: for the -tool-args option: This argument does not take a value.
Instead, it consumes any positional arguments until the next recognized option.
```
Reviewed By: aprantl
Differential Revision: https://reviews.llvm.org/D46787
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332311
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Sam Clegg [Mon, 14 May 2018 22:42:07 +0000 (22:42 +0000)]
[WebAssembly] Move toString helpers to BinaryFormat
Subscribers: dschuff, mgorny, jgravelle-google, aheejin, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D46847
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332305
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Brian Gesiak [Mon, 14 May 2018 22:36:47 +0000 (22:36 +0000)]
Revert "[Option] Fix PR37006 prefix choice in findNearest"
Summary:
This revision causes build failures in PS4 and ppc64le buildbots (for example,
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/29988).
I'll revert for now and try to diagnose the issue.
Test Plan: check-llvm check-clang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332304
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Keno Fischer [Mon, 14 May 2018 22:05:01 +0000 (22:05 +0000)]
[InstCombine] fix crash due to ignored addrspacecast
Summary:
Part of the InstCombine code for simplifying GEPs looks through
addrspacecasts. However, this was done by updating a variable
also used by the next transformation, for marking GEPs as
inbounds. This led to replacing a GEP with a similar instruction
in a different addrspace, which caused an assertion failure in RAUW.
This caused julia issue https://github.com/JuliaLang/julia/issues/27055
Patch by Jeff Bezanson <jeff@juliacomputing.com>
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D46722
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332302
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Sanjay Patel [Mon, 14 May 2018 21:53:21 +0000 (21:53 +0000)]
[AArch64] enhance test to show FMF loss; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332301
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Brian Gesiak [Mon, 14 May 2018 21:35:00 +0000 (21:35 +0000)]
[Option] Fix PR37006 prefix choice in findNearest
Summary:
In https://bugs.llvm.org/show_bug.cgi?id=37006 Nico Weber points out a
flaw in `OptTable::findNearest`: if an option "foo"'s prefixes are "--"
and "-", then the nearest option for "--fob" will be "-foo". This is
incorrect, however, since the function is expected to return "--foo".
The bug is due to a naive loop that attempts to predetermines which
prefix is best. Instead, compute the edit distance for each prefix/name
pair.
Test Plan: `check-llvm`
Reviewers: thakis
Reviewed By: thakis
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46776
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332299
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Martin Storsjo [Mon, 14 May 2018 21:32:52 +0000 (21:32 +0000)]
[ARM] Back up R4 and LR if calling the stack probe function
Differential Revision: https://reviews.llvm.org/D46777
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332298
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