OSDN Git Service

android-x86/external-llvm.git
5 years agoRegAllocFast: Rename statistic from NumCopies to NumCoalesced
Matthias Braun [Wed, 7 Nov 2018 02:04:07 +0000 (02:04 +0000)]
RegAllocFast: Rename statistic from NumCopies to NumCoalesced

The metric does not return the number of remaining (or inserted) copies
but the number of copies that were coalesced. Pick a more descriptive
name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346287 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Update test cases after FixFunctionBitcasts
Heejin Ahn [Wed, 7 Nov 2018 01:58:50 +0000 (01:58 +0000)]
[WebAssembly] Update test cases after FixFunctionBitcasts

Summary:
This updates generated binaries and corresponding test cases up to date
after applying FixFunctionBitcasts pass.

Reviewers: sbc100

Subscribers: dschuff, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D54070

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346286 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IR] add optional parameter for copying IR flags to compare instructions
Sanjay Patel [Wed, 7 Nov 2018 00:00:42 +0000 (00:00 +0000)]
[IR] add optional parameter for copying IR flags to compare instructions

As shown, this is used to eliminate redundant code in InstCombine,
and there are more cases where we should be using this pattern, but
we're currently unintentionally dropping flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346282 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Windows] Simplify WindowsSupport.h
Reid Kleckner [Tue, 6 Nov 2018 23:39:59 +0000 (23:39 +0000)]
[Windows] Simplify WindowsSupport.h

Sink Windows version detection code from WindowsSupport.h to Path.inc.
These functions don't need to be inlined. I randomly picked Process.inc
for the Windows version helpers, since that's the most related file.

Sink MakeErrMsg to Program.inc since it's the main client.

Move those functions into the llvm namespace, and delete the scoped
handle copy and assignment operators.

Reviewers: zturner, aganea

Differential Revision: https://reviews.llvm.org/D54182

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346280 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[FileCheck] Try to fix windows bots broken by r346272
Joel E. Denny [Tue, 6 Nov 2018 22:42:10 +0000 (22:42 +0000)]
[FileCheck] Try to fix windows bots broken by r346272

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346277 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MachineOutliner][NFC] Remove OccurrenceCount from SuffixTreeNode
Jessica Paquette [Tue, 6 Nov 2018 22:23:13 +0000 (22:23 +0000)]
[MachineOutliner][NFC] Remove OccurrenceCount from SuffixTreeNode

After changing the way we find candidates in r346269, this is no longer used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346275 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MachineOutliner][NFC] Remove IsInTree from SuffixTreeNode
Jessica Paquette [Tue, 6 Nov 2018 22:21:11 +0000 (22:21 +0000)]
[MachineOutliner][NFC] Remove IsInTree from SuffixTreeNode

After changing the way we find repeated substrings in r346269, this
field is no longer used by anything, so it can be removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346274 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PATCH] [AArch64] Refactor helper functions (NFC)
Evandro Menezes [Tue, 6 Nov 2018 22:17:14 +0000 (22:17 +0000)]
[PATCH] [AArch64] Refactor helper functions (NFC)

Refactor helper functions in AArch64InstrInfo to be static methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346273 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[FileCheck] Parse command-line options from FILECHECK_OPTS
Joel E. Denny [Tue, 6 Nov 2018 22:07:03 +0000 (22:07 +0000)]
[FileCheck] Parse command-line options from FILECHECK_OPTS

This feature makes it easy to tune FileCheck diagnostic output when
running the test suite via ninja, a bot, or an IDE.  For example:

```
$ FILECHECK_OPTS='-color -v -dump-input-on-failure' \
  LIT_FILTER='OpenMP/for_codegen.cpp' ninja check-clang \
  | less -R
```

Reviewed By: probinson

Differential Revision: https://reviews.llvm.org/D53517

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346272 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MachineOutliner][NFC] Add findRepeatedSubstrings to SuffixTree, kill LeafVector
Jessica Paquette [Tue, 6 Nov 2018 21:46:41 +0000 (21:46 +0000)]
[MachineOutliner][NFC] Add findRepeatedSubstrings to SuffixTree, kill LeafVector

Instead of iterating over the leaves to find repeated substrings, and walking
collecting leaf children when we don't necessarily need them, let's just
calculate what we need and iterate over that.

By doing this, we don't have to save every leaf. It's easier to read the code
too and understand what's going on.

The goal here, at the end of the day, is to set up to allow us to do something
like

for (RepeatedSubstring &RS : ST) {
 ... do stuff with RS ...
}

Which would let us perform the cost model stuff and the repeated substring
query at the same time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346269 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoSilence deprecation warning for GetVersionEx with clang-cl
Reid Kleckner [Tue, 6 Nov 2018 21:40:32 +0000 (21:40 +0000)]
Silence deprecation warning for GetVersionEx with clang-cl

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346268 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Add an option -disable-promote-alloca-to-lds
Yaxun Liu [Tue, 6 Nov 2018 21:28:17 +0000 (21:28 +0000)]
AMDGPU: Add an option -disable-promote-alloca-to-lds

Add this option for debugging and providing workaround.

By default it is off so no behavior change in backend.

Differential Revision: https://reviews.llvm.org/D54158

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346267 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU/Docs: Fix the processor table
Konstantin Zhuravlyov [Tue, 6 Nov 2018 20:23:53 +0000 (20:23 +0000)]
AMDGPU/Docs: Fix the processor table

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346263 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ThinLTO] Split NotEligibleToImport into legality and inlinability flags
Teresa Johnson [Tue, 6 Nov 2018 19:41:35 +0000 (19:41 +0000)]
[ThinLTO] Split NotEligibleToImport into legality and inlinability flags

Summary:
The NotEligibleToImport flag on the GlobalValueSummary was set if it
isn't legal to import (e.g. because it references unpromotable locals)
and when it can't be inlined (in which case importing is pointless).

I split out the inlinable piece into a separate flag on the
FunctionSummary (doesn't make sense for aliases or global variables),
because in the future we may want to import for reasons other than
inlining.

Reviewers: davidxl

Subscribers: mehdi_amini, inglorion, eraman, steven_wu, dexonsmith, arphaman, llvm-commits

Differential Revision: https://reviews.llvm.org/D53345

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346261 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Add custom promotion of v2i8/v2i16 fp_to_sint to avoid over promotion to v2i64...
Craig Topper [Tue, 6 Nov 2018 19:24:21 +0000 (19:24 +0000)]
[X86] Add custom promotion of v2i8/v2i16 fp_to_sint to avoid over promotion to v2i64 which would force scalarization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346259 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CodeExtractor] Do not extract calls to eh_typeid_for (PR39545)
Vedant Kumar [Tue, 6 Nov 2018 19:06:08 +0000 (19:06 +0000)]
[CodeExtractor] Do not extract calls to eh_typeid_for (PR39545)

The lowering for a call to eh_typeid_for changes when it's moved from
one function to another.

There are several proposals for fixing this issue in llvm.org/PR39545.
Until some solution is in place, do not allow CodeExtractor to extract
calls to eh_typeid_for, as that results in serious miscompilations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346256 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CodeExtractor] Erase use-without-def debug intrinsics in parent func
Vedant Kumar [Tue, 6 Nov 2018 19:05:53 +0000 (19:05 +0000)]
[CodeExtractor] Erase use-without-def debug intrinsics in parent func

When CodeExtractor moves instructions to a new function, debug
intrinsics referring to those instructions within the parent function
become invalid.

This results in the same verifier failure which motivated r344545, about
function-local metadata being used in the wrong function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346255 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoLivePhysRegs/IfConversion: Change some types from unsigned to MCPhysReg; NFC
Matthias Braun [Tue, 6 Nov 2018 19:00:11 +0000 (19:00 +0000)]
LivePhysRegs/IfConversion: Change some types from unsigned to MCPhysReg; NFC

Change the type in a couple of lists and sets that only store physical
registers from unsigned to MCPhysRegs. The later is only 16bits and
saves us a bit of memory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346254 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][GlobalISel] Simplify and autogenerate the legalizer tests
Volkan Keles [Tue, 6 Nov 2018 18:59:18 +0000 (18:59 +0000)]
[AArch64][GlobalISel] Simplify and autogenerate the legalizer tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346253 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[utils] Update SmallVector lldb formatter for r337514
Justin Bogner [Tue, 6 Nov 2018 18:52:30 +0000 (18:52 +0000)]
[utils] Update SmallVector lldb formatter for r337514

SmallVector was changed to store a begin and a size rather than a
begin and an end a while back. Update the formatter to look at the
correct members.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346252 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReland r346166: [GlobalISel] Refactor the artifact combiner a bit by using MIPatternMatch
Volkan Keles [Tue, 6 Nov 2018 18:31:25 +0000 (18:31 +0000)]
Reland r346166: [GlobalISel] Refactor the artifact combiner a bit by using MIPatternMatch

It was causing a crash because we were trying to get the definition
of a target register. Fixed the issue by adding a check and added
a test case for that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346251 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoDisable calls to *_finite and other glibc-only functions on Musl.
Eli Friedman [Tue, 6 Nov 2018 18:23:32 +0000 (18:23 +0000)]
Disable calls to *_finite and other glibc-only functions on Musl.

Non-GNU environments don't have __finite_*, so treat them as
unavailable.

Differential Revision: https://reviews.llvm.org/D51282

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346250 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Add shared memory support to limits field
Derek Schuff [Tue, 6 Nov 2018 17:27:25 +0000 (17:27 +0000)]
[WebAssembly] Add shared memory support to limits field

Support the IS_SHARED bit in the memory limits flag word.
The compiler does not create object files with memory definitions,
but the field is used by the linker.

Differential Revision: https://reviews.llvm.org/D54131

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346246 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] allow vector types for fcmp+fpext fold
Sanjay Patel [Tue, 6 Nov 2018 17:20:20 +0000 (17:20 +0000)]
[InstCombine] allow vector types for fcmp+fpext fold

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346245 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add vector test for fcmp+fpext; NFC
Sanjay Patel [Tue, 6 Nov 2018 17:06:58 +0000 (17:06 +0000)]
[InstCombine] add vector test for fcmp+fpext; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346243 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] propagate fast-math-flags when folding fcmp+fpext, part 2
Sanjay Patel [Tue, 6 Nov 2018 16:45:27 +0000 (16:45 +0000)]
[InstCombine] propagate fast-math-flags when folding fcmp+fpext, part 2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346242 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] rearrange code for fcmp+fpext; NFCI
Sanjay Patel [Tue, 6 Nov 2018 16:37:35 +0000 (16:37 +0000)]
[InstCombine] rearrange code for fcmp+fpext; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346241 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] propagate fast-math-flags when folding fcmp+fpext
Sanjay Patel [Tue, 6 Nov 2018 16:23:03 +0000 (16:23 +0000)]
[InstCombine] propagate fast-math-flags when folding fcmp+fpext

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346240 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] adjust tests to show dropping FMF; NFC
Sanjay Patel [Tue, 6 Nov 2018 16:07:39 +0000 (16:07 +0000)]
[InstCombine] adjust tests to show dropping FMF; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346239 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] propagate fast-math-flags when folding fcmp+fneg, part 2
Sanjay Patel [Tue, 6 Nov 2018 15:58:57 +0000 (15:58 +0000)]
[InstCombine] propagate fast-math-flags when folding fcmp+fneg, part 2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346238 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[benchmark] Disable exceptions in Microsoft STL
Elizabeth Andrews [Tue, 6 Nov 2018 15:57:59 +0000 (15:57 +0000)]
[benchmark] Disable exceptions in Microsoft STL

This patch disables exceptions in Microsoft STL when exception
handling is not enabled in Benchmark project. It fixes Windows
builds that were failing due to C4530 warnings thrown by MS STL.

Differential Revision: https://reviews.llvm.org/D52998

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346237 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] adjust tests to show dropping FMF; NFC
Sanjay Patel [Tue, 6 Nov 2018 15:57:52 +0000 (15:57 +0000)]
[InstCombine] adjust tests to show dropping FMF; NFC

Also, remove some stale FIXME comments ( rL346234 ).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346236 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] reduce code; NFC
Sanjay Patel [Tue, 6 Nov 2018 15:53:58 +0000 (15:53 +0000)]
[InstCombine] reduce code; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346235 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] propagate fast-math-flags when folding fcmp+fneg
Sanjay Patel [Tue, 6 Nov 2018 15:49:45 +0000 (15:49 +0000)]
[InstCombine] propagate fast-math-flags when folding fcmp+fneg

This is another part of solving PR39475:
https://bugs.llvm.org/show_bug.cgi?id=39475

This might be enough to fix that particular issue, but as noted
with the FIXME, we're still dropping FMF on other folds around here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346234 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add tests for FMF propagation failure; NFC
Sanjay Patel [Tue, 6 Nov 2018 15:21:44 +0000 (15:21 +0000)]
[InstCombine] add tests for FMF propagation failure; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346232 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[mips] Support sigrie instruction
Simon Atanasyan [Tue, 6 Nov 2018 14:37:24 +0000 (14:37 +0000)]
[mips] Support sigrie instruction

The `sigrie` instruction signals a Reserved Instruction Exception.
This patch adds support for assembling / disassembling the instruction.

Differential Revision: http://reviews.llvm.org/D53861

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346230 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-exegesis] Ignore X86 pseudo instructions.
Clement Courbet [Tue, 6 Nov 2018 14:11:58 +0000 (14:11 +0000)]
[llvm-exegesis] Ignore X86 pseudo instructions.

Summary: They do not lower to actual MCInsts and have no scheduling info.

Reviewers: gchatelet

Subscribers: llvm-commits, tschuett

Differential Revision: https://reviews.llvm.org/D54147

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346227 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][NFC] Fix comment.
Clement Courbet [Tue, 6 Nov 2018 13:48:56 +0000 (13:48 +0000)]
[X86][NFC] Fix comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346226 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Ensure nested shifts are in range (OSS-Fuzz #9880)
Simon Pilgrim [Tue, 6 Nov 2018 11:28:22 +0000 (11:28 +0000)]
[InstCombine] Ensure nested shifts are in range (OSS-Fuzz #9880)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346225 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Support] Fix `warning: unknown pragma ignored` for mingw target
Martin Storsjo [Tue, 6 Nov 2018 09:08:20 +0000 (09:08 +0000)]
[Support] Fix `warning: unknown pragma ignored` for mingw target

Differential Revision: https://reviews.llvm.org/D54133

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346218 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Turn collectTransitivePredecessors into a static function
Max Kazantsev [Tue, 6 Nov 2018 09:07:03 +0000 (09:07 +0000)]
[NFC] Turn collectTransitivePredecessors into a static function

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346217 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[XRay] Update XRayRecord to support Custom/Typed Events
Dean Michael Berris [Tue, 6 Nov 2018 08:51:37 +0000 (08:51 +0000)]
[XRay] Update XRayRecord to support Custom/Typed Events

Summary:
This change cuts across LLVM and compiler-rt to add support for
rendering custom events in the XRayRecord type, to allow for including
user-provided annotations in the output YAML (as raw bytes).

This work enables us to add custom event and typed event records into
the `llvm::xray::Trace` type for user-provided events. This can then be
programmatically handled through the C++ API and can be included in some
of the tooling as well. For now we support printing the raw data we
encounter in the custom events in the converted output.

Future work will allow us to start interpreting these custom and typed
events through a yet-to-be-defined API for extending the trace analysis
library.

Reviewers: mboerger

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D54139

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346214 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LICM] Remove too conservative IsMustExecute variable
Max Kazantsev [Tue, 6 Nov 2018 04:17:40 +0000 (04:17 +0000)]
[LICM] Remove too conservative IsMustExecute variable

LICM relies on variable `MustExecute` which is conservatively set to `false`
in all non-headers. It is used when we decide whether or not we want to hoist
an instruction or a guard.

For the guards, it might be too conservative to use this variable, we can
instead use a more precise logic from LoopSafetyInfo. Currently it is only NFC
because `IsMemoryNotModified` is also conservatively set to `false` for all
non-headers, and we cannot hoist guards from non-header blocks. However once we
give up using `IsMemoryNotModified` and use a smarter check instead, this will
allow us to hoist guards from all mustexecute non-header blocks.

Differential Revision: https://reviews.llvm.org/D50888
Reveiwed By: fedor.sergeev

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346204 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAArch64: Cleanup CCMP code; NFC
Matthias Braun [Tue, 6 Nov 2018 03:15:22 +0000 (03:15 +0000)]
AArch64: Cleanup CCMP code; NFC

Cleanup CCMP pattern matching code in preparation for review/bugfix:
- Rename `isConjunctionDisjunctionTree()` to `canEmitConjunction()`
  (it won't accept arbitrary disjunctions and is really about whether we
   can transform the subtree into a conjunction that we can emit).
- Rename `emitConjunctionDisjunctionTree()` to `emitConjunction()`

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346203 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoIt's a test commit, which is my first commit and also add my name to CREDITS.TXT
Zi Xuan Wu [Tue, 6 Nov 2018 03:07:03 +0000 (03:07 +0000)]
It's a test commit, which is my first commit and also add my name to CREDITS.TXT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346202 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LICM] Use ICFLoopSafetyInfo in LICM
Max Kazantsev [Tue, 6 Nov 2018 02:44:49 +0000 (02:44 +0000)]
[LICM] Use ICFLoopSafetyInfo in LICM

This patch makes LICM use `ICFLoopSafetyInfo` that is a smarter version
of LoopSafetyInfo that leverages power of Implicit Control Flow Tracking
to keep track of throwing instructions and give less pessimistic answers
to queries related to throws.

The ICFLoopSafetyInfo itself has been introduced in rL344601. This patch
enables it in LICM only.

Differential Revision: https://reviews.llvm.org/D50377
Reviewed By: apilipenko

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346201 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Add motivating test case for revert in rL346198
Max Kazantsev [Tue, 6 Nov 2018 02:12:44 +0000 (02:12 +0000)]
[NFC] Add motivating test case for revert in rL346198

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346199 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[IndVars] Smart hard uses detection"
Max Kazantsev [Tue, 6 Nov 2018 02:02:05 +0000 (02:02 +0000)]
Revert "[IndVars] Smart hard uses detection"

This reverts commit 2f425e9c7946b9d74e64ebbfa33c1caa36914402.

It seems that the check that we still should do the transform if we
know the result is constant is missing in this code. So the logic that
has been deleted by this change is still sometimes accidentally useful.
I revert the change to see what can be done about it. The motivating
case is the following:

@Y = global [400 x i16] zeroinitializer, align 1

define i16 @foo() {
entry:
  br label %for.body

for.body:                                         ; preds = %entry, %for.body
  %i = phi i16 [ 0, %entry ], [ %inc, %for.body ]

  %arrayidx = getelementptr inbounds [400 x i16], [400 x i16]* @Y, i16 0, i16 %i
  store i16 0, i16* %arrayidx, align 1
  %inc = add nuw nsw i16 %i, 1
  %cmp = icmp ult i16 %inc, 400
  br i1 %cmp, label %for.body, label %for.end

for.end:                                          ; preds = %for.body
  %inc.lcssa = phi i16 [ %inc, %for.body ]
  ret i16 %inc.lcssa
}

We should be able to figure out that the result is constant, but the patch
breaks it.

Differential Revision: https://reviews.llvm.org/D51584

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346198 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LLVM-C] Fix Windows Build of Core
Robert Widmann [Tue, 6 Nov 2018 01:54:12 +0000 (01:54 +0000)]
[LLVM-C] Fix Windows Build of Core

strndup doesn't exist outside of GNU-land and modern macOSes.  Use
strdup instead as c_str() is guaranteed to be NUL-terminated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346197 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LLVM-C] Improve Intrinsics Bindings
Robert Widmann [Tue, 6 Nov 2018 01:38:14 +0000 (01:38 +0000)]
[LLVM-C] Improve Intrinsics Bindings

Summary:
Improve the intrinsic bindings with operations for

- Retrieving and automatically inserting the declaration of an intrinsic by ID
- Retrieving the name of a non-overloaded intrinsic by ID
- Retrieving the name of an overloaded intrinsic by ID and overloaded parameter types

Improve the echo test to copy non-overloaded intrinsics by ID.

Reviewers: whitequark, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D53626

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346195 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Autogenerate complete checks. NFC
Craig Topper [Tue, 6 Nov 2018 00:31:27 +0000 (00:31 +0000)]
[X86] Autogenerate complete checks. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346188 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[WebAssembly] Fixup `main` signature by default"
Sam Clegg [Tue, 6 Nov 2018 00:31:02 +0000 (00:31 +0000)]
Revert "[WebAssembly] Fixup `main` signature by default"

This reverts rL345880.  It caused some test failures on the
webassembly waterfall.  e.g. binaryen2.test_mainenv fails due
the fact that `envp` ends up being undef rather than 0.

Differential Revision: https://reviews.llvm.org/D54117

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346187 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoSpecify REQUIRES: default_triple in two debuginfo tests
Justin Bogner [Tue, 6 Nov 2018 00:16:32 +0000 (00:16 +0000)]
Specify REQUIRES: default_triple in two debuginfo tests

These were failing when specifying LLVM_DEFAULT_TARGET_TRIPLE=''

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346185 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTargetMachine: Move lib/CodeGen specific callbacks to LLVMTargetMachine; NFC
Matthias Braun [Mon, 5 Nov 2018 23:49:15 +0000 (23:49 +0000)]
TargetMachine: Move lib/CodeGen specific callbacks to LLVMTargetMachine; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346184 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMachineFunction: Store more specific reference to LLVMTargetMachine; NFC
Matthias Braun [Mon, 5 Nov 2018 23:49:14 +0000 (23:49 +0000)]
MachineFunction: Store more specific reference to LLVMTargetMachine; NFC

MachineFunction can only be used in code using lib/CodeGen, hence we
can keep a more specific reference to LLVMTargetMachine rather than just
TargetMachine around.

Do the same for references in ScheduleDAG and RegUsageInfoCollector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346183 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMachineModuleInfo: Store more specific reference to LLVMTargetMachine; NFC
Matthias Braun [Mon, 5 Nov 2018 23:49:13 +0000 (23:49 +0000)]
MachineModuleInfo: Store more specific reference to LLVMTargetMachine; NFC

MachineModuleInfo can only be used in code using lib/CodeGen, hence we
can keep a more specific reference to LLVMTargetMachine rather than just
TargetMachine around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346182 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DWARF] Support types CU list in .gdb_index dumping
Fangrui Song [Mon, 5 Nov 2018 23:27:53 +0000 (23:27 +0000)]
[DWARF] Support types CU list in .gdb_index dumping

Some executables have non-empty types CU list and -gdb-index would report "<error reporting>" before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346181 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[TargetLowering] Change TargetLoweringBase::getPreferredVectorAction to take an MVT...
Craig Topper [Mon, 5 Nov 2018 23:26:13 +0000 (23:26 +0000)]
[TargetLowering] Change TargetLoweringBase::getPreferredVectorAction to take an MVT instead of an EVT. NFC

The main caller of this already has an MVT and several targets called getSimpleVT inside without checking isSimple. This makes the simpleness explicit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346180 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Add sram-ecc feature
Konstantin Zhuravlyov [Mon, 5 Nov 2018 22:44:19 +0000 (22:44 +0000)]
AMDGPU: Add sram-ecc feature

Differential Revision: https://reviews.llvm.org/D53222

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346177 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[GlobalISel] Refactor the artifact combiner a bit by using MIPatternMatch"
Volkan Keles [Mon, 5 Nov 2018 22:25:01 +0000 (22:25 +0000)]
Revert "[GlobalISel] Refactor the artifact combiner a bit by using MIPatternMatch"

This reverts r346166 as it breaks
test-suite-verify-machineinstrs-aarch64-globalisel-O0-g.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346175 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Don't turn any_extend from a mask register into a sign_extend during lowering...
Craig Topper [Mon, 5 Nov 2018 22:08:17 +0000 (22:08 +0000)]
[X86] Don't turn any_extend from a mask register into a sign_extend during lowering. Add patterns to match any_extend during isel instead.

SimplifyDemandedBits can turn a sign_extend back into an any_extend and trigger an infinite loop. So instead legalize it the same way as a sign_extend, but preserve the opcode. Then just pattern match it the same as sign_extend during isel.

I don't have a reduced test case for such an infinite loop yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346170 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstSimplify] fold select (fcmp X, Y), X, Y
Sanjay Patel [Mon, 5 Nov 2018 21:51:39 +0000 (21:51 +0000)]
[InstSimplify] fold select (fcmp X, Y), X, Y

This is NFCI for InstCombine because it calls InstSimplify,
so I left the tests for this transform there. As noted in
the code comment, we can allow this fold more often by using
FMF and/or value tracking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346169 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstSimplify] add tests for select+fcmp; NFC
Sanjay Patel [Mon, 5 Nov 2018 21:42:01 +0000 (21:42 +0000)]
[InstSimplify] add tests for select+fcmp; NFC

These are translated from InstCombine's test file with the same name.
We should move the transform from InstCombine to InstSimplify.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346168 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GlobalISel] Refactor the artifact combiner a bit by using MIPatternMatch
Volkan Keles [Mon, 5 Nov 2018 20:51:13 +0000 (20:51 +0000)]
[GlobalISel] Refactor the artifact combiner a bit by using MIPatternMatch

Reviewers: aditya_nandakumar

Reviewed By: aditya_nandakumar

Subscribers: rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D54116

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346166 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Regenerate test checks in preparation for a patch. NFC
Craig Topper [Mon, 5 Nov 2018 19:45:37 +0000 (19:45 +0000)]
[X86] Regenerate test checks in preparation for a patch. NFC

I'm preparing a patch to avoid creating critical edges in cmov expansion. Updating these tests to make the changes by the next patch easier to see.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346161 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[COFF][LLD] Add link support for Microsoft precompiled headers OBJs
Alexandre Ganea [Mon, 5 Nov 2018 19:20:47 +0000 (19:20 +0000)]
[COFF][LLD] Add link support for Microsoft precompiled headers OBJs

This change allows for link-time merging of debugging information from
Microsoft precompiled types OBJs compiled with cl.exe /Z7 /Yc and /Yu.

This fixes llvm.org/PR34278

Differential Revision: https://reviews.llvm.org/D45213

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346154 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoOnly call FlushFileBuffers() when writing executables on Windows
Alexandre Ganea [Mon, 5 Nov 2018 19:14:10 +0000 (19:14 +0000)]
Only call FlushFileBuffers() when writing executables on Windows

This is a follow-up for "r325274: Call FlushFileBuffers on output files."

Previously, FlushFileBuffers() was called in all cases when writing a file. The objective was to go around a bug in the Windows kernel (as described here: https://randomascii.wordpress.com/2018/02/25/compiler-bug-linker-bug-windows-kernel-bug/). However that is required only when writing EXEs, any other file type doesn't need flushing.

This patch calls FlushFileBuffers() only for EXEs. In addition, we completly disable FlushFileBuffers() for known Windows 10 versions that do not exhibit the original kernel bug.

Differential Revision: https://reviews.llvm.org/D53727

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346152 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MergeICmps] Do not perform the transformation if GEP is used outside of block
Taewook Oh [Mon, 5 Nov 2018 18:16:32 +0000 (18:16 +0000)]
[MergeICmps] Do not perform the transformation if GEP is used outside of block

Summary:
This patch prevents MergeICmps to performn the transformation if the address operand GEP of the load instruction has a use outside of the load's parent block. Without this patch, compiler crashes with the given test case because the use of `%first.i` is still around when the basic block is erased from https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/Scalar/MergeICmps.cpp#L620. I think checking `isUsedOutsideOfBlock` with `GEP` is the original intention of the code, as the checking for `LoadI` is already performed in the same function.

This patch is incomplete though, as this makes the pass overly conservative and fails the test `tuple-four-int8.ll`. I believe what needs to be done is checking if GEP has a use outside of block that is not the part of "Comparisons" chain. Submit the patch as of now to prevent compiler crash.

Reviewers: courbet, trentxintong

Reviewed By: courbet

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D54089

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346151 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add/adjust tests for fcmp+select substitution; NFC
Sanjay Patel [Mon, 5 Nov 2018 18:09:10 +0000 (18:09 +0000)]
[InstCombine] add/adjust tests for fcmp+select substitution; NFC

There was no coverage for at least 2 out of the 4 patterns because
of fcmp canonicalization. The tests and code should be moved to
InstSimplify in a follow-up because this doesn't create any new values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346150 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Power9] Add support for stxvw4x.be and stxvd2x.be intrinsics
Zaara Syeda [Mon, 5 Nov 2018 17:31:26 +0000 (17:31 +0000)]
[Power9] Add support for stxvw4x.be and stxvd2x.be intrinsics

On Power9, we don't have patterns to select the following intrinsics:
llvm.ppc.vsx.stxvw4x.be
llvm.ppc.vsx.stxvd2x.be

This patch adds support for these.

Differential Revision: https://reviews.llvm.org/D53581

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346148 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] canonicalize -0.0 to +0.0 in fcmp
Sanjay Patel [Mon, 5 Nov 2018 17:26:42 +0000 (17:26 +0000)]
[InstCombine] canonicalize -0.0 to +0.0 in fcmp

As stated in IEEE-754 and discussed in:
https://bugs.llvm.org/show_bug.cgi?id=38086
...the sign of zero does not affect any FP compare predicate.

Known regressions were fixed with:
rL346097 (D54001)
rL346143

The transform will help reduce pattern-matching complexity to solve:
https://bugs.llvm.org/show_bug.cgi?id=39475
...as well as improve CSE and codegen (a zero constant is almost always
easier to produce than 0x80..00).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346147 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] loosen FP 0.0 constraint for fcmp+select substitution
Sanjay Patel [Mon, 5 Nov 2018 16:50:44 +0000 (16:50 +0000)]
[InstCombine] loosen FP 0.0 constraint for fcmp+select substitution

It looks like we correctly removed edge cases with 0.0 from D50714,
but we were a bit conservative because getBinOpIdentity() doesn't
distinguish between +0.0 and -0.0 and 'nsz' is effectively always
true for fcmp (see discussion in:
https://bugs.llvm.org/show_bug.cgi?id=38086

Without this change, we would get regressions by canonicalizing
to +0.0 in all fcmp, and that's a step towards solving:
https://bugs.llvm.org/show_bug.cgi?id=39475

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346143 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] adjust tests for select with FP identity op; NFC
Sanjay Patel [Mon, 5 Nov 2018 16:27:03 +0000 (16:27 +0000)]
[InstCombine] adjust tests for select with FP identity op; NFC

These are mislabeled as negative tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346142 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[FPEnv] Add constrained CEIL/FLOOR/ROUND/TRUNC intrinsics
Cameron McInally [Mon, 5 Nov 2018 15:59:49 +0000 (15:59 +0000)]
[FPEnv] Add constrained CEIL/FLOOR/ROUND/TRUNC intrinsics

Differential Revision: https://reviews.llvm.org/D53411

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346141 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ThinLTO] Add an option to disable (thin)lto internalization.
Xin Tong [Mon, 5 Nov 2018 15:49:46 +0000 (15:49 +0000)]
[ThinLTO] Add an option to disable (thin)lto internalization.

Summary:
LTO and ThinLTO optimizes the IR differently.

One source of differences is the amount of internalizations that
can happen.

Add an option to enable/disable internalization so that other
differences can be studied in isolation. e.g. inlining.

There are other things lto and thinlto do differently, I will add
flags to enable/disable them as needed.

Reviewers: tejohnson, pcc, steven_wu

Subscribers: mehdi_amini, inglorion, steven_wu, dexonsmith, dang, llvm-commits

Differential Revision: https://reviews.llvm.org/D53294

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346140 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[TargetLowering] Begin generalizing TargetLowering::expandFP_TO_SINT support. NFCI.
Simon Pilgrim [Mon, 5 Nov 2018 15:49:09 +0000 (15:49 +0000)]
[TargetLowering] Begin generalizing TargetLowering::expandFP_TO_SINT support. NFCI.

Prior to initial work to add vector expansion support, remove assumptions that we're working on scalar types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346139 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add/adjust tests for select with fsub identity op; NFC
Sanjay Patel [Mon, 5 Nov 2018 15:45:01 +0000 (15:45 +0000)]
[InstCombine] add/adjust tests for select with fsub identity op; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346138 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFCI][FPEnv] Split constrained intrinsic tests
Cameron McInally [Mon, 5 Nov 2018 15:28:10 +0000 (15:28 +0000)]
[NFCI][FPEnv] Split constrained intrinsic tests

The constrained intrinsic tests have grown in number. Split off
the FMA tests into their own file to reduce double coverage.

Differential Revision: https://reviews.llvm.org/D53932

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346137 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add tests for select with FP identity op; NFC
Sanjay Patel [Mon, 5 Nov 2018 15:08:36 +0000 (15:08 +0000)]
[InstCombine] add tests for select with FP identity op; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346136 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Inliner] Penalise inlining of calls with loops at Oz
David Green [Mon, 5 Nov 2018 14:54:34 +0000 (14:54 +0000)]
[Inliner] Penalise inlining of calls with loops at Oz

We currently seem to underestimate the size of functions with loops in them,
both in terms of absolute code size and in the difficulties of dealing with
such code. (Calls, for example, can be tail merged to further reduce
codesize). At -Oz, we can then increase code size by inlining small loops
multiple times.

This attempts to penalise functions with loops at -Oz by adding a CallPenalty
for each top level loop in the function. It uses LI (and hence DT) to calculate
the number of loops. As we are dealing with minsize, the inline threshold is
small and functions at this point should be relatively small, making the
construction of these cheap.

Differential Revision: https://reviews.llvm.org/D52716

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346134 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Mips] Supplement long branch pseudo instructions
Stefan Maksimovic [Mon, 5 Nov 2018 14:37:41 +0000 (14:37 +0000)]
[Mips] Supplement long branch pseudo instructions

Expand on LONG_BRANCH_LUi and LONG_BRANCH_(D)ADDiu pseudo
instructions by creating variants which support
less operands/accept GPR64Opnds as their operand in order
to appease the machine verifier pass.

Differential Revision: https://reviews.llvm.org/D53977

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346133 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][ARM] Adding extra test for ARM CGP
Sam Parker [Mon, 5 Nov 2018 14:17:27 +0000 (14:17 +0000)]
[NFC][ARM] Adding extra test for ARM CGP

Added a reproducer that I received a while ago.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346132 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] Fix the new atomic optimizer in pixel shaders.
Neil Henning [Mon, 5 Nov 2018 12:04:48 +0000 (12:04 +0000)]
[AMDGPU] Fix the new atomic optimizer in pixel shaders.

The new atomic optimizer I previously added in D51969 did not work
correctly when a pixel shader was using derivatives, and had helper
lanes active.

To fix this we add an llvm.amdgcn.ps.live call that guards a branch
around the entire atomic operation - ensuring that all helper lanes are
inactive within the wavefront when we compute our atomic results.

I've added a test case that can cause derivatives, and exposes the
problem.

Differential Revision: https://reviews.llvm.org/D53930

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346128 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CMake] Expose opt-remark tooling through libOptRemarks.dylib
Francis Visoiu Mistrih [Mon, 5 Nov 2018 11:57:44 +0000 (11:57 +0000)]
[CMake] Expose opt-remark tooling through libOptRemarks.dylib

* Create an install target for it
* Add it under tools/opt-remarks
* Add an export file for the dylib
* Install the llvm-c/OptRemarks.h header
* Add an API to query its version

rdar://45458839

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346127 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Turn assert into condition in ARMCGP
Sam Parker [Mon, 5 Nov 2018 11:26:04 +0000 (11:26 +0000)]
[ARM] Turn assert into condition in ARMCGP

Turn the assert in PrepareConstants into a conditon so that we can
handle mul instructions with negative immediates.

Differential Revision: https://reviews.llvm.org/D54094

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346126 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM][ARMCGP] Remove unecessary zexts and truncs
Sam Parker [Mon, 5 Nov 2018 10:58:37 +0000 (10:58 +0000)]
[ARM][ARMCGP] Remove unecessary zexts and truncs

r345840 slightly changed the way promotion happens which could
result in zext and truncs having the same source and destination
types. This fixes that issue.

We can now also remove the zext and trunc in the following case:
(zext (trunc (promoted op)), i32)

This means that we can no longer treat a value, that is only used by
a sink, to be safe to promote.

I've also added in some extra asserts and replaced a cast for a
dyn_cast.

Differential Revision: https://reviews.llvm.org/D54032

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346125 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoExclude wasm target from Windows packaging due to PR39448
Hans Wennborg [Mon, 5 Nov 2018 09:31:43 +0000 (09:31 +0000)]
Exclude wasm target from Windows packaging due to PR39448

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346122 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][x86][AArch64] extract-bits.ll: add test with 'ashr'.
Roman Lebedev [Mon, 5 Nov 2018 09:20:08 +0000 (09:20 +0000)]
[NFC][x86][AArch64] extract-bits.ll: add test with 'ashr'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346121 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombiner] Use tryFoldToZero to simplify some code and make it work correctly...
Craig Topper [Mon, 5 Nov 2018 05:53:06 +0000 (05:53 +0000)]
[DAGCombiner] Use tryFoldToZero to simplify some code and make it work correctly between LegalTypes and LegalOperations.

The original code avoided creating a zero vector after type legalization, but if we're after type legalization the type we have is legal. The real hazard we need to avoid is creating a build vector after op legalization. tryFoldToZero takes care of checking for this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346119 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombiner] Remove an unused argument from tryFoldToZero. NFC
Craig Topper [Mon, 5 Nov 2018 05:53:03 +0000 (05:53 +0000)]
[DAGCombiner] Remove an unused argument from tryFoldToZero. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346118 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AVR] Fix a backend bug that left extraneous operands after expansion
Dylan McKay [Mon, 5 Nov 2018 05:49:04 +0000 (05:49 +0000)]
[AVR] Fix a backend bug that left extraneous operands after expansion

This patch fixes a bug in the AVR FRMIDX expansion logic.

The expansion would leave a leftover operand from the original FRMIDX,
but now attached to a MOVWRdRr instruction. The MOVWRdRr instruction
did not expect this operand and so LLVM rejected the machine
instruction.

This would trigger an assertion:

    Assertion failed: ((isImpReg || Op.isRegMask() || MCID->isVariadic() ||
                        OpNo < MCID->getNumOperands() || isMetaDataOp) &&
                        "Trying to add an operand to a machine instr that is already done!"),
    function addOperand, file llvm/lib/CodeGen/MachineInstr.cpp

Tim fixed this so that now the FRMIDX is expanded correctly into
a well-formed MOVWRdRr.

Patch by Tim Neumann

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346117 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Custom type legalize v2i8/v2i16/v2i32 mul to use to pmuludq.
Craig Topper [Mon, 5 Nov 2018 05:02:12 +0000 (05:02 +0000)]
[X86] Custom type legalize v2i8/v2i16/v2i32 mul to use to pmuludq.

v2i8/v2i16/v2i32 are promoted to v2i64. pmuludq takes a v2i64 input and produces a v2i64 output. Since we don't about the upper bits of the type legalized multiply we can use the pmuludq to produce the multiply result for the bits we do care about.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346115 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AVR] Disallow the LDDWRdPtrQ instruction with Z as the destination
Dylan McKay [Mon, 5 Nov 2018 05:00:44 +0000 (05:00 +0000)]
[AVR] Disallow the LDDWRdPtrQ instruction with Z as the destination

This is an AVR-specific workaround for a limitation of the register
allocator that only exposes itself on targets with high register
contention like AVR, which only has three pointer registers.

The three pointer registers are X, Y, and Z.
In most nontrivial functions, Y is reserved for the frame pointer,
as per the calling convention. This leaves X and Z. Some instructions,
such as LPM ("load program memory"), are only defined for the Z
register. Sometimes this just leaves X.

When the backend generates a LDDWRdPtrQ instruction with Z as the
destination pointer, it usually trips up the register allocator
with this error message:

  LLVM ERROR: ran out of registers during register allocation

This patch is a hacky workaround. We ban the LDDWRdPtrQ instruction
from ever using the Z register as an operand. This gives the
register allocator a bit more space to allocate, fixing the
regalloc exhaustion error.

Here is a description from the patch author Peter Nimmervoll

  As far as I understand the problem occurs when LDDWRdPtrQ uses
  the ptrdispregs register class as target register. This should work, but
  the allocator can't deal with this for some reason. So from my testing,
  it seams like (and I might be totally wrong on this) the allocator reserves
  the Z register for the ICALL instruction and then the register class
  ptrdispregs only has 1 register left and we can't use Y for source and
  destination. Removing the Z register from DREGS fixes the problem but
  removing Y register does not.

More information about the bug can be found on the avr-rust issue
tracker at https://github.com/avr-rust/rust/issues/37.

A bug has raised to track the removal of this workaround and a proper
fix; PR39553 at https://bugs.llvm.org/show_bug.cgi?id=39553.

Patch by Peter Nimmervoll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346114 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Fix typo in test comment. NFC
Craig Topper [Mon, 5 Nov 2018 01:21:52 +0000 (01:21 +0000)]
[X86] Fix typo in test comment. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346110 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[HotColdSplitting] Use TTI to inform outlining threshold
Vedant Kumar [Sun, 4 Nov 2018 23:11:57 +0000 (23:11 +0000)]
[HotColdSplitting] Use TTI to inform outlining threshold

Using TargetTransformInfo allows the splitting pass to factor in the
code size cost of instructions as it decides whether or not outlining is
profitable.

This did not regress the overall amount of outlining seen on the handful
of internal frameworks I tested.

Thanks to Jun Bum Lim for suggesting this!

Differential Revision: https://reviews.llvm.org/D53835

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346108 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Add nounwind to some tests to remove cfi directives from checks. NFC
Craig Topper [Sun, 4 Nov 2018 21:37:45 +0000 (21:37 +0000)]
[X86] Add nounwind to some tests to remove cfi directives from checks. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346106 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Regenerate test checks to merge 32 and 64 bit. Remove stale check prefixes...
Craig Topper [Sun, 4 Nov 2018 21:37:43 +0000 (21:37 +0000)]
[X86] Regenerate test checks to merge 32 and 64 bit. Remove stale check prefixes. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346105 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Add vector shift by immediate to SimplifyDemandedBitsForTargetNode.
Craig Topper [Sun, 4 Nov 2018 17:31:27 +0000 (17:31 +0000)]
[X86] Add vector shift by immediate to SimplifyDemandedBitsForTargetNode.

Summary: This also enables some constant folding from KnownBits propagation. This helps on some cases vXi64 case in 32-bit mode where constant vectors appear as vXi32 and a bitcast. This can prevent getNode from constant folding sra/shl/srl.

Reviewers: RKSimon, spatel

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D54069

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346102 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ValueTracking] determine sign of 0.0 from select when matching min/max FP
Sanjay Patel [Sun, 4 Nov 2018 14:28:48 +0000 (14:28 +0000)]
[ValueTracking] determine sign of 0.0 from select when matching min/max FP

In PR39475:
https://bugs.llvm.org/show_bug.cgi?id=39475
..we may fail to recognize/simplify fabs() in some cases because we do not
canonicalize fcmp with a -0.0 operand.

Adding that canonicalization can cause regressions on min/max FP tests, so
that's this patch: for the purpose of determining whether something is min/max,
let the value returned by the select determine how we treat a 0.0 operand in the fcmp.

This patch doesn't actually change the -0.0 to +0.0. It just changes the analysis, so
we don't fail to recognize equivalent min/max patterns that only differ in the
signbit of 0.0.

Differential Revision: https://reviews.llvm.org/D54001

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346097 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombiner] Remove 'else' after return. NFC
Craig Topper [Sun, 4 Nov 2018 06:56:32 +0000 (06:56 +0000)]
[DAGCombiner] Remove 'else' after return. NFC

This makes this code consistent with the nearly identical code in visitZERO_EXTEND.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346090 91177308-0d34-0410-b5e6-96231b3b80d8