OSDN Git Service
Alyssa Rosenzweig [Mon, 1 Jul 2019 22:28:37 +0000 (15:28 -0700)]
panfrost/midgard: Use nir_dest_num_components
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 1 Jul 2019 22:26:22 +0000 (15:26 -0700)]
panfrost/midgard: Implement integer downsize ops
Oh, dear. No turning back now.
We begin implementing non-32-bit types, using downsizing integer type
conversions as the initial instructions. We implement them naively as
type-converting moves; substantially more efficient operation is
possible by copypropping the type conversion modifier, but this
optimization is not implemented here.
Size converting modifiers on Midgard allow an instruction to write to a
destination 1/2 the size, or to read from a source 1/2 the size. If we
need an extreme conversion (32-bit to 8-bit, for instance), multiple
type converting ops are chained together, which here is handled via an
algebraic pass.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 1 Jul 2019 21:46:43 +0000 (14:46 -0700)]
panfrost/midgard: Move scale from MIR to NIR
This begins the process of removing blend shader specific MIR into a
more general NIR lowering pass for formats.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 1 Jul 2019 20:26:07 +0000 (13:26 -0700)]
panfrost/midgard: Passthrough nir_lower_framebuffer
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 1 Jul 2019 18:49:06 +0000 (11:49 -0700)]
panfrost: Extend clear colour packing
Eventually, this will allow packing clear colours for all formats,
including floating-point framebuffers, pure integer buffers, and special
formats. Currently, a few of these formats are supported, and many more
are handled through a generic Gallium colour packing path (which is not
a perfect fit for the hardware, but works for many formats and is a sane
default for the moment.)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 1 Jul 2019 16:44:40 +0000 (09:44 -0700)]
panfrost/mfbd: Include codes for float framebuffers
We see the hardware doesn't actually support float framebuffers in the
native sense -- rather, it just allows higher bpp framebuffers and lets
a blend shader / additional clear_color fields sort out the formats.
This will be.. interesting.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 1 Jul 2019 16:09:03 +0000 (09:09 -0700)]
panfrost: Prepare some code for MRT
Full MRT support is a while away, but in the mean time, we can remove
code that explicitly assumes nr_cbufs <= 0, to minimize the obstacles
we'll face later when we add the whole thing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 5 Jul 2019 15:25:56 +0000 (08:25 -0700)]
panfrost: Use standard ALIGN_POT/INFINITY macros
We had vendored duplicates from pre-Mesa days; clean that up.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Eric Engestrom [Thu, 11 Oct 2018 17:38:52 +0000 (18:38 +0100)]
egl: add glvnd symbols check
According to the spec [1], `__egl_Main` is the only symbol that needs to
be exported. We don't want applications directly linking against
libEGL_mesa.so (apps should always go through libEGL.so, regardless of
who is providing it), so we shouldn't export any other symbols either.
[1] https://github.com/NVIDIA/libglvnd/blob/master/include/glvnd/libeglabi.h
(this header is the closest there is to a spec)
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Thu, 22 Nov 2018 18:44:29 +0000 (18:44 +0000)]
egl: rewrite entrypoints check
Part of the effort to replace shell scripts with portable python scripts.
I could've used a trivial `assert lines == sorted(lines)`, but this way
the caller is shown which entrypoint is out of order.
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Thu, 22 Nov 2018 19:16:00 +0000 (19:16 +0000)]
mapi: add shared glapi symbols check
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Fri, 29 Mar 2019 17:15:45 +0000 (17:15 +0000)]
tu: add exported symbols check
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Thu, 11 Oct 2018 14:01:46 +0000 (15:01 +0100)]
vulkan: add symbols file
According to the Vulkan ICD spec [1], these two symbols must be exposed:
- vk_icdGetInstanceProcAddr
- vk_icdNegotiateLoaderICDInterfaceVersion
and this one is optional:
- vk_icdGetPhysicalDeviceProcAddr
[1] https://github.com/KhronosGroup/Vulkan-Loader/blob/master/loader/LoaderAndLayerInterface.md
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Thu, 11 Oct 2018 17:36:36 +0000 (18:36 +0100)]
meson: remove unused env_test
No longer used as of last commit :)
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Thu, 11 Oct 2018 13:46:34 +0000 (14:46 +0100)]
gles: use new symbols check script
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Tue, 11 Jun 2019 18:00:33 +0000 (19:00 +0100)]
gbm: sort symbols
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Eric Engestrom [Thu, 11 Oct 2018 13:43:35 +0000 (14:43 +0100)]
gbm: use new symbols check script
Note: the list in gbm-symbols.txt is the same as the one that was in
gbm-symbols-check, I just took the opportunity to sort it.
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Thu, 11 Oct 2018 13:40:28 +0000 (14:40 +0100)]
egl: use new symbols check script
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Thu, 11 Oct 2018 12:08:42 +0000 (13:08 +0100)]
symbols-check: introduce new python script
I've re-written this in bash a couple times over the years, and then
I realised python is much more portable and already required by Mesa, so
we might as well make use of it.
I decided to still use the build system's NM instead of re-implementing
symbols extraction, to offload the complexity of keeping it compatible
with many systems (Linux, Unix, BSD, MacOS, etc.), especially when
cross-building.
This new script checks not only that nothing is exported when it
shouldn't be, but also that everything that should be exported is.
Sometimes, some symbols _can_ be exported but don't have to be, in which
case they can be prefixed with `(optional)`.
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Karol Herbst [Thu, 22 Feb 2018 10:58:44 +0000 (11:58 +0100)]
nv50/ir/nir: implement load/store_global
required by OpenCL
v2: fix setting globalAccess
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
Karol Herbst [Thu, 31 Jan 2019 11:33:03 +0000 (12:33 +0100)]
nv50/ir/nir: handle kernel inputs
required by OpenCL
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
Karol Herbst [Fri, 8 Mar 2019 13:12:00 +0000 (14:12 +0100)]
nv50/ir/nir: don't assert on !main
required for OpenCL
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
Karol Herbst [Thu, 31 Jan 2019 11:24:44 +0000 (12:24 +0100)]
nv50/ir/nir: parse system values first and stop for compute shaders
required by OpenCL
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
Connor Abbott [Wed, 10 Jul 2019 09:55:24 +0000 (11:55 +0200)]
nir/lower_io: Don't use variable to get deref mode
Drivers only use lower_io for modes where pointers don't have a
meaningful value, and dereferences can always be traced back to a
variable. But there can be other modes, like global mode with
VK_EXT_buffer_device_address, where pointers cannot be traced back to a
variable, and lower_io would segfault on loads/stores of these since
nir_deref_instr_get_variable() would return NULL.
Just use the mode on the deref itself to filter out these modes before
we try to get the variable.
Fixes:
118a66df990 ("radv: Use NIR barycentric coordinates")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Connor Abbott [Tue, 9 Jul 2019 11:43:13 +0000 (13:43 +0200)]
radv: Don't optimize after lowering FS inputs
Currently this is done rather late in radv, after lowering booleans, so
it isn't safe to run additional optimizations that may add e.g. 1-bit
booleans. We could move the lowering parts earlier, but since right now
we only lower FS inputs and by this point all indirects have been
lowered away, there's no reason we should need to optimize anything.
One shader from Devil May Cry 5 was getting optimized, but only because
the optimization loop was working on 32-bit booleans which revealed an
opportunity that was hidden with 1-bit booleans, and we generated a
1-bit boolean which is invalid.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111092
Fixes:
118a66df9907772bb9e5503b736c95d7bb62d52c
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Mauro Rossi [Sat, 6 Jul 2019 19:16:04 +0000 (21:16 +0200)]
android: amd/addrlib: add gfx10 support
Fix the following building error:
external/mesa/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp:35:10:
fatal error: 'gfx10_gb_reg.h' file not found
^~~~~~~~~~~~~~~~
1 error generated.
Fixes:
78cdf9a ("amd/addrlib: add gfx10 support")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Mauro Rossi [Sat, 6 Jul 2019 18:21:31 +0000 (20:21 +0200)]
android: amd/common/gfx10: add register JSON
The necessary Android makefile building rules are added
and the generation rules are simplified for readability
Fixes the following building errors:
external/mesa/src/amd/common/ac_llvm_build.c:1496:45:
error: use of undeclared identifier 'V_008F0C_IMG_FORMAT_8_UINT'
case V_008F0C_BUF_DATA_FORMAT_8: format = V_008F0C_IMG_FORMAT_8_UINT; break;
^
Fixes:
74a26af ("amd/common/gfx10: add register JSON")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Mauro Rossi [Sat, 6 Jul 2019 19:27:21 +0000 (21:27 +0200)]
android: radeonsi/gfx10: generate gfx10_format_table.h (v2)
Fix Android building rules for gfx10_format_table.h generated header
(v2) Add LOCAL_C_INCLUDES += $(intermediates)/radeonsi to fix error:
external/mesa/src/gallium/drivers/radeonsi/si_state.c:46:10:
fatal error: 'gfx10_format_table.h' file not found
^~~~~~~~~~~~~~~~~~~~~~
1 error generated.
Fixes:
0ffa229 ("radeonsi/gfx10: generate gfx10_format_table.h")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Chih-Wei Huang [Mon, 8 Jul 2019 02:16:18 +0000 (10:16 +0800)]
android: virgl: remove unnecessary LOCAL_C_INCLUDES
The path could be imported automatically.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Mauro Rossi <issor.oruam@gmail.com>
Chih-Wei Huang [Fri, 5 Jul 2019 08:35:19 +0000 (16:35 +0800)]
android: vulkan/util: fix generating vk_enum_to_str.*
The gen_enum_to_str.py generates vk_enum_to_str.c and its header at once.
However, the makefiles incorrectly list both files parallel with the same
recipes. That means both two files may be generated simultaneously by two
processes. The generating files may be truncated by another process, as
shown below:
$ cd $OUT/obj/STATIC_LIBRARIES/libmesa_vulkan_util_intermediates/util
$ ls -l
-rw-rw-r-- 1 lh lh 193713 Jul 5 13:31 vk_enum_to_str.c
-rw-rw-r-- 1 lh lh 4609 Jul 5 13:31 vk_enum_to_str.d
-rw-rw-r-- 1 lh lh 0 Jul 5 16:21 vk_enum_to_str.h
Let one file depends on the other with empty recipe to avoid the issue.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Chih-Wei Huang [Tue, 25 Jun 2019 09:11:12 +0000 (17:11 +0800)]
android: radv: import include paths from used libraries
It's unnecessary to manually add these include paths since they could
be imported automatically.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Chih-Wei Huang [Thu, 20 Jun 2019 10:14:35 +0000 (18:14 +0800)]
android: anv: import include path of libmesa_nir
Add libmesa_nir to a common LOCAL_STATIC_LIBRARIES defined by
ANV_STATIC_LIBRARIES so that its include path can be imported
automatically. Then ANV_INCLUDES is unnecessary and could be
eliminated.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Chih-Wei Huang [Thu, 20 Jun 2019 10:13:36 +0000 (18:13 +0800)]
android: anv: eliminate libmesa_anv_entrypoints
The dummy library libmesa_anv_entrypoints is totally unnecessary.
The four VULKAN_GENERATED_FILES could be generated and built in
libmesa_vulkan_common directly. The libraries using the generated
headers should get it via the exported include path.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Chih-Wei Huang [Thu, 20 Jun 2019 07:51:44 +0000 (15:51 +0800)]
android: vulkan/util: fix export path
Export the correct include path so that the libraries use it can
get it automatically.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Chih-Wei Huang [Thu, 20 Jun 2019 07:46:22 +0000 (15:46 +0800)]
android: radv: fix improper use of LOCAL_WHOLE_STATIC_LIBRARIES
The libmesa_git_sha1 is a dummy library. There is no reason to put
it into LOCAL_WHOLE_STATIC_LIBRARIES.
Move libmesa_vulkan_util to the vulkan.radv which really needs it.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Chih-Wei Huang [Thu, 20 Jun 2019 07:45:03 +0000 (15:45 +0800)]
android: anv: fix improper use of LOCAL_WHOLE_STATIC_LIBRARIES
The libmesa_anv_entrypoints and libmesa_genxml are dummy libraries.
There is no reason to put them into LOCAL_WHOLE_STATIC_LIBRARIES.
Move libmesa_vulkan_util to the vulkan HAL which really needs it.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Chih-Wei Huang [Wed, 19 Jun 2019 08:48:52 +0000 (16:48 +0800)]
android: radv: remove unused LOCAL_EXPORT_C_INCLUDE_DIRS
The vulkan module is the final HAL. No need to export its headers
since none will import it.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Chih-Wei Huang [Wed, 19 Jun 2019 08:16:27 +0000 (16:16 +0800)]
android: anv: remove unused LOCAL_EXPORT_C_INCLUDE_DIRS
The vulkan module is the final HAL. No need to export its headers
since none will import it.
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Jason Ekstrand [Tue, 25 Jun 2019 01:27:26 +0000 (20:27 -0500)]
nir/loop_analyze: Pass nir_const_values directly to helpers
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Jason Ekstrand [Fri, 21 Jun 2019 14:18:16 +0000 (09:18 -0500)]
nir/loop_analyze: Properly handle swizzles in loop conditions
This commit re-plumbs all of nir_loop_analyze to use nir_ssa_scalar for
all intermediate values so that we can properly handle swizzles. Even
though if conditions are required to be scalars, they may still consume
swizzles so you could have ((a.yzw < b.zzx).xz && c.xx).y == 0 as your
loop termination condition. The old code would just bail the moment it
saw its first non-zero swizzle but we can now properly chase the scalar
from the if condition to all the way to a, b, and c.
Shader-db results on Kaby Lake:
total loops in shared programs: 4388 -> 4364 (-0.55%)
loops in affected programs: 29 -> 5 (-82.76%)
helped: 29
HURT: 5
Shader-db results on Haswell:
total loops in shared programs: 4370 -> 4373 (0.07%)
loops in affected programs: 2 -> 5 (150.00%)
helped: 2
HURT: 5
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Jason Ekstrand [Mon, 24 Jun 2019 22:33:02 +0000 (17:33 -0500)]
nir/loop_analyze: Refactor detection of limit vars
This commit reworks both get_induction_and_limit_vars() and
try_find_trip_count_vars_in_iand to return true on success and not
modify their output parameters on failure. This makes their callers
significantly simpler.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Jason Ekstrand [Thu, 20 Jun 2019 16:12:54 +0000 (11:12 -0500)]
nir: Add some helpers for chasing SSA values properly
There are various cases in which we want to chase SSA values through ALU
ops ranging from hand-written optimizations to back-end translation
code. In all these cases, it can be very tricky to do properly because
of swizzles. This set of helpers lets you easily work with a single
component of an SSA def and chase through ALU ops safely.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Jason Ekstrand [Mon, 24 Jun 2019 21:21:07 +0000 (16:21 -0500)]
nir/loop_analyze: Bail if we encounter swizzles
None of the current code knows what to do with swizzles. Take the safe
option for now and bail if we see one. This does have a small shader-db
impact but it is at least safe.
Shader-db results on Kaby Lake:
total loops in shared programs: 4364 -> 4388 (0.55%)
loops in affected programs: 5 -> 29 (480.00%)
helped: 5
HURT: 29
Shader-db results on Haswell:
total loops in shared programs: 4373 -> 4370 (-0.07%)
loops in affected programs: 5 -> 2 (-60.00%)
helped: 5
HURT: 2
Fixes:
6772a17acc8ee "nir: Add a loop analysis pass"
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Jason Ekstrand [Thu, 20 Jun 2019 21:29:30 +0000 (16:29 -0500)]
nir/loop_analyze: Use new eval_const_* helpers in test_iterations
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Jason Ekstrand [Thu, 20 Jun 2019 21:26:19 +0000 (16:26 -0500)]
nir/loop_analyze: Handle bit sizes correctly in calculate_iterations
The current code assumes everything is 32-bit which is very likely true
but not guaranteed by any means. Instead, use nir_eval_const_opcode to
do the calculations in a bit-size-agnostic way. We also use the new
constant constructors to build the correct size constants.
Fixes:
6772a17acc8ee "nir: Add a loop analysis pass"
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Jason Ekstrand [Thu, 20 Jun 2019 21:13:39 +0000 (16:13 -0500)]
nir/loop_analyze: Fix phi-of-identical-alu detection
One issue was that the original version didn't check that swizzles
matched when comparing ALU instructions so it could end up matching
very different instructions. Using the nir_instrs_equal function from
nir_instr_set.c which we use for CSE should be much more reliable.
Another was that the loop assumes it will only run two iterations which
may not be true. If there's something which guarantees that this case
only happens for phis after ifs, it wasn't documented.
Fixes:
9e6b39e1d521 "nir: detect more induction variables"
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Jason Ekstrand [Thu, 20 Jun 2019 18:47:30 +0000 (13:47 -0500)]
nir/instr_set: Expose nir_instrs_equal()
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Jason Ekstrand [Mon, 24 Jun 2019 23:23:29 +0000 (18:23 -0500)]
nir/builder: Use nir_const_value_for_* for constructing immediates
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Jason Ekstrand [Wed, 26 Jun 2019 01:33:46 +0000 (20:33 -0500)]
nir: Refactor nir_src_as_* constant functions
Now that we have the nir_const_value_as_* helpers, every one of these
functions is effectively the same except for the suffix they use so we
can easily define them with a repeated macro. This also means that
they're inline and the fact that the nir_src is being passed by-value
should no longer really hurt anything.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Jason Ekstrand [Thu, 20 Jun 2019 15:36:10 +0000 (10:36 -0500)]
nir: Add more helpers for working with const values
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Chia-I Wu [Mon, 8 Jul 2019 23:45:36 +0000 (16:45 -0700)]
virgl: remove virgl_transfer_queue_lists
COMPLETED_LIST is always empty. We only need one list.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Chia-I Wu [Mon, 8 Jul 2019 23:31:46 +0000 (16:31 -0700)]
virgl: simplify virgl_transfer_queue_extend
We can reuse virgl_transfer_queue_find_pending.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Chia-I Wu [Mon, 8 Jul 2019 21:35:27 +0000 (14:35 -0700)]
virgl: remove transfer after transfer_write
Now that virgl_transfer_queue_is_queued does not search
COMPLETED_LIST, we don't need to move transfers to that list.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Chia-I Wu [Mon, 8 Jul 2019 23:34:32 +0000 (16:34 -0700)]
virgl: improve virgl_transfer_queue_is_queued
Search only the pending list and return immediately on the first
hit.
When the transfer queue was introduced, the function was used to
deal with
write transfer -> draw -> write transfer
sequence. It was used to tell if the second transfer intersects
with the first transfer. If yes, the transfer queue avoided
reordering the second transfer to before the draw (by flushing) in
case the draw uses the transferred data.
With the recent changes to the transfer code, the function is used
to deal with
write transfer -> readback transfer
We want to avoid reordering the readback transfer to before the
first transfer (also by flushing).
In the old code, we needed to track the compeleted transfers as well
to avoid reordering. But in the new code, a readback transfer is
guaranteed to see the data from the completed transfers (in other
words, it cannot be reoderered to before the already completed
transfers). We don't need to search the COMPLETED_LIST.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Chia-I Wu [Mon, 8 Jul 2019 23:20:01 +0000 (16:20 -0700)]
virgl: fix transfers_intersect for mipmaps
We never use transfers_intersect with textures, but fix it anyway to
avoid confusion.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Chia-I Wu [Mon, 8 Jul 2019 23:12:29 +0000 (16:12 -0700)]
virgl: fix some false positives in transfers_overlap
Rewrite the function and check z/depth more carefully. We
intentionally avoid u_box_test_intersection_2d because it returns
true when two boxes touch but do not intersect and can be confusing.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Marek Olšák [Thu, 4 Jul 2019 02:24:36 +0000 (22:24 -0400)]
radeonsi/gfx10: enable primitive binning by default
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Wed, 3 Jul 2019 02:34:42 +0000 (22:34 -0400)]
radeonsi/gfx10: implement primitive binning
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 4 Jul 2019 02:27:12 +0000 (22:27 -0400)]
radeonsi: simplify primitive binning enablement
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 4 Jul 2019 02:23:18 +0000 (22:23 -0400)]
radeonsi: set primitive binning tunables for dGPUs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 4 Jul 2019 02:04:30 +0000 (22:04 -0400)]
radeonsi: set FLUSH_ON_BINNING_TRANSITION when needed
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 4 Jul 2019 01:57:43 +0000 (21:57 -0400)]
radeonsi/gfx10: use the new scan converter when binning is disabled
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Wed, 3 Jul 2019 02:31:14 +0000 (22:31 -0400)]
radeonsi/gfx9: fix an oversight in primitive binning code
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 4 Jul 2019 01:12:46 +0000 (21:12 -0400)]
radeonsi: use BREAK_BATCH instead of FLUSH_DFSM when CB_TARGET_MASK changes
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Wed, 3 Jul 2019 04:22:29 +0000 (00:22 -0400)]
radeonsi/gfx10: don't expose unimplemented PIPE_CAP_QUERY_SO_OVERFLOW
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 4 Jul 2019 02:56:58 +0000 (22:56 -0400)]
radeonsi/gfx10: launch 2 compute waves per CU before going onto the next CU
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 4 Jul 2019 03:01:25 +0000 (23:01 -0400)]
radeonsi/gfx10: set more registers and fields
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Wed, 3 Jul 2019 04:09:21 +0000 (00:09 -0400)]
radeonsi/gfx10: enable LATE_ALLOC_GS
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Wed, 3 Jul 2019 03:35:05 +0000 (23:35 -0400)]
radeonsi/gfx10: set HS/GS/CS.WGP_MODE
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Wed, 3 Jul 2019 02:48:49 +0000 (22:48 -0400)]
radeonsi/gfx10: set GE_PC_ALLOC
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Wed, 3 Jul 2019 01:40:49 +0000 (21:40 -0400)]
radeonsi/gfx10: enable 1D textures
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Sat, 29 Jun 2019 03:48:14 +0000 (23:48 -0400)]
radeonsi/gfx10: enable image stores with DCC
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Sat, 29 Jun 2019 00:31:41 +0000 (20:31 -0400)]
radeonsi/gfx10: no need to invalidate L2 for framebuffer -> texture coherency
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 27 Jun 2019 02:57:10 +0000 (22:57 -0400)]
radeonsi/gfx10: support pixel shaders without exports
It only works if there are not color and no Z exports.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 27 Jun 2019 03:13:00 +0000 (23:13 -0400)]
radeonsi/gfx10: enable vertex shaders without param space allocation
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 4 Jul 2019 01:55:07 +0000 (21:55 -0400)]
radeonsi: update DCC settings from PAL
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 4 Jul 2019 00:43:28 +0000 (20:43 -0400)]
radeonsi: reorder shader IO indices for better IO space usage for tess and GS
The highest used index determines the stride for shader outputs in shaders
that use LDS or memory for outputs.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Wed, 3 Jul 2019 23:05:19 +0000 (19:05 -0400)]
radeonsi: decrease maximum supported GENERIC varying index from 42 to 31
This can decrease LDS and/or memory usage for shader outputs when geometry
shaders or tessellation is used.
Only PS inputs support higher indices and those aren't eliminated by
kill_outputs.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Wed, 3 Jul 2019 23:04:37 +0000 (19:04 -0400)]
radeonsi: cosmetic cleanup in si_shader_io_get_unique_index
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Tue, 2 Jul 2019 22:43:40 +0000 (18:43 -0400)]
radeonsi: fix and clean up shader_type passing
- don't pass it via a parameter if it can be derived from other parameters
- set shader_type for ac_rtld_open
- use enum pipe_shader_type instead of unsigned
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 27 Jun 2019 02:44:06 +0000 (22:44 -0400)]
radeonsi: enable RB+ for pixel shaders with no/non-contiguous color outputs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie airlied@redhat.com
Marek Olšák [Tue, 25 Jun 2019 22:59:50 +0000 (18:59 -0400)]
radeonsi: don't set READ_ONLY for const_uploader to fix bindless texture hangs
Bindless textures can update descriptors with WRITE_DATA.
Cc: 19.1 <mesa-stable@lists.freedesktop.org>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie airlied@redhat.com
Alyssa Rosenzweig [Fri, 5 Jul 2019 15:40:22 +0000 (08:40 -0700)]
gallium: Add util_format_is_unorm8 check
Useful for formats that would work with the same driver code path as
RGBA8 UNORM but that don't meet the util_format_is_rgba8_variant
criteria due to a smaller channel count.
v2: Use simpler logic (suggested by Iago).
v3: Fix spelling erorr. boolean->bool (thank you airlied).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Alyssa Rosenzweig [Mon, 1 Jul 2019 22:01:19 +0000 (15:01 -0700)]
nir: Add Panfrost-specific blending intrinsic
This gives more flexibility than the normal store_deref/store_output
versions (particularly, it allows us to abuse the type system in awful
ways, which is necessary for efficient format conversion in blend
shaders.)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Pratik Vishwakarma [Tue, 9 Jul 2019 06:23:26 +0000 (11:53 +0530)]
radeonsi: Expose support for 10-bit VP9 decode
Fix si_vid_is_format_supported to expose support
for 10-bit VP9 decode using P016 format. Without
this change, 10-bit decode will be exposed only
for HEVC even though newer hardware support
10-bit decode for VP9.
Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Alyssa Rosenzweig [Wed, 3 Jul 2019 20:00:14 +0000 (13:00 -0700)]
nir: Add nir_imm_vec4_16
We already have nir_imm_float16 and nir_imm_vec4; let's add the ability
to easily make immediate fp16 vectors as well, now that fp16 support is
maturing in NIR/GLSL.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Karol Herbst [Sun, 7 Jul 2019 19:27:47 +0000 (21:27 +0200)]
nvc0: remove nvc0_program.tp.input_patch_size
right now that's dead code
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Bas Nieuwenhuizen [Tue, 9 Jul 2019 09:03:56 +0000 (11:03 +0200)]
radv: Add a common member in the union to make things more clear.
This clarifies that the struct can be used when the shader can be
one of VS/TES.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Bas Nieuwenhuizen [Tue, 9 Jul 2019 09:00:33 +0000 (11:00 +0200)]
Revert "radv: keep track of whether NGG is used for GS on GFX10"
This reverts commit
63e0675d986744a9ed2d9a15b7cba84ff4a24fc2.
The GS is merged with the preceding shader and since the preceding
shader will have as_ngg set the final binary will have is_ngg set.
So we do not need the gs key here.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Juan A. Suarez Romero [Tue, 9 Jul 2019 09:22:13 +0000 (11:22 +0200)]
docs: update calendar, add news item and link release notes for 19.1.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Juan A. Suarez Romero [Tue, 9 Jul 2019 09:18:55 +0000 (09:18 +0000)]
docs: add sha256 checksums for 19.1.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit
e42399f4de80acb681b90ae4e35d8983b89d0329)
Juan A. Suarez Romero [Tue, 9 Jul 2019 09:09:53 +0000 (09:09 +0000)]
docs: add release notes for 19.1.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit
fe1f7b538b7e8e4bd221c5d52ae72a3721c6aa08)
Connor Abbott [Mon, 8 Jul 2019 16:17:30 +0000 (18:17 +0200)]
nir/lower_io_to_temporaries: Fix hash table leak
Fixes:
c45f5db527252384395e55fb1149b673ec7b5fa8 ("nir/lower_io_to_temporaries: Handle interpolation intrinsics")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Bas Nieuwenhuizen [Tue, 9 Jul 2019 07:41:14 +0000 (09:41 +0200)]
radv/gfx10: Use correct gs_out for tess point_mode.
Fixes:
204e4da9b47 "radv: Use correct gs_out with tessellation."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Samuel Pitoiset [Tue, 9 Jul 2019 06:44:01 +0000 (08:44 +0200)]
radv: set correct number of VGPRs for GS on GFX10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Tue, 9 Jul 2019 06:44:00 +0000 (08:44 +0200)]
radv: fix VGT_ESGS_RING_ITEMSIZE for GS as NGG on GFX10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Tue, 9 Jul 2019 06:43:59 +0000 (08:43 +0200)]
radv: emit VGT_GS_MAX_VERT_OUT for legacy and NGG paths for GS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Tue, 9 Jul 2019 06:43:58 +0000 (08:43 +0200)]
radv: emit the geometry shader as NGG if enabled on GFX10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Tue, 9 Jul 2019 06:43:57 +0000 (08:43 +0200)]
radv: keep track of whether NGG is used for GS on GFX10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Tue, 9 Jul 2019 06:43:56 +0000 (08:43 +0200)]
radv: add radv_pipeline_generate_hw_gs() helper
For legacy GS path.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>