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Marek Olšák [Fri, 26 Apr 2013 12:45:06 +0000 (14:45 +0200)]
st/mesa: remove dependency on _NEW_BUFFER_OBJECT for vertex arrays
_NEW_BUFFER_OBJECT means glBufferData was called. We can just set our own
flag in BufferData.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Fri, 26 Apr 2013 12:42:10 +0000 (14:42 +0200)]
st/mesa: don't check for _NEW_PROGRAM when binding UBOs
Probably copied from i965. However st/mesa has its flags ST_NEW_xxx_PROGRAM.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Thu, 25 Apr 2013 23:54:41 +0000 (01:54 +0200)]
st/mesa: fix a couple of issues in st_bind_ubos
- don't reference a buffer for a local variable
(that's never useful unless it can be the only reference to the buffer)
- check if the buffer is not NULL
- set buffer_size as specified with BindBufferRange
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Thu, 25 Apr 2013 20:12:47 +0000 (22:12 +0200)]
st/mesa: restore the transfer_inline_write path for BufferData
Version 2 that shouldn't crash.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Thu, 2 May 2013 01:29:47 +0000 (03:29 +0200)]
st/mesa: initialize Const.MaxColorAttachments
NOTE: This is a candidate for the stable branches.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Thu, 2 May 2013 01:24:33 +0000 (03:24 +0200)]
gallium: add PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE for GL
v2: fix typo 65535 -> 65536
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Thu, 2 May 2013 00:41:11 +0000 (02:41 +0200)]
st/mesa: consolidate setting MaxTextureImageUnits
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Thu, 2 May 2013 00:38:43 +0000 (02:38 +0200)]
st/mesa: initialize all program constants and UBO limits
Also simplify UBO support checking.
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Wed, 1 May 2013 23:44:14 +0000 (01:44 +0200)]
glsl: fix the value of gl_MaxFragmentUniformVectors
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Fri, 26 Apr 2013 12:21:09 +0000 (14:21 +0200)]
mesa: add & use a new driver flag for UBO updates instead of _NEW_BUFFER_OBJECT
v2: move the flagging from intel_bufferobj_data to intel_bufferobj_alloc_buffer
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Thu, 25 Apr 2013 23:17:47 +0000 (01:17 +0200)]
mesa: skip _MaxElement computation unless driver needs strict bounds checking
If Const.CheckArrayBounds is false, the only code using _MaxElement is
glDrawRangeElements, so I changed it and explained in the code why
_MaxElement is not very useful there.
BTW, the big magic number was copied to the letter
from _mesa_update_array_max_element.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Thu, 25 Apr 2013 22:50:55 +0000 (00:50 +0200)]
mesa: remove unused gl_array_object::NewArray
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Thu, 2 May 2013 02:09:04 +0000 (04:09 +0200)]
mesa: remove unused gl_constants::MaxColorTableSize
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Thu, 2 May 2013 01:44:35 +0000 (03:44 +0200)]
mesa: unify MaxVertexVaryingComponents and MaxGeometryVaryingComponents
The limits should not be different and OpenGL requires both to be at least 32,
which is also the maximum limit on radeon.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Thu, 2 May 2013 00:30:44 +0000 (02:30 +0200)]
mesa: move max texture image unit constants to gl_program_constants
Const.MaxTextureImageUnits -> Const.FragmentProgram.MaxTextureImageUnits
Const.MaxVertexTextureImageUnits -> Const.VertexProgram.MaxTextureImageUnits
etc.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Wed, 1 May 2013 23:22:48 +0000 (01:22 +0200)]
mesa: consolidate definitions of max texture image units
Shaders are unified on most hardware (= same limits in all stages).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Vinson Lee [Fri, 10 May 2013 05:42:10 +0000 (22:42 -0700)]
ilo: Initialize read_back in transfer_map_sys.
Fixes "Uninitialized scalar variable" defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Marek Olšák [Thu, 2 May 2013 03:08:08 +0000 (05:08 +0200)]
r600g: increase array size for shader inputs and outputs
and add assertions to prevent buffer overflow. This fixes corruption
of the r600_shader struct.
NOTE: This is a candidate for the stable branches.
Chí-Thanh Christopher Nguyễn [Mon, 6 May 2013 18:29:37 +0000 (20:29 +0200)]
targets/dri-i915: Force c++ linker in all cases
NOTE: This is a candidate for the 9.1 branch.
Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=461696
Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
Ben Widawsky [Wed, 8 May 2013 05:42:39 +0000 (22:42 -0700)]
i965: Actually use the user timeout in glClientWaitSync.
Use the new libdrm functionality to actually do timed waits on the sync
object.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Paulo Zanoni [Fri, 10 Aug 2012 15:06:37 +0000 (12:06 -0300)]
i965: make GT3 machines work as GT3 instead of GT2
We were not allowed to say the "GT3" name, but we really needed to
have the PCI IDs because too many people had such machines, so we had
to make the GT3 machines work as GT2.
Let's just say that GT2_PLUS was a short for GT2_PLUS_1 :)
NOTE: This is a candidate for stable branches.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Wed, 7 Mar 2012 17:58:15 +0000 (09:58 -0800)]
i965: Add chipset limits for the Haswell GT3 variant.
NOTE: This is a candidate for stable branches.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Kenneth Graunke [Sat, 24 Sep 2011 07:12:58 +0000 (00:12 -0700)]
i965: Update URB partitioning code for Haswell's GT3 variant.
Haswell's GT3 variant offers 32kB of URB space for push constants, while
GT1 and GT2 match Ivybridge, providing 16kB. Update the code to reserve
the full 32kB on GT3.
v2: Specify push constant size correctly. I thought GT3 reinterpreted
the value as multiples of 2kB, but it doesn't. You simply have to
program an even number.
NOTE: This is a candidate for stable branches.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Wed, 8 May 2013 23:45:24 +0000 (16:45 -0700)]
i965: Delete dead intel_span.c symlink.
Eric Anholt [Tue, 30 Apr 2013 22:15:21 +0000 (15:15 -0700)]
i965/vs: Make virtual grf live intervals actually cover their used range.
This is the same change as the previous commit to the FS. A very few VSes
are regressed by 1 or 2 instructions, which look recoverable with a bit
more dead code elimination.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Tue, 30 Apr 2013 22:00:40 +0000 (15:00 -0700)]
i965/fs: Make virtual grf live intervals actually cover their used range.
Previously, we would sometimes not consider a write to a register to
extend the end of the interval, nor would we consider a read before a
write to extend the start. This made for a bunch of complicated logic
related to how to treat the results when dead code might be present.
Instead, just extend the interval and fix dead code elimination to know
how to remove it.
Interestingly, this actually results in a tiny bit more optimization:
total instructions in shared programs:
1391220 ->
1390799 (-0.03%)
instructions in affected programs: 14037 -> 13616 (-3.00%)
v2: Fix a theoretical problem with the simd16 workaround if dst == src,
where we would revert the bump of the live range.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (v1)
Marek Olšák [Tue, 26 Mar 2013 02:19:10 +0000 (03:19 +0100)]
docs: document GALLIUM_HUD and LIBGL_SHOW_FPS
Courtney Goeltzenleuchter [Wed, 8 May 2013 20:52:13 +0000 (14:52 -0600)]
ilo: Add support for HW primitive restart.
Now tells Gallium that ilo supports primitive restart.
Updated ilo_draw_vbo to be able to check that the indexed
primitive being rendered can actually be supported in HW. If not,
will break up into individual prims similar to what Mesa does.
[olv: a minor fix after rebasing and formatting]
Brian Paul [Wed, 8 May 2013 17:08:33 +0000 (11:08 -0600)]
svga: misc whitespace and comment fixes in svga_cmd.c
Brian Paul [Wed, 8 May 2013 17:07:46 +0000 (11:07 -0600)]
docs: remove ^M chars from GL3.txt
Brian Paul [Wed, 8 May 2013 16:18:49 +0000 (10:18 -0600)]
st/mesa: generate GL_OUT_OF_MEMORY if we can't create the index buffer
Before, if we failed to allocate the index buffer we'd silently
return from st_draw_vbo() without drawing anything. We should
raise GL_OUT_OF_MEMORY to give some indication that something went
wrong.
Note: This is a candidate for the stable branches.
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Chia-I Wu [Thu, 9 May 2013 07:14:11 +0000 (15:14 +0800)]
ilo: add support for PIPE_FORMAT_ETC1_RGB8
It is decompressed to and stored as PIPE_FORMAT_R8G8B8X8_UNORM on-the-fly.
Chia-I Wu [Thu, 9 May 2013 06:21:25 +0000 (14:21 +0800)]
ilo: support mapping with a staging system buffer
It can be used for unpacking compressed texture on-the-fly or to support
explicit transfer flushing.
Chia-I Wu [Thu, 9 May 2013 06:07:58 +0000 (14:07 +0800)]
ilo: allow for different mapping methods
We want to or need to use a different mapping method when when the resource is
busy, the bo format differs from the requested format, and etc.
Chia-I Wu [Thu, 9 May 2013 04:10:41 +0000 (12:10 +0800)]
ilo: allow bo format to differ from that requested
For separate stencil buffer or formats not supported natively, the real format
of the bo may differ from that requested.
Stéphane Marchesin [Sun, 5 May 2013 11:34:40 +0000 (04:34 -0700)]
draw/llvm: Add additional llvm optimization passes
It helps a bit with vertex shader performance on i915g
(a couple percent faster with openarena).
I have tried most other passes, and they weren't showing
any measurable improvement. Note that my vertex shaders
didn't have loops, so maybe the loop optimizations could
still be useful in the future.
Reviewed-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Thu, 21 Mar 2013 16:59:31 +0000 (09:59 -0700)]
i965: Sync brw_format_for_mesa_format() table with new Mesa formats.
I'm not filling them all in, to prevent any breakage in this commit.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Thu, 21 Mar 2013 21:21:10 +0000 (14:21 -0700)]
i965: Update the surface formats table from the current specs.
Unfortunately the surface formats table is now splattered across multiple
chapters. All surface format enums from brw_defines.h are present, but
only support for them that is mentioned in the public specs is included
here.
v2 (from Ken): Mark R32G32B32A32_SFIXED as unsupported on Ivybridge.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 17 Apr 2013 00:21:16 +0000 (17:21 -0700)]
i965: Add surface format defines from the public specs.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Fabian Bieler [Wed, 24 Apr 2013 23:30:15 +0000 (01:30 +0200)]
mesa/program: Don't copy propagate from swizzles.
Do not propagate a copy if source and destination are identical.
Otherwise code like
MOV TEMP[0].xyzw, TEMP[0].wzyx
MOV TEMP[1].xyzw, TEMP[0].xyzw
is changed to
MOV TEMP[0].xyzw, TEMP[0].wzyx
MOV TEMP[1].xyzw, TEMP[0].wzyx
This fixes Piglit test shaders/glsl-copy-propagation-self-2 for drivers that
use Mesa IR.
NOTE: This is a candidate for the stable branches.
Signed-off-by: Fabian Bieler <fabianbieler@fastmail.fm>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Fabian Bieler [Sat, 20 Apr 2013 17:40:11 +0000 (19:40 +0200)]
mesa/st: Don't copy propagate from swizzles.
Do not propagate a copy if source and destination are identical.
Otherwise code like
MOV TEMP[0].xyzw, TEMP[0].wzyx
MOV TEMP[1].xyzw, TEMP[0].xyzw
is changed to
MOV TEMP[0].xyzw, TEMP[0].wzyx
MOV TEMP[1].xyzw, TEMP[0].wzyx
This fixes Piglit test shaders/glsl-copy-propagation-self-2 for gallium drivers.
NOTE: This is a candidate for the stable branches.
Signed-off-by: Fabian Bieler <fabianbieler@fastmail.fm>
Reviewed-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Tue, 7 May 2013 03:44:21 +0000 (20:44 -0700)]
i965: Fix hangs on HSW since the gen6 blorp fix.
The constant packets for gen6 are too small for gen7, and while IVB seems
happy with them HSW blows up. Fix it by emitting the correct packets on
gen7, for all stages.
v2: Include the packets instead of just skipping them.
NOTE: This is a candidate for the stable branches.
Reviewed-and-tested-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chad Versace [Mon, 6 May 2013 14:41:11 +0000 (07:41 -0700)]
egl/android: Fix error condition for EGL_ANDROID_image_native_buffer
Emit EGL_BAD_CONTEXT if the user passes a context to
eglCreateImageKHR(type=EGL_ANDROID_image_native_buffer).
From the EGL_ANDROID_image_native_buffer spec:
* If <target> is EGL_NATIVE_BUFFER_ANDROID and <ctx> is not
EGL_NO_CONTEXT, the error EGL_BAD_CONTEXT is generated.
Note: This is a candidate for the stable branches.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Stéphane Marchesin [Sat, 4 May 2013 21:06:12 +0000 (14:06 -0700)]
i915: Use Y tiling for textures
This basically reverts commit
2acc7193743199701f8f6d1877a59ece0ec4fa5b.
With the previous change, we're not batchbuffer limited any
longer. So we actually start seeing a performance difference
between X and Y tiling. X tiling is funny because it is
faster for screen-aligned quads but slower in games. So let's
use Y tiling which is 10% faster overall.
Stéphane Marchesin [Sun, 5 May 2013 01:59:35 +0000 (18:59 -0700)]
i915g: Optimize batchbuffer sizes
Now that we don't throttle at every batchbuffer, we can shrink
the size of batchbuffers to achieve early flushing. This gives
a significant speed boost in a lot of games (on the order of
20%).
Stéphane Marchesin [Sun, 11 Nov 2012 10:10:29 +0000 (02:10 -0800)]
i915g: Add more PIPE_CAP_* support
Chia-I Wu [Wed, 8 May 2013 03:32:22 +0000 (11:32 +0800)]
ilo: remove our own type inference
tgsi_opcode_infer_{src,dst}_type() works just fine.
Chia-I Wu [Wed, 8 May 2013 03:07:27 +0000 (11:07 +0800)]
ilo: use tgsi_util_get_texture_coord_dim()
And remove toy_tgsi_get_texture_coord_dim().
Chia-I Wu [Sat, 4 May 2013 10:06:39 +0000 (18:06 +0800)]
tgsi: fix operand type of TGSI_OPCODE_NOT
It should be TGSI_TYPE_UNSIGNED, not TGSI_TYPE_FLOAT.
Fixed also gallivm not_emit_cpu() to use uint build context.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
Chia-I Wu [Sat, 4 May 2013 09:54:16 +0000 (17:54 +0800)]
tgsi: refactor tgsi_opcode_infer_src_type()
Call tgsi_opcode_infer_type() from tgsi_opcode_infer_src_type().
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
Chia-I Wu [Sat, 4 May 2013 05:27:59 +0000 (13:27 +0800)]
tgsi: refactor tgsi_opcode_infer_dst_type()
Move the body of tgsi_opcode_infer_dst_type() to a new helper function,
tgsi_opcode_infer_type(), and call the helper function from
tgsi_opcode_infer_dst_type(). The diff looks complicated simply because the
code is moved around.
A following commit will make tgsi_opcode_infer_src_type() call
tgsi_opcode_infer_type().
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
Chia-I Wu [Sat, 4 May 2013 01:44:39 +0000 (09:44 +0800)]
tgsi: reorder opcodes in opcode type inference
Reorder opcodes by their assigned numbers. This makes it easier to see the
differences between tgsi_opcode_infer_src_type() and
tgsi_opcode_infer_dst_type().
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
Chia-I Wu [Tue, 7 May 2013 06:50:02 +0000 (14:50 +0800)]
tgsi: clean up exec_tex()
Make use of tgsi_util_get_texture_coord_dim() to replace the big switch table.
There is a subtle difference with this change. When TXP is used with an array
texture, the layer is now also projected. This behavior matches the TGSI doc.
Since GLSL does not allow TXP on an array texture, I am not sure which
behavior is correct or preferred.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
Chia-I Wu [Tue, 7 May 2013 07:32:35 +0000 (15:32 +0800)]
tgsi: add tgsi_util_get_texture_coord_dim()
This util function returns the dimension of the texture coordinates for a
texture target, and the location of the shadow reference value.
For example, when the texture target is TGSI_TEXTURE_SHADOW2D, the dimension
of the texture coordinates is 2, and the location of the ref value is 2
(that is, the Z channel).
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
Bryan Cain [Tue, 7 May 2013 21:57:17 +0000 (16:57 -0500)]
nv50: initialize kick_notify callback in nv50_create
Fixes infinite loop on startup in Portal and Left 4 Dead 2.
NOTE: This is a candidate for the 9.0 and 9.1 branches.
Eric Anholt [Mon, 6 May 2013 21:14:39 +0000 (14:14 -0700)]
i965: Use Y-tiled blits to untile for cached mappings of miptrees.
Fixes a regression in firefox's unaccelerated compositing path for WebGL
with the introduction of Y tiling.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64213
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Mon, 6 May 2013 21:12:56 +0000 (14:12 -0700)]
i965: Add support for Y-tiled blits on gen6+.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Mon, 6 May 2013 22:24:12 +0000 (15:24 -0700)]
i965: Count occlusion query samples for CopyPixels using the 2D engine.
We accidentally "fixed" the piglit test for this when introducing Y
tiling, since this path stopped being executed. In reenabling this path
for Y tiling, we ended up regressing it again, so just fix it.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59439
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Robert Bragg [Fri, 10 Feb 2012 16:59:31 +0000 (16:59 +0000)]
egl/wayland: Implement EGL_EXT_swap_buffers_with_damage
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Robert Bragg [Thu, 25 Apr 2013 12:41:42 +0000 (13:41 +0100)]
egl: Add extension infrastructure for EGL_EXT_swap_buffers_with_damage
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Robert Bragg [Thu, 25 Apr 2013 12:31:33 +0000 (13:31 +0100)]
egl: Update to revision 21254 of eglext.h
This pulls in EGL_EXT_swap_buffers_with_damage.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Roland Scheidegger [Fri, 3 May 2013 21:32:23 +0000 (23:32 +0200)]
gallium: more tgsi documentation updates
Adds the remaining integer opcodes, and some opcodes are moved to more
appropriate places, along with getting rid of the (already nearly empty)
ps_2_x section. Though the CAP bits for some of these are still a bit in
the air so the documentation isn't quite as watertight as is desirable.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Vinson Lee [Sun, 5 May 2013 19:51:42 +0000 (12:51 -0700)]
ilo: Add missing break statement in aos_tex TGSI_OPCODE_TEX2 case.
Fixes "Missing break in switch" defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Vadim Girlin [Sun, 5 May 2013 02:03:14 +0000 (06:03 +0400)]
r600g/sb: optimize some cases for CNDxx instructions
We can replace CNDxx with MOV (and possibly eliminate after
propagation) in following cases:
If src1 is equal to src2 in CNDxx instruction then the result doesn't
depend on condition and we can replace the instruction with
"MOV dst, src1".
If src0 is const then we can evaluate the condition at compile time and
also replace it with MOV.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Vadim Girlin [Sat, 4 May 2013 18:05:43 +0000 (22:05 +0400)]
r600g/sb: fix memory leaks
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Vadim Girlin [Sun, 5 May 2013 02:01:20 +0000 (06:01 +0400)]
r600g/sb: fix kcache handling on r6xx
Use the same limit for kcache constants in alu group on r6xx as on other
chips (two const pairs). Relaxing this will require additional checks to
make sure that all 4 consts in the group come from 2 kcache sets (clause
limit), probably without noticeable improvements of shader performance.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Eric Anholt [Mon, 22 Apr 2013 18:18:08 +0000 (11:18 -0700)]
intel: Remove renderbuffer delete setup from texture wrapping.
This is already set by intel_new_renderbuffer().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Mon, 22 Apr 2013 18:04:21 +0000 (11:04 -0700)]
mesa: Make Mesa core set up wrapped texture renderbuffer state.
Everyone was doing effectively the same thing, except for some funky code
reuse in Intel, and swrast mistakenly recomputing _BaseFormat instead of
using the texture's _BaseFormat. swrast's sRGB handling is left in place,
though it should be done by using _mesa_get_render_format() at render time
instead (as-is, it will miss updates to GL_FRAMEBUFFER_SRGB).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Mon, 22 Apr 2013 18:07:59 +0000 (11:07 -0700)]
intel: Simplify renderbuffer-for-texture width setup.
We're looking for the logical width of our level, which is what
image->Width2/Height2 is. The previous code relied on MSAA textures being
only level 0.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Mon, 22 Apr 2013 17:38:41 +0000 (10:38 -0700)]
mesa: Make core Mesa allocate the texture renderbuffer wrapper.
Every driver did the same thing.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 30 Apr 2013 18:15:05 +0000 (11:15 -0700)]
i965: Use brw_blorp_blit_miptrees() for CopyTexSubImage().
Now that depth resolves are handled there, we don't need to make the
temporary renderbuffer.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 30 Apr 2013 17:48:09 +0000 (10:48 -0700)]
i965: Move blorp resolve setup into brw_blorp_blit_miptrees().
There was some comment about trying to avoid marking resolves in
updownsample, but if the downsample is never actually rendered to, then
the required resolve tracked in the downsample will never be executed, so
who cares?
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tom Stellard [Mon, 6 May 2013 16:58:56 +0000 (09:58 -0700)]
gallivm: Fix build for LLVM < 3.3
The C API versions of the LLVM multithreaded functions were added in
LLVM 3.3.
Tom Stellard [Fri, 3 May 2013 20:10:29 +0000 (13:10 -0700)]
r600g/llvm: Parse config values in register / value pairs
Rather than relying on a predetermined order for the config values.
Tom Stellard [Fri, 3 May 2013 18:38:50 +0000 (11:38 -0700)]
r600g/llvm: Don't feed LLVM output through r600_bytecode_build()
The LLVM backend emits raw ISA now, so we can just its output
unmodified.
Tom Stellard [Fri, 3 May 2013 18:15:55 +0000 (11:15 -0700)]
r600g/llvm: Don't emit CALL_FS for vertex shaders
The LLVM backend takes care of this now.
Matt Turner [Thu, 11 Apr 2013 22:49:32 +0000 (15:49 -0700)]
i965: Lower bitfieldInsert.
v2: Only lower bitfieldInsert to BFM+BFI (and don't lower
bitfieldExtract at all) since three-source instructions are now
usable in the vertex shader.
v3: Lower bitfield_insert in the same pass with everything else, since
it doesn't produce any instructions to be lowered (the other two
lowering passes that were in a previous iteration of this series
emitted subtractions which needed to be lowered).
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz> [v2]
Matt Turner [Thu, 18 Apr 2013 01:57:58 +0000 (18:57 -0700)]
i965/vs: Add support for bit instructions.
v2: Rebase on LRP addition.
Use fix_3src_operand() when emitting BFE and BFI2.
Add BFE and BFI2 to is_3src_inst check in
brw_vec4_copy_propagation.cpp.
Subtract result of FBH from 31 (unless an error) to convert
MSB counts to LSB counts
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Matt Turner [Wed, 10 Apr 2013 02:22:34 +0000 (19:22 -0700)]
i965/fs: Add support for bit instructions.
Don't bother scalarizing ir_binop_bfm, since its results are
identical for all channels.
v2: Subtract result of FBH from 31 (unless an error) to convert
MSB counts to LSB counts.
v3: Use op0->clone() in ir_triop_bfi to prevent (var_ref
channel_expressions) from appearing multiple times in the IR.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz> [v2]
Matt Turner [Wed, 10 Apr 2013 00:56:19 +0000 (17:56 -0700)]
i965: Add support for emitting and disassembling bit instructions.
Specifically
bfe - for bitfieldExtract()
bfi1 and bfi2 - for bitfieldInsert()
bfrev - for bitfieldReverse()
cbit - for bitCount()
fbh - for findMSB()
fbl - for findLSB()
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Matt Turner [Sun, 21 Apr 2013 04:41:15 +0000 (21:41 -0700)]
i965: Print the correct dst and shared-src types for 3-src instructions.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Matt Turner [Wed, 17 Apr 2013 19:23:54 +0000 (12:23 -0700)]
i965/gen7: Set src/dst types for 3-src instructions.
Also update asserts to allow BFE and BFI2, which take (unsigned)
doubleword arguments.
v2: Allow BRW_REGISTER_TYPE_UD for src1 and src2 as well.
Assert that src2.type (instead of src0.type) matches dest.type since
it's the primary argument and src0 and src1 might correctly have
different types.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz> [v1]
Matt Turner [Wed, 17 Apr 2013 18:52:00 +0000 (11:52 -0700)]
i965: Add 3-src destination and shared-source type macros.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Matt Turner [Wed, 17 Apr 2013 18:32:04 +0000 (11:32 -0700)]
i965: Add Gen7+ fields to brw_instruction and add comments.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Matt Turner [Wed, 10 Apr 2013 05:43:05 +0000 (22:43 -0700)]
glsl: Add a pass to lower bitfield-insert into bfm+bfi.
i965/Gen7+ and Radeon/Evergreen+ have bfm/bfi instructions to implement
bitfieldInsert() from ARB_gpu_shader5.
v2: Add ir_binop_bfm and ir_triop_bfi to st_glsl_to_tgsi.cpp.
Remove spurious temporary assignment and dereference.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Matt Turner [Sun, 21 Apr 2013 19:33:59 +0000 (12:33 -0700)]
glsl: Add constant evaluation of bit built-ins.
v2: Order bits from LSB end (31 - count) for ir_unop_find_msb.
v3: Add ir_triop_bitfield_extract as an exception to the op[0]->type ==
op[1]->type assertion in ir_constant_expression.cpp.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz> [v2]
Matt Turner [Wed, 10 Apr 2013 00:45:12 +0000 (17:45 -0700)]
glsl: Add support for new bit built-ins in ARB_gpu_shader5.
v2: Move use of ir_binop_bfm and ir_triop_bfi to a later patch.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Matt Turner [Tue, 9 Apr 2013 23:03:15 +0000 (16:03 -0700)]
glsl: Add new bit built-ins IR and prototypes from ARB_gpu_shader5.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Matt Turner [Tue, 9 Apr 2013 23:43:14 +0000 (16:43 -0700)]
glsl: Rework ir_reader to handle expressions with four operands.
Needed to support the bitfieldInsert() built-in added by
ARB_gpu_shader5.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Matt Turner [Tue, 9 Apr 2013 23:01:38 +0000 (16:01 -0700)]
mesa: Add infrastructure for ARB_gpu_shader5.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Tom Stellard [Wed, 24 Apr 2013 03:14:01 +0000 (20:14 -0700)]
radeon/llvm: Always build libradeonllvm as static
This library is very small, so there is not much to gain from building
it as a shared library. Also, when linking statically with LLVM, a
shared libradeonllvm exports LLVM symbols and creates problems when
used with other shared objects that also link statically to LLVM.
Reviewed-by: Mathias.Froehlich@web.de
Tom Stellard [Tue, 2 Apr 2013 17:42:50 +0000 (10:42 -0700)]
radeon/llvm: Use LLVM C API for compiling LLVM IR to ISA v2
The LLVM C API is considered stable and should never change, so it
is much more desirable to use than the LLVM C++ API, which is constantly in
flux.
v2:
- Split target initialization and lookup into separate functions
Reviewed-by: Mathias.Froehlich@web.de
Tom Stellard [Tue, 30 Apr 2013 14:38:03 +0000 (07:38 -0700)]
gallivm: Move LLVMStartMultithreaded() static initializer into gallivm
This does not solve all of the problems with using LLVM in a
multithreaded enivronment, but it should help in some cases.
Reviewed-by: Mathias.Froehlich@web.de
Tom Stellard [Thu, 2 May 2013 22:25:53 +0000 (18:25 -0400)]
radeon/llvm: Don't use the global context when parsing LLVM IR
This leads to crashes when multiple threads try to compile compute
shaders in the same time.
Fixes a crash in bfgminer when using more than one thread.
Eric Anholt [Thu, 25 Apr 2013 19:06:23 +0000 (12:06 -0700)]
i965: Remove GL_ARB_color_buffer_float from GL core contexts.
Of the 3 controls in the extension, one was kept in GL core and the other
two were explicitly deprecated and the reasonable default behavior was
encoded in the spec. By not exposing the extension, we avoid shader
recompiles when switching between float and unorm color buffers.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tom Stellard [Mon, 29 Apr 2013 20:10:09 +0000 (13:10 -0700)]
r600g/llvm: Update radeon family mappings for LLVM backend
New processors were added to the backend to distinguish between
GPUs with and without vertex caches.
Chia-I Wu [Fri, 3 May 2013 07:44:10 +0000 (15:44 +0800)]
android: libsync is needed on Android 4.2+ for any driver
Add libsync not only for MESA_BUILD_CLASSIC, but also for MESA_BUILD_GALLIUM.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Chia-I Wu [Fri, 3 May 2013 07:44:09 +0000 (15:44 +0800)]
android: add ilo to the build system
It can be selected with
BOARD_GPU_DRIVERS := ilo
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Eric Anholt [Fri, 3 May 2013 20:17:56 +0000 (13:17 -0700)]
glsl: Flip around "if" statements with empty "then" blocks.
This cleans up some funny-looking code in some unigine shaders I was
looking at. Also slightly helps on planeshift and a few shaders in an
upcoming Valve release.
total instructions in shared programs:
1653715 ->
1653587 (-0.01%)
instructions in affected programs: 16550 -> 16422 (-0.77%)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Chia-I Wu [Sun, 5 May 2013 06:13:39 +0000 (14:13 +0800)]
ilo: correctly set return types of sampler messages
Correctly set the types of the temporaries. We do not want type conversions
when moving the results to the final destinations.