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Evan Quan [Mon, 25 Feb 2019 08:44:36 +0000 (16:44 +0800)]
drm/amd/powerplay: correct power reading on fiji
Set sampling period as 500ms to provide a smooth power
reading output. Also, correct the register for power
reading.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Evan Quan [Mon, 25 Feb 2019 06:59:37 +0000 (14:59 +0800)]
drm/amd/powerplay: set max fan target temperature as 105C
A workaround to override the fan target temperature in SMC table.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 30 Jan 2019 20:45:18 +0000 (15:45 -0500)]
drm/amd/display: don't call dm_pp_ function from an fpu block
Powerplay functions called from dm_pp_* functions tend to do a
mutex_lock which isn't safe to do inside a kernel_fpu_begin/end block as
those will disable/enable preemption.
Rearrange the dm_pp_get_clock_levels_by_type_with_voltage calls to make
sure they happen outside of kernel_fpu_begin/end.
Cc: stable@vger.kernel.org
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 30 Jan 2019 13:44:36 +0000 (14:44 +0100)]
drm/amdgpu: clear PDs/PTs only after initializing them
Clear the VM PDs/PTs only after initializing all the structures.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nathan Chancellor [Mon, 10 Dec 2018 23:42:01 +0000 (16:42 -0700)]
drm/amd/display: Pass app_tf by value rather than by reference
Clang warns when an expression that equals zero is used as a null
pointer constant (in lieu of NULL):
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:4435:3:
warning: expression which evaluates to zero treated as a null pointer
constant of type 'const enum color_transfer_func *'
[-Wnon-literal-null-conversion]
TRANSFER_FUNC_UNKNOWN,
^~~~~~~~~~~~~~~~~~~~~
1 warning generated.
This warning is caused by commit
bb47de736661 ("drm/amdgpu: Set FreeSync
state using drm VRR properties") and it could be solved by using NULL
instead of TRANSFER_FUNC_UNKNOWN or casting TRANSFER_FUNC_UNKNOWN as a
pointer. However, after looking into it, there doesn't appear to be a
good reason to pass app_tf by reference as it is never mutated along the
way. This is the only code path in which app_tf is used:
mod_freesync_build_vrr_infopacket ->
build_vrr_infopacket_v2 ->
build_vrr_infopacket_fs2_data
Neither mod_freesync_build_vrr_infopacket or build_vrr_infopacket_v2
modify app_tf's value and build_vrr_infopacket_fs2_data expects just
the value so we can avoid dereferencing anything by just passing in
app_tf's value to mod_freesync_build_vrr_infopacket and
build_vrr_infopacket_v2.
There is no functional change because build_vrr_infopacket_fs2_data
doesn't do anything if TRANSFER_FUNC_UNKNOWN is passed to it, the same
as not calling build_vrr_infopacket_fs2_data at all like before this
change when NULL was used for app_tf.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Candice Li [Mon, 25 Feb 2019 02:59:08 +0000 (10:59 +0800)]
Revert "drm/amdgpu: use BACO reset on vega20 if platform support"
This reverts commit
2172b89e7c94605380d8c0dedf543c93f0a0b27c.
Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 21 Feb 2019 07:41:21 +0000 (15:41 +0800)]
drm/amd/powerplay: show the right override pcie parameters
Instead of the hard-coded ones from VBIOS.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 20 Feb 2019 09:47:35 +0000 (17:47 +0800)]
drm/amd/powerplay: honor the OD settings
Set the soft/hard max settings as max possible to
not violate the OD settings.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 20 Feb 2019 09:20:40 +0000 (17:20 +0800)]
drm/amd/powerplay: set default fclk for no fclk dpm support case
Set the default fclk as what we got from VBIOS.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 20 Feb 2019 09:13:16 +0000 (17:13 +0800)]
drm/amd/powerplay: support retrieving clock information from other sysplls
There will be some needs to retrieve clock information from other
sysplls also except default 0.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 20 Feb 2019 08:40:47 +0000 (16:40 +0800)]
drm/amd/powerplay: overwrite ODSettingsMin for UCLK_FMAX feature
For UCLK_FMAX OD feature, SMU overwrites the highest UCLK DPM level freq.
Therefore it can only take values that are greater than the second highest
DPM level freq.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 20 Feb 2019 08:08:41 +0000 (16:08 +0800)]
drm/amd/powerplay: force FCLK to highest also for 5K or higher displays
This can fix possible screen freeze on high resolution displays.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 20 Feb 2019 08:21:10 +0000 (16:21 +0800)]
drm/amd/powerplay: need to reapply the dpm level settings
As these settings got reset during above phm_apply_clock_adjust_rules.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 20 Feb 2019 08:12:03 +0000 (16:12 +0800)]
drm/amd/powerplay: drop redundant soft min/max settings
As these are already set during apply_clocks_adjust_rules.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kevin Wang [Fri, 22 Feb 2019 04:36:49 +0000 (12:36 +0800)]
drm/amdkfd: use init_mqd function to allocate object for hid_mqd (CI)
if use the legacy method to allocate object, when mqd_hiq need to run
uninit code, it will be cause WARNING call trace.
eg: (s3 suspend test)
[ 34.918944] Call Trace:
[ 34.918948] [<
ffffffff92961dc1>] dump_stack+0x19/0x1b
[ 34.918950] [<
ffffffff92297648>] __warn+0xd8/0x100
[ 34.918951] [<
ffffffff9229778d>] warn_slowpath_null+0x1d/0x20
[ 34.918991] [<
ffffffffc03ce1fe>] uninit_mqd_hiq_sdma+0x4e/0x50 [amdgpu]
[ 34.919028] [<
ffffffffc03d0ef7>] uninitialize+0x37/0xe0 [amdgpu]
[ 34.919064] [<
ffffffffc03d15a6>] kernel_queue_uninit+0x16/0x30 [amdgpu]
[ 34.919086] [<
ffffffffc03d26c2>] pm_uninit+0x12/0x20 [amdgpu]
[ 34.919107] [<
ffffffffc03d4915>] stop_nocpsch+0x15/0x20 [amdgpu]
[ 34.919129] [<
ffffffffc03c1dce>] kgd2kfd_suspend.part.4+0x2e/0x50 [amdgpu]
[ 34.919150] [<
ffffffffc03c2667>] kgd2kfd_suspend+0x17/0x20 [amdgpu]
[ 34.919171] [<
ffffffffc03c103a>] amdgpu_amdkfd_suspend+0x1a/0x20 [amdgpu]
[ 34.919187] [<
ffffffffc02ec428>] amdgpu_device_suspend+0x88/0x3a0 [amdgpu]
[ 34.919189] [<
ffffffff922e22cf>] ? enqueue_entity+0x2ef/0xbe0
[ 34.919205] [<
ffffffffc02e8220>] amdgpu_pmops_suspend+0x20/0x30 [amdgpu]
[ 34.919207] [<
ffffffff925c56ff>] pci_pm_suspend+0x6f/0x150
[ 34.919208] [<
ffffffff925c5690>] ? pci_pm_freeze+0xf0/0xf0
[ 34.919210] [<
ffffffff926b45c6>] dpm_run_callback+0x46/0x90
[ 34.919212] [<
ffffffff926b49db>] __device_suspend+0xfb/0x2a0
[ 34.919213] [<
ffffffff926b4b9f>] async_suspend+0x1f/0xa0
[ 34.919214] [<
ffffffff922c918f>] async_run_entry_fn+0x3f/0x130
[ 34.919216] [<
ffffffff922b9d4f>] process_one_work+0x17f/0x440
[ 34.919217] [<
ffffffff922bade6>] worker_thread+0x126/0x3c0
[ 34.919218] [<
ffffffff922bacc0>] ? manage_workers.isra.25+0x2a0/0x2a0
[ 34.919220] [<
ffffffff922c1c31>] kthread+0xd1/0xe0
[ 34.919221] [<
ffffffff922c1b60>] ? insert_kthread_work+0x40/0x40
[ 34.919222] [<
ffffffff92974c1d>] ret_from_fork_nospec_begin+0x7/0x21
[ 34.919224] [<
ffffffff922c1b60>] ? insert_kthread_work+0x40/0x40
[ 34.919224] ---[ end trace
38cd9f65c963adad ]---
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Mon, 25 Feb 2019 07:02:44 +0000 (15:02 +0800)]
drm/amdgpu: use REG32_PCIE wrapper instead for psp
This patch uses REG32_PCIE wrapper instead of writting pci_index2 and reading
pci_data2 for psp. This sequence should be protected by pcie_idx_lock.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Mon, 25 Feb 2019 06:54:20 +0000 (14:54 +0800)]
drm/amd/powerplay: use REG32_PCIE wrapper instead for powerplay
This patch uses REG32_PCIE wrapper instead of writting pci_index2 and reading
pci_data2 for powerplay. This sequence should be protected by pcie_idx_lock.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Fri, 8 Feb 2019 01:38:34 +0000 (20:38 -0500)]
drm/amd/display: Fix issue with link_active state not correct for MST
[Why]
For MST, link not disabled until all streams disabled
[How]
Add check for stream_count before setting link_active = false for MST
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mathias Fröhlich [Sun, 10 Feb 2019 10:13:01 +0000 (11:13 +0100)]
drm/amd/display: Fix reference counting for struct dc_sink.
Reference counting in amdgpu_dm_connector for amdgpu_dm_connector::dc_sink
and amdgpu_dm_connector::dc_em_sink as well as in dc_link::local_sink seems
to be out of shape. Thus make reference counting consistent for these
members and just plain increment the reference count when the variable
gets assigned and decrement when the pointer is set to zero or replaced.
Also simplify reference counting in selected function sopes to be sure the
reference is released in any case. In some cases add NULL pointer check
before dereferencing.
At a hand full of places a comment is placed to stat that the reference
increment happened already somewhere else.
This actually fixes the following kernel bug on my system when enabling
display core in amdgpu. There are some more similar bug reports around,
so it probably helps at more places.
kernel BUG at mm/slub.c:294!
invalid opcode: 0000 [#1] SMP PTI
CPU: 9 PID: 1180 Comm: Xorg Not tainted 5.0.0-rc1+ #2
Hardware name: Supermicro X10DAi/X10DAI, BIOS 3.0a 02/05/2018
RIP: 0010:__slab_free+0x1e2/0x3d0
Code: 8b 54 24 30 48 89 4c 24 28 e8 da fb ff ff 4c 8b 54 24 28 85 c0 0f 85 67 fe ff ff 48 8d 65 d8 5b 41 5c 41 5d 41 5e 41 5f 5d c3 <0f> 0b 49 3b 5c 24 28 75 ab 48 8b 44 24 30 49 89 4c 24 28 49 89 44
RSP: 0018:
ffffb0978589fa90 EFLAGS:
00010246
RAX:
ffff92f12806c400 RBX:
0000000080200019 RCX:
ffff92f12806c400
RDX:
ffff92f12806c400 RSI:
ffffdd6421a01a00 RDI:
ffff92ed2f406e80
RBP:
ffffb0978589fb40 R08:
0000000000000001 R09:
ffffffffc0ee4748
R10:
ffff92f12806c400 R11:
0000000000000001 R12:
ffffdd6421a01a00
R13:
ffff92f12806c400 R14:
ffff92ed2f406e80 R15:
ffffdd6421a01a20
FS:
00007f4170be0ac0(0000) GS:
ffff92ed2fb40000(0000) knlGS:
0000000000000000
CS: 0010 DS: 0000 ES: 0000 CR0:
0000000080050033
CR2:
0000562818aaa000 CR3:
000000045745a002 CR4:
00000000003606e0
DR0:
0000000000000000 DR1:
0000000000000000 DR2:
0000000000000000
DR3:
0000000000000000 DR6:
00000000fffe0ff0 DR7:
0000000000000400
Call Trace:
? drm_dbg+0x87/0x90 [drm]
dc_stream_release+0x28/0x50 [amdgpu]
amdgpu_dm_connector_mode_valid+0xb4/0x1f0 [amdgpu]
drm_helper_probe_single_connector_modes+0x492/0x6b0 [drm_kms_helper]
drm_mode_getconnector+0x457/0x490 [drm]
? drm_connector_property_set_ioctl+0x60/0x60 [drm]
drm_ioctl_kernel+0xa9/0xf0 [drm]
drm_ioctl+0x201/0x3a0 [drm]
? drm_connector_property_set_ioctl+0x60/0x60 [drm]
amdgpu_drm_ioctl+0x49/0x80 [amdgpu]
do_vfs_ioctl+0xa4/0x630
? __sys_recvmsg+0x83/0xa0
ksys_ioctl+0x60/0x90
__x64_sys_ioctl+0x16/0x20
do_syscall_64+0x5b/0x160
entry_SYSCALL_64_after_hwframe+0x44/0xa9
RIP: 0033:0x7f417110809b
Code: 0f 1e fa 48 8b 05 ed bd 0c 00 64 c7 00 26 00 00 00 48 c7 c0 ff ff ff ff c3 66 0f 1f 44 00 00 f3 0f 1e fa b8 10 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d bd bd 0c 00 f7 d8 64 89 01 48
RSP: 002b:
00007ffdd8d1c268 EFLAGS:
00000246 ORIG_RAX:
0000000000000010
RAX:
ffffffffffffffda RBX:
0000562818a8ebc0 RCX:
00007f417110809b
RDX:
00007ffdd8d1c2a0 RSI:
00000000c05064a7 RDI:
0000000000000012
RBP:
00007ffdd8d1c2a0 R08:
0000562819012280 R09:
0000000000000007
R10:
0000000000000000 R11:
0000000000000246 R12:
00000000c05064a7
R13:
0000000000000012 R14:
0000000000000012 R15:
00007ffdd8d1c2a0
Modules linked in: nfsv4 dns_resolver nfs lockd grace fscache fuse vfat fat amdgpu intel_rapl sb_edac x86_pkg_temp_thermal intel_powerclamp coretemp kvm_intel kvm irqbypass crct10dif_pclmul chash gpu_sched crc32_pclmul snd_hda_codec_realtek ghash_clmulni_intel amd_iommu_v2 iTCO_wdt iTCO_vendor_support ttm snd_hda_codec_generic snd_hda_codec_hdmi ledtrig_audio snd_hda_intel drm_kms_helper snd_hda_codec intel_cstate snd_hda_core drm snd_hwdep snd_seq snd_seq_device intel_uncore snd_pcm intel_rapl_perf snd_timer snd soundcore ioatdma pcspkr intel_wmi_thunderbolt mxm_wmi i2c_i801 lpc_ich pcc_cpufreq auth_rpcgss sunrpc igb crc32c_intel i2c_algo_bit dca wmi hid_cherry analog gameport joydev
This patch is based on agd5f/drm-next-5.1-wip. This patch does not require
all of that, but agd5f/drm-next-5.1-wip contains at least one more dc_sink
counting fix that I could spot.
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 18 Feb 2019 22:32:12 +0000 (17:32 -0500)]
drm/amdgpu/powerplay: add missing breaks in polaris10_smumgr
This was noticed by Gustavo and his -Wimplicit-fallthrough
patches. However, in this case, I believe we should have breaks
rather than falling though, that said, in practice we should
never fall through in the first place so there should be no
change in behavior.
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Tue, 19 Feb 2019 04:20:54 +0000 (12:20 +0800)]
drm/amd/powerplay: fix the confusing ppfeature mask calculations
Simplify the ppfeature mask calculations.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
shaoyunl [Tue, 19 Feb 2019 21:02:11 +0000 (16:02 -0500)]
drm/powerplay: print current clock level when dpm is disabled on vg20
When DPM for the specific clock is disabled, driver should still print out
current clock info for rocm-smi support on vega20
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Fri, 22 Feb 2019 05:56:35 +0000 (15:56 +1000)]
Merge branch 'drm-next-5.1' of git://people.freedesktop.org/~agd5f/linux into drm-next
Fixes for 5.1:
amdgpu:
- Fix missing fw declaration after dropping old CI DPM code
- Fix debugfs access to registers beyond the MMIO bar size
- Fix context priority handling
- Add missing license on some new files
- Various cleanups and bug fixes
radeon:
- Fix missing break in CS parser for evergreen
- Various cleanups and bug fixes
sched:
- Fix entities with 0 run queues
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190221214134.3308-1-alexander.deucher@amd.com
Bas Nieuwenhuizen [Sun, 3 Feb 2019 00:45:24 +0000 (01:45 +0100)]
drm/amdgpu: Bump amdgpu version for context priority override.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 15 Feb 2019 22:20:04 +0000 (17:20 -0500)]
drm/amdgpu/powerplay: fix typo in BACO header guards
s/BOCO/BACO/g
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 15 Feb 2019 22:14:36 +0000 (17:14 -0500)]
drm/amdgpu/powerplay: fix return codes in BACO code
Use a proper return code rather than -1.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 11 Feb 2019 02:05:31 +0000 (21:05 -0500)]
drm/amdgpu: add missing license on baco files
Trivial.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Wed, 20 Feb 2019 02:16:30 +0000 (12:16 +1000)]
Merge https://gitlab.freedesktop.org/drm/msm into drm-next
On the display side, cleanups and fixes to enabled modifiers
(QCOM_COMPRESSED). And otherwise mostly misc fixes all around.
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGuZ5uBKpf=fHvKpTiD10nychuEY8rnE+HeRz0QMvtY5_A@mail.gmail.com
Dave Airlie [Wed, 20 Feb 2019 00:08:35 +0000 (10:08 +1000)]
Merge branch 'linux-5.1' of git://github.com/skeggsb/linux into drm-next
Various fixes/cleanups, along with initial support for SVM features
utilising HMM address-space mirroring and device memory migration.
There's a lot more work to do in these areas, both in terms of
features and efficiency, but these can slowly trickle in later down
the track.
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Ben Skeggs <skeggsb@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CACAvsv5bsB4rRY1Gqa_Bp_KAd-v_q1rGZ4nYmOAQhceL0Nr-Xg@mail.gmail.com
Ben Skeggs [Fri, 15 Feb 2019 05:50:16 +0000 (15:50 +1000)]
drm/nouveau/dmem: use dma addresses during migration copies
Removes the need for temporary VMM mappings.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 15 Feb 2019 04:45:57 +0000 (14:45 +1000)]
drm/nouveau/dmem: use physical vram addresses during migration copies
Removes the need for temporary VMM mappings.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 15 Feb 2019 00:35:05 +0000 (10:35 +1000)]
drm/nouveau/dmem: extend copy function to allow direct use of physical addresses
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Jérôme Glisse [Tue, 7 Aug 2018 20:13:16 +0000 (16:13 -0400)]
drm/nouveau/svm: new ioctl to migrate process memory to GPU memory
This add an ioctl to migrate a range of process address space to the
device memory. On platform without cache coherent bus (x86, ARM, ...)
this means that CPU can not access that range directly, instead CPU
will fault which will migrate the memory back to system memory.
This is behind a staging flag so that we can evolve the API.
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Jérôme Glisse [Thu, 26 Jul 2018 21:59:13 +0000 (17:59 -0400)]
drm/nouveau/dmem: device memory helpers for SVM
Device memory can be use in SVM, in which case we do not have any of
the existing buffer object. This commit add infrastructure to allow
use of device memory without nouveau_bo. Again this is a temporary
solution until a rework of GPU memory management.
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Ben Skeggs [Thu, 5 Jul 2018 02:57:12 +0000 (12:57 +1000)]
drm/nouveau/svm: initial support for shared virtual memory
This uses HMM to mirror a process' CPU page tables into a channel's page
tables, and keep them synchronised so that both the CPU and GPU are able
to access the same memory at the same virtual address.
While this code also supports Volta/Turing, it's only enabled for Pascal
GPUs currently due to channel recovery being unreliable right now on the
later GPUs.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 19 Feb 2019 07:21:48 +0000 (17:21 +1000)]
drm/nouveau: prepare for enabling svm with existing userspace interfaces
For a channel to make use of SVM features, it requires a different GPU MMU
configuration than we would normally use, which is not desirable to switch
to unless a client is actively going to use SVM.
In order to supporting SVM without more extensive changes to the userspace
interfaces, the SVM_INIT ioctl needs to replace the previous configuration
safely.
The only way we can currently do this safely, accounting for some unlikely
failure conditions, is to allocate the new VMM without destroying the last
one, and prioritising the SVM-enabled configuration in the code that cares.
This will get cleaned up again further down the track.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:48 +0000 (20:39 +1000)]
drm/nouveau/fault/gv100-: expose VoltaFaultBufferA
This nvclass exposes the replayable fault buffer, which will be used
by SVM to manage GPU page faults.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:48 +0000 (20:39 +1000)]
drm/nouveau/fault/gp100: expose MaxwellFaultBufferA
This nvclass exposes the replayable fault buffer, which will be used
by SVM to manage GPU page faults.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:48 +0000 (20:39 +1000)]
drm/nouveau/mmu/gp100-: support vmms with gcc/tex replayable faults enabled
Some GPU units are capable of supporting "replayable" page faults, where
the execution unit will wait for SW to fixup GPU page tables rather than
triggering a channel-fatal fault.
This feature isn't useful (it's harmful, even) unless something like HMM
is being used to manage events appearing in the replayable fault buffer,
so, it's disabled by default.
This commit allows a client to request it be enabled.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 9 Jul 2018 06:07:40 +0000 (16:07 +1000)]
drm/nouveau/mmu/gp100-: add privileged methods for fault replay/cancel
Host methods exist to do at least some of what we need, but we are not
currently pushing replay/cancels through a channel like UVM does as it's
not clear whether it's necessary in our case (UVM also updates PTEs with
the GPU).
UVM also pushes a software method for fault cancels on Pascal, seemingly
because the host methods don't appear to be sufficient. If/when we want
to push the replay/cancel on the GPU, we can re-purpose the cancellation
code here to implement that swmthd.
Keep it simple for now, until we figure out exactly what we need here.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 7 Jul 2018 02:35:48 +0000 (12:35 +1000)]
drm/nouveau/mmu: add a privileged method to directly manage PTEs
This provides a somewhat more direct method of manipulating the GPU page
tables, which will be required to support SVM.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 7 Jul 2018 08:29:20 +0000 (18:29 +1000)]
drm/nouveau/mmu: store mapped flag separately from memory pointer
This will be used to support a privileged client providing PTEs directly,
without a memory object to use as a reference.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 13 Jun 2018 06:25:53 +0000 (16:25 +1000)]
drm/nouveau/mmu: support initialisation of client-managed address-spaces
NVKM is currently responsible for managing the allocation of a client's
GPU address-space, but there's various use-cases (ie. HMM address-space
mirroring) where giving a client more direct control is desirable.
This commit allows for a VMM to be created where the area allocated for
NVKM is limited to a client-specified window, the remainder of address-
space is controlled directly by the client.
Leaving a window is necessary to support various internal requirements,
but also to support existing allocation interfaces as not all of the HW
is capable of working with a HMM allocation.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 5 Feb 2019 04:54:53 +0000 (14:54 +1000)]
drm/nouveau/gr/gf100-: expose method to determine current context
MMU will need access to this info.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 1 Feb 2019 03:52:50 +0000 (13:52 +1000)]
drm/nouveau/gr/gf100-: expose fecs methods for pausing ctxsw
MMU will need access to these.
v2. Apply fix from Rhys Kidd to send correct FECS method for STOP_CTXSW.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Colin Ian King [Tue, 12 Feb 2019 13:51:18 +0000 (13:51 +0000)]
drm/nouveau/falcon: fix a few indentation issues
There are a few statements that are indented incorrectly. Fix these.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/mmu/gf100-: virtualise setting pdb base address for invalidation
It appears that Pascal and newer need something different.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/mmu/gf100-: make mmu invalidate function more general
Will want to reuse this for fault replay/cancellation swmthds.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/gr/gf100-: store fecs/gpccs falcon pointers in substructures
Future changes will want to add some additional things here, keep them
grouped together.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/gr/gf100-: move fecs bind_pointer into a function
Makes the code somewhat less magic.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/gr/gf100-: remove some unnecessary reg writes
This is already done during golden context creation.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/gr/gf100-: move fecs elpg setup into functions
Makes the code somewhat less magic.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/gr/gf100-: move fecs discover_pm_image_size into a function
Makes the code somewhat less magic.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/gr/gf100-: move fecs discover_zcull_image_size into a function
Makes the code somewhat less magic.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/gr/gf100-: move fecs discover_image_size into a function
Makes the code somewhat less magic.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/gr/gf100-: move fecs set_watchdog_timeout method into a function
Makes the code somewhat less magic.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau: allow accelerated buffer moves even when gr isn't present
There's no need to avoid using copy engines if gr init fails for some
reason (usually missing FW, or incomplete bring-up).
It's not terribly useful for an end-user, but it'll slightly speed up
suspend/resume when saving fb contents, and allow for host/ce code to
be validated.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/kms/nv04-nv4x: move resume code to dispnv04 init hook
It has no relevance to the atomic path used by newer GPUs.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/kms/nv04-nv4x: move suspend code to dispnv04 fini hook
It has no relevance to the atomic path used by newer GPUs.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/kms/nv04-nv4x: move a bunch of pre-nv50 page flip code to dispnv04
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/kms: display destroy/init/fini hooks can be static
Swapped order of functions in dispnv04 to allow this, but no code changes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau: allocate kernel channel(s) before initialising display
Some of the pre-NV50 depends on SW methods to implement synchronisation
for page flips, and we want to move this setup out of common code, thus
we require the channel to have been allocation before display init.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/disp/gf119-: decode exception reason to human-readable string
We also change the error strings to match NVIDIA's naming.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/bios/init: handle INIT_GENERIC_CONDITION_ID_NO_PANEL_SEQ_DELAYS
As I currently understand it, this is related to features we have no
support for as of yet.
In theory, this change should be a noop, just without the warning.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/bios/init: label existing INIT_GENERIC_CONDITION types
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/secboot: fix missing newline in error messages
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/sec2/tu102-: instantiate SEC2 falcon
Required for ACR.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/sec2: utilise engine PRI address from TOP
Turing has its SEC2 instance in an alternate location, and this avoids
needing to duplicate the code here for it.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/nvdec/tu102-: instantiate NVDEC0 falcon
Required to run VPR scrubber binary as part of secboot.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/nvdec/gp102-: utilise engine PRI address from TOP
Turing has its NVDEC instances in an alternate location.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/gsp/gv100-: instantiate GSP falcon
We need this for Turing ACR, but it's present from Volta onwards.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/top/gv100-: translate entry for the GSP
So we're able to connect fault/interrupt handling to the GSP subdev.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/top: add function to lookup PRI address for devices
Will be using this in upcoming changes to avoid the need for entirely
new subdevs to deal with Turing register moves.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Feb 2019 12:28:13 +0000 (22:28 +1000)]
drm/nouveau/core: define GSP subdev
Exact meaning of the acronym is unknown, but we need this for Turing ACR.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Colin Ian King [Mon, 8 Oct 2018 20:47:36 +0000 (21:47 +0100)]
drm/nouveau: fix missing break in switch statement
The NOUVEAU_GETPARAM_PCI_DEVICE case is missing a break statement and falls
through to the following NOUVEAU_GETPARAM_BUS_TYPE case and may end up
re-assigning the getparam->value to an undesired value. Fix this by adding
in the missing break.
Detected by CoverityScan, CID#
1460507 ("Missing break in switch")
Fixes:
359088d5b8ec ("drm/nouveau: remove trivial cases of nvxx_device() usage")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Gustavo A. R. Silva [Tue, 29 Jan 2019 20:30:46 +0000 (14:30 -0600)]
drm/nouveau: mark expected switch fall-through
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
This patch fixes the following warning:
drivers/gpu/drm/nouveau/nouveau_bo.c:1434:53: warning: this statement may fall through [-Wimplicit-fallthrough=]
Warning level 3 was used: -Wimplicit-fallthrough=3
This patch is part of the ongoing efforts to enabling
-Wimplicit-fallthrough.
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Lyude Paul [Mon, 28 Jan 2019 21:03:50 +0000 (16:03 -0500)]
drm/nouveau: Don't WARN_ON VCPI allocation failures
This is much louder then we want. VCPI allocation failures are quite
normal, since they will happen if any part of the modesetting process is
interrupted by removing the DP MST topology in question. So just print a
debugging message on VCPI failures instead.
Signed-off-by: Lyude Paul <lyude@redhat.com>
Fixes:
f479c0ba4a17 ("drm/nouveau/kms/nv50: initial support for DP 1.2 multi-stream")
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: dri-devel@lists.freedesktop.org
Cc: nouveau@lists.freedesktop.org
Cc: <stable@vger.kernel.org> # v4.10+
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Colin Ian King [Wed, 19 Dec 2018 15:29:49 +0000 (15:29 +0000)]
drm/nouveau/pmu: don't print reply values if exec is false
Currently the uninitialized values in the array reply are printed out
when exec is false and nvkm_pmu_send has not updated the array. Avoid
confusion by only dumping out these values if they have been actually
updated.
Detected by CoverityScan, CID#
1271291 ("Uninitialized scaler variable")
Fixes:
ebb58dc2ef8c ("drm/nouveau/pmu: rename from pwr (no binary change)")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Colin Ian King [Sun, 25 Nov 2018 17:09:18 +0000 (17:09 +0000)]
drm/nouveau/bios/ramcfg: fix missing parentheses when calculating RON
Currently, the expression for calculating RON is always going to result
in zero no matter the value of ram->mr[1] because the ! operator has
higher precedence than the shift >> operator. I believe the missing
parentheses around the expression before appying the ! operator will
result in the desired result.
[ Note, not tested ]
Detected by CoveritScan, CID#
1324005 ("Operands don't affect result")
Fixes:
c25bf7b6155c ("drm/nouveau/bios/ramcfg: Separate out RON pull value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Colin Ian King [Tue, 4 Sep 2018 15:23:33 +0000 (16:23 +0100)]
drm/nouveau/bios/dp: make array vsoff static, shrinks object size
Don't populate the array vsoff on the stack but instead make it
static. Makes the object code smaller by 67 bytes:
Before:
text data bss dec hex filename
5753 112 0 5865 16e9 .../nouveau/nvkm/subdev/bios/dp.o
After:
text data bss dec hex filename
5622 176 0 5798 16a6 .../nouveau/nvkm/subdev/bios/dp.o
(gcc version 8.2.0 x86_64)
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 17 Jan 2019 02:13:00 +0000 (12:13 +1000)]
drm/nouveau/ce/tu102: rename implementation from tu104
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 17 Jan 2019 02:11:47 +0000 (12:11 +1000)]
drm/nouveau/fifo/tu102: rename implementation from tu104
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 17 Jan 2019 02:10:06 +0000 (12:10 +1000)]
drm/nouveau/disp/tu102: rename implementation from tu104
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 17 Jan 2019 02:07:23 +0000 (12:07 +1000)]
drm/nouveau/fault/tu102: rename implementation from tu104
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 17 Jan 2019 02:06:01 +0000 (12:06 +1000)]
drm/nouveau/bar/tu102: rename implementation from tu104
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 17 Jan 2019 02:04:02 +0000 (12:04 +1000)]
drm/nouveau/mmu/tu102: rename implementation from tu104
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 17 Jan 2019 01:46:39 +0000 (11:46 +1000)]
drm/nouveau/mc/tu102: rename implementation from tu104
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 17 Jan 2019 01:41:53 +0000 (11:41 +1000)]
drm/nouveau/devinit/tu102: rename implementation from tu104
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ilia Mirkin [Sun, 13 Jan 2019 22:50:10 +0000 (17:50 -0500)]
drm/nouveau/volt/gf117: fix speedo readout register
GF117 appears to use the same register as GK104 (but still with the
general Fermi readout mechanism).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108980
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Christian König [Wed, 30 Jan 2019 12:41:05 +0000 (13:41 +0100)]
drm/amdgpu: partial revert cleanup setting bulk_movable v2
We still need to set bulk_movable to false when new BOs are added or removed.
v2: also set it to false on removal
Signed-off-by: Christian König <christian.koenig@amd.com>
Tested-by: StDenis, Tom <Tom.StDenis@amd.com>
Tested-by: Przemek Socha <soprwa@gmail.com>
Reviewed-by: Zhou, David(ChunMing) <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 28 Jan 2019 12:41:58 +0000 (13:41 +0100)]
drm/amdgpu: cleanup setting bulk_movable
We only need to set this to false now when BOs are removed from the LRU.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Gustavo A. R. Silva [Tue, 19 Feb 2019 18:55:09 +0000 (12:55 -0600)]
drm/amd/powerplay/smu10_hwmgr: use struct_size() in kzalloc()
One of the more common cases of allocation size calculations is finding
the size of a structure that has a zero-sized array at the end, along
with memory for some number of elements for that array. For example:
struct foo {
int stuff;
struct boo entry[];
};
size = sizeof(struct foo) + count * sizeof(struct boo);
instance = kzalloc(size, GFP_KERNEL);
Instead of leaving these open-coded and prone to type mistakes, we can
now use the new struct_size() helper:
instance = kzalloc(struct_size(instance, entry, count), GFP_KERNEL);
Notice that, in this case, variable table_size is not necessary, hence
it is removed.
This code was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Gustavo A. R. Silva [Tue, 19 Feb 2019 18:42:32 +0000 (12:42 -0600)]
drm/amd/powerplay/smu8_hwmgr: use struct_size() in kzalloc()
One of the more common cases of allocation size calculations is finding
the size of a structure that has a zero-sized array at the end, along
with memory for some number of elements for that array. For example:
struct foo {
int stuff;
struct boo entry[];
};
size = sizeof(struct foo) + count * sizeof(struct boo);
instance = kzalloc(size, GFP_KERNEL);
Instead of leaving these open-coded and prone to type mistakes, we can
now use the new struct_size() helper:
instance = kzalloc(struct_size(instance, entry, count), GFP_KERNEL);
Notice that, in this case, variable table_size is not necessary, hence
it is removed.
This code was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 25 Jan 2019 19:40:14 +0000 (14:40 -0500)]
drm/amd/display: Refactor for setup periodic interrupt.
[Why]
Current periodic interrupt start point calc in optc
is not clear.
[How]
1. DM convert delta time to lines number and dc will calculate the
start position as per lines number and interrupt type.
2. hwss calculates the start point as per line offset.
3. optc programs vertical interrupts register as per start point
and interrupt source.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicholas Kazlauskas [Fri, 25 Jan 2019 20:23:09 +0000 (15:23 -0500)]
drm/amd/display: Clear stream->mode_changed after commit
[Why]
The stream->mode_changed flag can persist in the following sequence
of atomic commits:
Commit 1:
Enable CRTC0 (mode_changed = true), Enable CRTC1 (mode_changed = true)
Commit 2:
Disable CRTC1 (mode_changed = false)
In this sequence we want to keep the exiting CRTC0 but it's not in the
atomic state for the commit since it hasn't been modified. In this case
the stream->mode_changed flag persists as true and we don't re-program
the planes for the existing stream.
[How]
The flag needs to be cleared and it makes the most sense to do it within
DC after the state has been committed. Nothing following dc_commit_state
should think that the stream's mode has changed.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicholas Kazlauskas [Fri, 25 Jan 2019 20:30:24 +0000 (15:30 -0500)]
drm/amd/display: Do cursor updates after stream updates
[Why]
Cursor updates used to happen after vblank/flip/stream updates before
the stream update refactor. They now happen before stream updates
which means that they're not going to be synced with fb changes
and that they're going to programmed for pipes that we're disabling
within the same commit.
[How]
Move them after stream updates.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: David Francis <David.Francis@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicholas Kazlauskas [Tue, 22 Jan 2019 19:09:34 +0000 (14:09 -0500)]
drm/amd/display: Fix update type mismatches in atomic check
[Why]
Whenever a stream or plane is added or removed from the context the
pointer will change from old to new. We set lock and validation
needed in these cases. But not all of these cases match update_type
from dm_determine_update_type_for_commit - an example being overlay
plane updates.
There are warnings for a few of these cases that should be fixed.
[How]
We can closer align to DC (and lock_and_validation_needed) by
comparing stream and plane pointers.
Since the old stream/old plane state is never freed until sometime
after the commit tail work finishes we are guaranteed to never get
back the same block of memory when we remove and create a stream or
plane state in the same commit.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicholas Kazlauskas [Mon, 21 Jan 2019 14:44:47 +0000 (09:44 -0500)]
drm/amd/display: Don't expose support for DRM_FORMAT_RGB888
[Why]
This format isn't supported in DC and some IGT tests fail since we
expose support for it.
[How]
Remove it.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicholas Kazlauskas [Fri, 18 Jan 2019 18:17:55 +0000 (13:17 -0500)]
drm/amd/display: Fix wrong z-order when updating overlay planes
[Why]
If a commit updates an overlay plane via the legacy plane IOCTL
then the only plane in the state will be the overlay plane.
Overlay planes need to be added first to the DC context, but in the
scenario above the plane will be added last. This will result in wrong
z-order during rendering.
[How]
If any non-cursor plane has been updated then the rest of the
non-cursor planes should be added to the CRTC state.
The cursor plane doesn't need to be included for stream updates and
locking it will cause performance issues. It should be ignored.
DC requires that the surface count passed during stream updates
be the number of surfaces currently on the stream to enable fast
updates. This previously wasn't the case without this patch, so this
also allows this optimization to occur.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Josip Pavic [Wed, 30 Jan 2019 21:23:47 +0000 (16:23 -0500)]
drm/amd/display: send pipe set command to dmcu when backlight is set
[Why]
Previously, a change removed code that would send a pipe set command
to dmcu each time the backlight was set, as it was thought to be
superfluous. However, it is possible for the backlight to be set
before a valid pipe has been set, which causes DMCU to hang after a
DPMS restore on some systems.
[How]
Send a pipe set command to DMCU prior to setting the backlight.
Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>