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7 years ago[ARM] GlobalISel: Purge G_SEQUENCE
Diana Picus [Wed, 7 Jun 2017 12:35:05 +0000 (12:35 +0000)]
[ARM] GlobalISel: Purge G_SEQUENCE

According to the commit message from r296921, G_MERGE_VALUES and
G_INSERT are to be preferred over G_SEQUENCE. Therefore, stop generating
G_SEQUENCE in the ARM backend and remove the code dealing with it.

This boils down to the code breaking up double values for the soft float
calling convention. Use G_MERGE_VALUES + G_UNMERGE_VALUES instead of
G_SEQUENCE + G_EXTRACT for it. This maps very nicely to VMOVDRR +
VMOVRRD and simplifies the code in the instruction selector.

There's one occurence of G_SEQUENCE left in arm-irtranslator.ll, but
that is part of the target-independent code for translating constant
structs. Therefore, it is beyond the scope of this commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304902 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Eliminate integer compare instructions - vol. 3
Nemanja Ivanovic [Wed, 7 Jun 2017 12:23:41 +0000 (12:23 +0000)]
[PowerPC] Eliminate integer compare instructions - vol. 3

Adds handling for i32 SETNE comparison (both sign and zero extended).

Differential Revision: https://reviews.llvm.org/D33718

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304901 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FileCheck] Don't scan past the closing CHECK-DAG for CHECK-NOT inside CHECK-DAG
Benjamin Kramer [Wed, 7 Jun 2017 12:06:45 +0000 (12:06 +0000)]
[FileCheck] Don't scan past the closing CHECK-DAG for CHECK-NOT inside CHECK-DAG

If there's enough data in fron of it the skipped region would just
become arbitrarily large, and we scan for the CHECK-NOT everywhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304900 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] GlobalISel: Support G_XOR
Diana Picus [Wed, 7 Jun 2017 11:57:30 +0000 (11:57 +0000)]
[ARM] GlobalISel: Support G_XOR

Same as the other binary operators:
- legalize to 32 bits
- map to GPRs
- select to EORrr via TableGen'erated code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304898 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoevert "[mips] Fix test mips64fpldst.ll with machine verifier enabled"
Simon Dardis [Wed, 7 Jun 2017 11:21:37 +0000 (11:21 +0000)]
evert "[mips] Fix test mips64fpldst.ll with machine verifier enabled"

This reverts commit r301394. It broke some internal buildbots, reverting
while the issue is being investigated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304896 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Fix an issue with PEXTRW/PEXTRB indices during shuffle combining
Simon Pilgrim [Wed, 7 Jun 2017 10:30:35 +0000 (10:30 +0000)]
[X86][SSE] Fix an issue with PEXTRW/PEXTRB indices during shuffle combining

We were checking that the index was in range of the destination vector type, not the (larger) source vector type

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304894 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] GlobalISel: Support G_OR
Diana Picus [Wed, 7 Jun 2017 10:14:23 +0000 (10:14 +0000)]
[ARM] GlobalISel: Support G_OR

Same as the other binary operators:
- legalize to 32 bits
- map to GPRs
- select ORRrr thanks to TableGen'erated code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304890 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Linker] Remove llc usage from link-arm-and-thumb.ll test case.
Florian Hahn [Wed, 7 Jun 2017 09:59:22 +0000 (09:59 +0000)]
[Linker] Remove llc usage from link-arm-and-thumb.ll test case.

This fixes a buildbot failure when the ARM target is not built.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304888 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] GlobalISel: Support G_AND
Diana Picus [Wed, 7 Jun 2017 09:17:41 +0000 (09:17 +0000)]
[ARM] GlobalISel: Support G_AND

This is identical to the support for the other binary operators:
- widen to s32
- map into GPR
- select ANDrr (via TableGen'erated code)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304885 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Linker] Remove warning when linking ARM and Thumb IR modules.
Florian Hahn [Wed, 7 Jun 2017 09:17:01 +0000 (09:17 +0000)]
[Linker] Remove warning when linking ARM and Thumb IR modules.

Summary:
This patch updates Triple::isCompatibleWith to make armxx and thumbxx
triples compatible, as long as the subarch, vendor, os, envorionment and
object format match. Thumb/ARM code generation should be controlled
using the thumb-mode per-function target feature rather than by the
triple to allow mixing Thumb and ARM functions.

D33448 updates Clang's codegen to add thumb-mode for all functions with
armxx or thumbxx triples.

Reviewers: echristo, t.p.northover, rafael, kristof.beyls, rengolin, tejohnson

Reviewed By: tejohnson

Subscribers: rinon, eugenis, pcc, srhines, aemerson, mehdi_amini, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D33287

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304884 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Create relocations for unconditional branches.
Florian Hahn [Wed, 7 Jun 2017 08:54:47 +0000 (08:54 +0000)]
[ARM] Create relocations for unconditional branches.

Summary:
Relocations are required for unconditional branches to function symbols with
different execution mode. Without this patch, incorrect branches are
generated for tail calls between functions with different execution
mode.

Reviewers: peter.smith, rafael, echristo, kristof.beyls

Reviewed By: peter.smith

Subscribers: aemerson, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D33898

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304882 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdjust module.modulemap after r304864
Eric Fiselier [Wed, 7 Jun 2017 08:05:31 +0000 (08:05 +0000)]
Adjust module.modulemap after r304864

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304878 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Fix the documentation for isOneValue. NFC
Craig Topper [Wed, 7 Jun 2017 07:40:43 +0000 (07:40 +0000)]
[APInt] Fix the documentation for isOneValue. NFC

I copy and pasted from isNullValue and forgot to update it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304877 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine][InstSimplify] Use APInt::isNullValue/isOneValue to reduce compiled...
Craig Topper [Wed, 7 Jun 2017 07:40:37 +0000 (07:40 +0000)]
[InstCombine][InstSimplify] Use APInt::isNullValue/isOneValue to reduce compiled code for comparing APInts with 0 and 1. NFC

These methods are specifically optimized to only counting leading zeros without an additional uint64_t compare.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304876 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Fix two asserts that were accidentally checking that an APInt pointer...
Craig Topper [Wed, 7 Jun 2017 07:40:29 +0000 (07:40 +0000)]
[InstCombine] Fix two asserts that were accidentally checking that an APInt pointer is non-zero instead of checking that the APInt self is non-zero.

I believe this code used to use APInt references which would have worked. But then they were changed to pointers to allow m_APInt to be used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304875 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDisable all warning for AlignOfTest.cpp.
Galina Kistanova [Wed, 7 Jun 2017 06:30:27 +0000 (06:30 +0000)]
Disable all warning for AlignOfTest.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304871 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUpdate libdeps to add BinaryFormat, introduced in r304864.
NAKAMURA Takumi [Wed, 7 Jun 2017 04:48:49 +0000 (04:48 +0000)]
Update libdeps to add BinaryFormat, introduced in r304864.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304869 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReorder and reformat.
NAKAMURA Takumi [Wed, 7 Jun 2017 04:48:45 +0000 (04:48 +0000)]
Reorder and reformat.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304868 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd dependency from LibDriver to BinaryFormat.
Zachary Turner [Wed, 7 Jun 2017 04:39:50 +0000 (04:39 +0000)]
Add dependency from LibDriver to BinaryFormat.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304867 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd dependency from AsmParser to BinaryFormat.
Zachary Turner [Wed, 7 Jun 2017 04:24:33 +0000 (04:24 +0000)]
Add dependency from AsmParser to BinaryFormat.

This breaks the MinGW build, but not other builds for some reason.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304866 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd #include <system_error>
Zachary Turner [Wed, 7 Jun 2017 03:55:31 +0000 (03:55 +0000)]
Add #include <system_error>

Hopefully this unbreaks the bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304865 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove Object format code to lib/BinaryFormat.
Zachary Turner [Wed, 7 Jun 2017 03:48:56 +0000 (03:48 +0000)]
Move Object format code to lib/BinaryFormat.

This creates a new library called BinaryFormat that has all of
the headers from llvm/Support containing structure and layout
definitions for various types of binary formats like dwarf, coff,
elf, etc as well as the code for identifying a file from its
magic.

Differential Revision: https://reviews.llvm.org/D33843

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304864 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LazyValueInfo] Remove redundant calls to ConstantRange::contains. The same exact...
Craig Topper [Wed, 7 Jun 2017 00:58:09 +0000 (00:58 +0000)]
[LazyValueInfo] Remove redundant calls to ConstantRange::contains. The same exact call was made in the if above and we already know it returned true. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304857 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Constants] Use isUIntN/isIntN from MathExtras instead of reimplementing the same...
Craig Topper [Wed, 7 Jun 2017 00:58:05 +0000 (00:58 +0000)]
[Constants] Use isUIntN/isIntN from MathExtras instead of reimplementing the same code. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304856 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Constants] Use APInt::isNullValue/isOneValue/uge to simplify some code and take...
Craig Topper [Wed, 7 Jun 2017 00:58:02 +0000 (00:58 +0000)]
[Constants] Use APInt::isNullValue/isOneValue/uge to simplify some code and take advantage of APInt optimizations. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304855 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Add a isOneValue method that can determine if a number is 1 by only using...
Craig Topper [Wed, 7 Jun 2017 00:57:57 +0000 (00:57 +0000)]
[APInt] Add a isOneValue method that can determine if a number is 1 by only using getActiveBits/countLeadingZeros

Previously you would have to use operator==(uint64_t) which does the getActiveBits call and a uint64_t comparison. But we can get all we need to know from the getActiveBits call.

This method will be used in another commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304854 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTry to work around possible bugs in version of Shpinx on buildserver.
Tony Tye [Wed, 7 Jun 2017 00:46:08 +0000 (00:46 +0000)]
Try to work around possible bugs in version of Shpinx on buildserver.
Builds sucessfully with Sphinx v1.5.5

Differential Revision: https://reviews.llvm.org/D33736

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304853 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIntroduce the new feature "abi-breaking-checks" to satisfy -reverse-iterate in llvm...
NAKAMURA Takumi [Wed, 7 Jun 2017 00:22:52 +0000 (00:22 +0000)]
Introduce the new feature "abi-breaking-checks" to satisfy -reverse-iterate in llvm/test/Transforms/Util/PredicateInfo/

A few tests in llvm/test/Transforms/Util/PredicateInfo/ are using -reverse-iterate.
The option -reverse-iterate is enabled with +Asserts in usual cases, but it can be turned on/off regardless of LLVM_ENABLE_ASSERTIONS.

I wonder if this were incompatible to https://reviews.llvm.org/D33908 (r304757).

Differential Revision: https://reviews.llvm.org/D33854

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304851 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InlineSpiller] Only account for real spills in the hoisting logic
Quentin Colombet [Wed, 7 Jun 2017 00:22:07 +0000 (00:22 +0000)]
[InlineSpiller] Only account for real spills in the hoisting logic

Spills of undef values shouldn't impact the placement of the relevant
spills. Drive by review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304850 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CGP / PowerPC] use direct compares if there's only one load per block in memcmp...
Sanjay Patel [Wed, 7 Jun 2017 00:17:08 +0000 (00:17 +0000)]
[CGP / PowerPC] use direct compares if there's only one load per block in memcmp() expansion

I'd like to enable CGP memcmp expansion for x86, but the output from CGP would regress the
special cases (memcmp(x,y,N) != 0 for N=1,2,4,8,16,32 bytes) that we already handle.

I'm not sure if we'll actually be able to produce the optimal code given the block-at-a-time
limitation in the DAG. We might have to just avoid those special-cases here in CGP. But
regardless of that, I think this is a win for the more general cases.

http://rise4fun.com/Alive/cbQ

Differential Revision: https://reviews.llvm.org/D33963

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304849 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd documentation for various aspects of the AMDGPU backend.
Tony Tye [Wed, 7 Jun 2017 00:08:35 +0000 (00:08 +0000)]
Add documentation for various aspects of the AMDGPU backend.
Remove extra tabs.
Builds sucessfully with Sphinx v1.5.5

Differential Revision: https://reviews.llvm.org/D33736

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304848 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix uninitialized read.
Zachary Turner [Tue, 6 Jun 2017 23:54:23 +0000 (23:54 +0000)]
Fix uninitialized read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304846 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCCIterator] Garbage collect dead code. NFC.
Davide Italiano [Tue, 6 Jun 2017 23:41:12 +0000 (23:41 +0000)]
[SCCIterator] Garbage collect dead code. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304845 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIntroduce -brief command line option to llvm-dwarfdump
Adrian Prantl [Tue, 6 Jun 2017 23:28:45 +0000 (23:28 +0000)]
Introduce -brief command line option to llvm-dwarfdump

This patch introduces a new command line option, called brief, to
llvm-dwarfdump.  When -brief is used, the attribute forms for the
.debug_info section will not be emitted to output.

Patch by Spyridoula Gravani!

rdar://problem/21474365
Differential Revision: https://reviews.llvm.org/D33867

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304844 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix the includes in lib/Fuzzer on Windows that have ordering
Chandler Carruth [Tue, 6 Jun 2017 23:28:01 +0000 (23:28 +0000)]
Fix the includes in lib/Fuzzer on Windows that have ordering
dependencies and add comments to tell future maintainers about those
requirements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304843 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CFLAA] Remove unused include. NFCI.
Davide Italiano [Tue, 6 Jun 2017 23:16:19 +0000 (23:16 +0000)]
[CFLAA] Remove unused include. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304842 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings...
Eugene Zelenko [Tue, 6 Jun 2017 22:22:41 +0000 (22:22 +0000)]
[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304839 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] auto-generate full checks and increase test coverage
Sanjay Patel [Tue, 6 Jun 2017 22:06:07 +0000 (22:06 +0000)]
[PowerPC] auto-generate full checks and increase test coverage

3 of the tests were testing exactly the same thing: memcmp(x, y, 16) != 0.
I changed that to test 4, 7, and 16 bytes, so we can see how those differ.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304838 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAllow VersionPrinter to print to arbitrary raw_ostreams
Dimitry Andric [Tue, 6 Jun 2017 21:54:04 +0000 (21:54 +0000)]
Allow VersionPrinter to print to arbitrary raw_ostreams

Summary:
I would like to add printing of registered targets to clang's version
information.  For this to work correctly, the VersionPrinter logic in
CommandLine.cpp should support printing to arbitrary raw_ostreams,
instead of always defaulting to outs().

Add a raw_ostream& parameter to the function pointer type used for
VersionPrinter, and while doing so, introduce a typedef for convenience.

Note that VersionPrinter::print() will still default to using outs(),
the clang part will necessarily go into a separate review.

Reviewers: beanz, chandlerc, dberris, mehdi_amini, zturner

Reviewed By: mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D33899

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304835 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdded tests for X86InterleavedStore.
Evgeny Stupachenko [Tue, 6 Jun 2017 21:08:00 +0000 (21:08 +0000)]
Added tests for X86InterleavedStore.

Reviewers: RKSimon, DavidKreitzer

Differential Revision: https://reviews.llvm.org/D33684

Patch by: Aleen Farhana <Farhana.aleen@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304834 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoGlobalsModRef+OptNone: Don't prove readnone/other properties from an optnone function
David Blaikie [Tue, 6 Jun 2017 20:51:15 +0000 (20:51 +0000)]
GlobalsModRef+OptNone: Don't prove readnone/other properties from an optnone function

Seems like at least one reasonable interpretation of optnone is that the
optimizer never "looks inside" a function. This fix is consistent with
that interpretation.

Specifically this came up in the situation:

f3 calls f2 calls f1
f2 is always_inline
f1 is optnone

The application of readnone to f1 (& thus to f2) caused the inliner to
kill the call to f2 as being trivially dead (without even checking the
cost function, as it happens - not sure if that's also a bug).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304833 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd documentation for various aspects of the AMDGPU backend.
Tony Tye [Tue, 6 Jun 2017 20:31:59 +0000 (20:31 +0000)]
Add documentation for various aspects of the AMDGPU backend.

Differential Revision: https://reviews.llvm.org/D33736

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304831 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CGP] fix formatting/typos in MemCmpExpansion; NFC
Sanjay Patel [Tue, 6 Jun 2017 20:30:47 +0000 (20:30 +0000)]
[CGP] fix formatting/typos in MemCmpExpansion; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304830 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SLP] Change extension of the test, NFC.
Alexey Bataev [Tue, 6 Jun 2017 20:27:45 +0000 (20:27 +0000)]
[SLP] Change extension of the test, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304829 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SLP] Add a test for fix of PR32164, NFC.
Alexey Bataev [Tue, 6 Jun 2017 20:11:35 +0000 (20:11 +0000)]
[SLP] Add a test for fix of PR32164, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304826 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollc: Add ability to parse mir from stdin
Matthias Braun [Tue, 6 Jun 2017 20:06:57 +0000 (20:06 +0000)]
llc: Add ability to parse mir from stdin

- Add -x <language> option to switch between IR and MIR inputs.
- Change MIR parser to read from stdin when filename is '-'.
- Add a simple mir roundtrip test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304825 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix PR23384 (part 3 of 3)
Evgeny Stupachenko [Tue, 6 Jun 2017 20:04:16 +0000 (20:04 +0000)]
Fix PR23384 (part 3 of 3)

Summary:
The patch makes instruction count the highest priority for
 LSR solution for X86 (previously registers had highest priority).

Reviewers: qcolombet

Differential Revision: http://reviews.llvm.org/D30562

From: Evgeny Stupachenko <evstupac@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304824 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAG] remove duplicated code for isOnlyUsedInZeroEqualityComparison(); NFCI
Sanjay Patel [Tue, 6 Jun 2017 19:40:09 +0000 (19:40 +0000)]
[DAG] remove duplicated code for isOnlyUsedInZeroEqualityComparison(); NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304822 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LVI Printer] Rely on the LVI analysis functions rather than the LVI cache
Anna Thomas [Tue, 6 Jun 2017 19:25:31 +0000 (19:25 +0000)]
[LVI Printer] Rely on the LVI analysis functions rather than the LVI cache

Summary:
LVIPrinter pass was previously relying on the LVICache. We now directly call the
the LVI functions which solves the value if the LVI information is not already
available in the cache. This has 2 benefits over the printing of LVI cache:
1. higher coverage (i.e. catches errors) in LVI code when cache value is
invalidated.
2. relies on the core functions, and not dependent on the LVI cache (which may
be scrapped at some point).
It would still catch any cache invalidation errors, since we first go through
the cache.

Reviewers: reames, dberlin, sanjoy

Reviewed by: reames

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32135

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304819 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] MC: Refactor relocation handling
Sam Clegg [Tue, 6 Jun 2017 19:15:05 +0000 (19:15 +0000)]
[WebAssembly] MC: Refactor relocation handling

The change cleans up and unifies the handling of relocation
entries in WasmObjectWriter.  Type index relocation no longer
need to be handled separately.

The only externally visible change should be that type
index relocations are no longer grouped at the end.

Differential Revision: https://reviews.llvm.org/D33918

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304816 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIRPrinter: Avoid assert() when printing empty INLINEASM strings.
Matthias Braun [Tue, 6 Jun 2017 19:00:58 +0000 (19:00 +0000)]
MIRPrinter: Avoid assert() when printing empty INLINEASM strings.

CodeGen uses MO_ExternalSymbol to represent the inline assembly strings.
Empty strings for symbol names appear to be invalid. For now just
special case the output code to avoid hitting an `assert()` in
`printLLVMNameWithoutPrefix()`.

This fixes https://llvm.org/PR33317

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304815 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUnitTests: Do not use assert() for error checking
Matthias Braun [Tue, 6 Jun 2017 19:00:54 +0000 (19:00 +0000)]
UnitTests: Do not use assert() for error checking

Use `if (!X) report_fatal_error()` instead of `assert()` for the ad-hoc
error handling in two unittests. This reduces unnecessary differences
between release and debug builds (motivated by unused variable warnings
triggered in release builds).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304814 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU/NFC: Move amdgpu code object metadata to support
Konstantin Zhuravlyov [Tue, 6 Jun 2017 18:35:50 +0000 (18:35 +0000)]
AMDGPU/NFC: Move amdgpu code object metadata to support

Differential Revision: https://reviews.llvm.org/D31437

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304812 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LoopIdiom] Move X86 specific atomic memcpy test to the X86 directory
Anna Thomas [Tue, 6 Jun 2017 17:46:41 +0000 (17:46 +0000)]
[LoopIdiom] Move X86 specific atomic memcpy test to the X86 directory

Patch https://reviews.llvm.org/rL304806 was causing failures in Aarch64
and multiple other targets since the test should be run on X86 only.

Specifying the target triple is not enough. Moving the testcase to the
X86 target directory in LoopIdiom.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304809 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNewGVN: Fix PR/33187. This is a bug caused by two things:
Daniel Berlin [Tue, 6 Jun 2017 17:15:28 +0000 (17:15 +0000)]
NewGVN: Fix PR/33187.   This is a bug caused by two things:
1. When there is no perfect iteration order, we can't let phi nodes
put themselves in terms of things that come later in the iteration
order, or we will endlessly cycle (the normal RPO algorithm clears the
hashtable to avoid this issue).
2. We are sometimes erasing the wrong expression (causing pessimism)
because our equality says loads and stores are the same.
We introduce an exact equality function and use it when erasing to
make sure we erase only identical expressions, not equivalent ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304807 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Atomics][LoopIdiom] Recognize unordered atomic memcpy
Anna Thomas [Tue, 6 Jun 2017 16:45:25 +0000 (16:45 +0000)]
[Atomics][LoopIdiom] Recognize unordered atomic memcpy

Summary:
Expanding the loop idiom test for memcpy to also recognize
unordered atomic memcpy. The only difference for recognizing
an unordered atomic memcpy and instead of a normal memcpy is
that the loads and/or stores involved are unordered atomic operations.

Background:  http://lists.llvm.org/pipermail/llvm-dev/2017-May/112779.html

Patch by Daniel Neilson!

Reviewers: reames, anna, skatkov

Reviewed By: reames, anna

Subscribers: llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D33243

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304806 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AMDGPU] Return correct value from SDWA pass
Stanislav Mekhanoshin [Tue, 6 Jun 2017 16:42:30 +0000 (16:42 +0000)]
[AMDGPU] Return correct value from SDWA pass

Differential Revision: https://reviews.llvm.org/D33927

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304805 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Remove unused methods from MCWasmObjectTargetWriter
Sam Clegg [Tue, 6 Jun 2017 16:38:59 +0000 (16:38 +0000)]
[WebAssembly] Remove unused methods from MCWasmObjectTargetWriter

These methods looks like they were originally came from
MCELFObjectTargetWriter but they are never called by the
WasmObjectWriter.

Remove these methods meant the declaration of WasmRelocationEntry
could also move into the cpp file.

Differential Revision: https://reviews.llvm.org/D33905

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304804 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] Add madd4 subtarget feature
Petar Jovanovic [Tue, 6 Jun 2017 15:33:01 +0000 (15:33 +0000)]
[mips] Add madd4 subtarget feature

Addition of a feature and a predicate used to control generation of madd.fmt
and similar instructions.

Patch by Stefan Maksimovic.

Differential Revision: https://reviews.llvm.org/D33400

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304801 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[IRCE] Canonicalize pre/post loops after the blocks are added into parent loop
Anna Thomas [Tue, 6 Jun 2017 14:54:01 +0000 (14:54 +0000)]
[IRCE] Canonicalize pre/post loops after the blocks are added into parent loop

Summary:
We were canonizalizing the pre loop (into loop-simplify form) before
the post loop blocks were added into parent loop. This is incorrect when IRCE is
done on a subloop. The post-loop blocks are created, but not yet added to the
parent loop. So, loop-simplification on the pre-loop incorrectly updates
LoopInfo.

This patch corrects the ordering so that pre and post loop blocks are added to
parent loop (if any), and then the loops are canonicalized to LCSSA and
LoopSimplifyForm.

Reviewers: reames, sanjoy, apilipenko

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D33846

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304800 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix spelling mistake in getRThroughput static function names. NFCI.
Simon Pilgrim [Tue, 6 Jun 2017 14:25:34 +0000 (14:25 +0000)]
Fix spelling mistake in getRThroughput static function names. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304799 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX1] Split 256-bit vector non-temporal FastISel loads to keep it non-temporal...
Simon Pilgrim [Tue, 6 Jun 2017 14:18:39 +0000 (14:18 +0000)]
[X86][AVX1] Split 256-bit vector non-temporal FastISel loads to keep it non-temporal (PR32744)

Extension to D33728

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304798 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU/GlobalISel: Mark 32-bit G_ICMP as legal
Tom Stellard [Tue, 6 Jun 2017 14:16:50 +0000 (14:16 +0000)]
AMDGPU/GlobalISel: Mark 32-bit G_ICMP as legal

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D33890

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304797 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix another ordering constraint with windows.h and comment about
Chandler Carruth [Tue, 6 Jun 2017 12:43:20 +0000 (12:43 +0000)]
Fix another ordering constraint with windows.h and comment about
a revers constraint that we got right (by chance).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304792 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix several more missing headers, all of these were hidden by "lucky"
Chandler Carruth [Tue, 6 Jun 2017 12:31:55 +0000 (12:31 +0000)]
Fix several more missing headers, all of these were hidden by "lucky"
include ordering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304790 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd a missing #include to a header.
Chandler Carruth [Tue, 6 Jun 2017 12:21:27 +0000 (12:21 +0000)]
Add a missing #include to a header.

This was masked by lucky #include ordering in the .cpp files and
uncovered when we moved to the canonical ordering because the primary
header was included first (yay!). Unfortunately, I can't build this
locally so took a build-bot iteration to find it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304789 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix one place where I missed a commented requirement for a particular
Chandler Carruth [Tue, 6 Jun 2017 12:11:24 +0000 (12:11 +0000)]
Fix one place where I missed a commented requirement for a particular
include ordering.

I've changed the structure so that clang-format will preserve this going
forward.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304788 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSort the remaining #include lines in include/... and lib/....
Chandler Carruth [Tue, 6 Jun 2017 11:49:48 +0000 (11:49 +0000)]
Sort the remaining #include lines in include/... and lib/....

I did this a long time ago with a janky python script, but now
clang-format has built-in support for this. I fed clang-format every
line with a #include and let it re-sort things according to the precise
LLVM rules for include ordering baked into clang-format these days.

I've reverted a number of files where the results of sorting includes
isn't healthy. Either places where we have legacy code relying on
particular include ordering (where possible, I'll fix these separately)
or where we have particular formatting around #include lines that
I didn't want to disturb in this patch.

This patch is *entirely* mechanical. If you get merge conflicts or
anything, just ignore the changes in this patch and run clang-format
over your #include lines in the files.

Sorry for any noise here, but it is important to keep these things
stable. I was seeing an increasing number of patches with irrelevant
re-ordering of #include lines because clang-format was used. This patch
at least isolates that churn, makes it easy to skip when resolving
conflicts, and gets us to a clean baseline (again).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304787 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRe-sort #include lines for unittests. This uses a slightly modified
Chandler Carruth [Tue, 6 Jun 2017 11:06:56 +0000 (11:06 +0000)]
Re-sort #include lines for unittests. This uses a slightly modified
clang-format (https://reviews.llvm.org/D33932) to keep primary headers
at the top and handle new utility headers like 'gmock' consistently with
other utility headers.

No other change was made. I did no manual edits, all of this is
clang-format.

This should allow other changes to have more clear and focused diffs,
and is especially motivated by moving some headers into more focused
libraries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304786 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Add curly braces around switch case [NFC]
Peter Smith [Tue, 6 Jun 2017 10:22:49 +0000 (10:22 +0000)]
[ARM] Add curly braces around switch case [NFC]

My previous commit r304702 introduced a new case into a switch statement.
This case defined a variable but I forgot to add the curly brackets around the
case to limit the scope.

This change puts the curly braces back in so that the next person that adds a
case doesn't get a build failure. Thanks to avieira for the spot.

Differential Revision: https://reviews.llvm.org/D33931

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304785 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] Constant fold the new GEP in SimplifyGEPInst.
Joey Gouly [Tue, 6 Jun 2017 10:17:14 +0000 (10:17 +0000)]
[InstSimplify] Constant fold the new GEP in SimplifyGEPInst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304784 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[docs] Make it clear shifts yield poison when shift amount >= bitwidth
Nuno Lopes [Tue, 6 Jun 2017 08:28:17 +0000 (08:28 +0000)]
[docs] Make it clear shifts yield poison when shift amount >= bitwidth

Some InstCombine optimizations already rely on the result being poison
rather than undef.

For example, the following rewrite is wrong if undef is used:
; (1 << Y) * X  ->  X << Y
%Op0 = shl 1, %Y
%r = mul %Op0, %Op1
  =>
%r = shl %Op1, %Y

ERROR: Mismatch in values for i4 %r

Example:
i4 %Y = 0x8 (8, -8)
i4 %Op0 = 0x0 (0)
i4 %Op1 = 0x0 (0)
source: 0x0 (0)
target: 0x1 (1)

The optimization is correct if poison is returned instead:
http://rise4fun.com/Alive/ygX

Differential Revision: https://reviews.llvm.org/D33654

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304780 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Improve CodeGen Testing] This patch renables MIRPrinter print fields which have...
Vivek Pandya [Tue, 6 Jun 2017 08:16:19 +0000 (08:16 +0000)]
[Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default.
If -simplify-mir option is passed then MIRPrinter will not print such fields.
This change also required some lit test cases in CodeGen directory to be changed.

Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D32304

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304779 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix an unused variable warning in non-asserts builds.
Chandler Carruth [Tue, 6 Jun 2017 07:49:34 +0000 (07:49 +0000)]
Fix an unused variable warning in non-asserts builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304778 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] Remove some redundant code from InstSimplify now that llvm::isKnownNon...
Craig Topper [Tue, 6 Jun 2017 07:13:17 +0000 (07:13 +0000)]
[InstSimplify] Remove some redundant code from InstSimplify now that llvm::isKnownNonEqual handles vectors.

isKnownNonEqual is called a little earlier in this function and can handle the case that we were checking here as well as more complex cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304775 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ValueTracking] Remove scalar only restriction from isKnownNonEqual. The computeKnown...
Craig Topper [Tue, 6 Jun 2017 07:13:15 +0000 (07:13 +0000)]
[ValueTracking] Remove scalar only restriction from isKnownNonEqual. The computeKnownBits and isKnownNonZero calls this code relies on should work fine for vectors.

This will be used by another commit to remove some code from InstSimplify that is redundant for scalars, but was needed for vectors due to this issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304774 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] Use the getTrue/getFalse helpers and make sure we use the computed...
Craig Topper [Tue, 6 Jun 2017 07:13:13 +0000 (07:13 +0000)]
[InstSimplify] Use the getTrue/getFalse helpers and make sure we use the computed result type instead of hardcoding to i1. NFC

Currently, isKnownNonEqual punts on vectors so the hardcoding to i1 doesn't matter. But I plan to fix that in a future patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304773 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ValueTracking] Use the computeKnownBits version that returns a KnownBits object...
Craig Topper [Tue, 6 Jun 2017 07:13:11 +0000 (07:13 +0000)]
[ValueTracking] Use the computeKnownBits version that returns a KnownBits object instead of taking one by reference. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304772 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ValueTracking] Use APInt::intersects to avoid some temporary APInts. NFC
Craig Topper [Tue, 6 Jun 2017 07:13:09 +0000 (07:13 +0000)]
[ValueTracking] Use APInt::intersects to avoid some temporary APInts. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304771 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] Use ICmpInst::isEquality predicate method. NFC
Craig Topper [Tue, 6 Jun 2017 07:13:04 +0000 (07:13 +0000)]
[InstSimplify] Use ICmpInst::isEquality predicate method. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304770 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm] Remove double semicolons
Mandeep Singh Grang [Tue, 6 Jun 2017 05:08:36 +0000 (05:08 +0000)]
[llvm] Remove double semicolons

Reviewers: craig.topper, arsenm, mehdi_amini

Reviewed By: mehdi_amini

Subscribers: mehdi_amini, wdng, nhaehnle, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D33924

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304767 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] Stop this test from dirtying the source tree when run.
Chandler Carruth [Tue, 6 Jun 2017 03:24:22 +0000 (03:24 +0000)]
[x86] Stop this test from dirtying the source tree when run.

The output isn't used anyways.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304766 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd a dominanance check interface that uses caching for instructions within same...
Xin Tong [Tue, 6 Jun 2017 02:34:41 +0000 (02:34 +0000)]
Add a dominanance check interface that uses caching for instructions within same basic block.

Summary:
This problem stems from the fact that instructions are allocated using new
in LLVM, i.e. there is no relationship that can be derived by just looking
at the pointer value.

This interface dispatches to appropriate dominance check given 2 instructions,
i.e. in case the instructions are in the same basic block, ordered basicblock
(with instruction numbering and caching) are used. Otherwise, dominator tree
is used.

This is a preparation patch for https://reviews.llvm.org/D32720

Reviewers: dberlin, hfinkel, davide

Subscribers: davide, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D33380

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304764 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] Add the test for folding stack spills into pextrw.
Chandler Carruth [Tue, 6 Jun 2017 02:16:01 +0000 (02:16 +0000)]
[x86] Add the test for folding stack spills into pextrw.

This is a negative test as pextrw doesn't write to all 32-bits of the
spilled GPR. This fold ended up happening when D32684 was landed and
covers the regression that motivated reverting it in r304762.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304763 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] Revert the X86FoldTablesEmitter due to more miscompiles.
Chandler Carruth [Tue, 6 Jun 2017 02:15:31 +0000 (02:15 +0000)]
[x86] Revert the X86FoldTablesEmitter due to more miscompiles.

In testing, we've found yet another miscompile caused by the new tables.
And this one is even less clear how to fix (we could teach it to fold
a 16-bit load instead of the 32-bit load it wants, or block folding
entirely).

Also, the approach to excluding instructions seems increasingly to not
scale well.

I have left a more detailed analysis on the review log for the original
patch (https://reviews.llvm.org/D32684) along with suggested path
forward. I will land an additional test case that I wrote which covers
the code that was miscompiling (folding into the output of `pextrw`) in
a subsequent commit to keep this a pure revert.

For each commit reverted here, I've restricted the revert to the
non-test code touching the x86 fold table emission until the last commit
where I did revert the test updates. This means the *new* test cases
added for `insertps` and `xchg` remain untouched (and continue to pass).

Reverted commits:
r304540: [X86] Don't fold into memory operands into insertps in the ...
r304347: [TableGen] Adapt more places to getValueAsString now ...
r304163: [X86] Don't fold away the memory operand of an xchg.
r304123: Don't capture a temporary std::string in a StringRef.
r304122: Resubmit "[X86] Adding new LLVM TableGen backend that ..."

Original commit was in r304088, and after a string of fixes was reverted
previously in r304121 to fix build bots, and then re-landed in r304122.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304762 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DWARF] Adding support for the DWARF v5 string offsets table (consumer/reader part...
Wolfgang Pieb [Tue, 6 Jun 2017 01:22:34 +0000 (01:22 +0000)]
[DWARF] Adding support for the DWARF v5 string offsets table (consumer/reader part only).

Reviewers: dblaikie, aprantl

Differential Revision: https://reviews.llvm.org/D32779

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304759 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCodeGen: Refactor MIR parsing
Matthias Braun [Tue, 6 Jun 2017 00:44:35 +0000 (00:44 +0000)]
CodeGen: Refactor MIR parsing

When parsing .mir files immediately construct the MachineFunctions and
put them into MachineModuleInfo.

This allows us to get rid of the delayed construction (and delayed error
reporting) through the MachineFunctionInitialzier interface.

Differential Revision: https://reviews.llvm.org/D33809

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304758 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[cmake] Enable reverse iteration by default through build macro
Mandeep Singh Grang [Tue, 6 Jun 2017 00:36:09 +0000 (00:36 +0000)]
[cmake] Enable reverse iteration by default through build macro

Summary:
Reverse iteration can be turned on, by default, by setting -DLLVM_REVERSE_ITERATION:BOOL=ON during cmake.
With this enabled, we can uncover lots of cases of non-determinism in codegen by simply running our tests (without any other change).
We can then setup a buildbot which will have this turned on by default. Initially, a lot of unit tests will fail in this configuration.
Once we start fixing non-determinism issues, we can gradually make this a blocker for patches.

Reviewers: davide, dblaikie, mehdi_amini, dberlin

Reviewed By: dblaikie

Subscribers: probinson, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D33908

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304757 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollc: Create custom pass pipeline for .mir files; NFCI
Matthias Braun [Tue, 6 Jun 2017 00:26:24 +0000 (00:26 +0000)]
llc: Create custom pass pipeline for .mir files; NFCI

Create a custom pass pipeline when loading .mir files even in
--start-after/--start-before cases.

This streamlines the mir handling code and prepares for an upcoming
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304755 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCodeGen/LLVMTargetMachine: Refactor ISel pass construction; NFCI
Matthias Braun [Tue, 6 Jun 2017 00:26:13 +0000 (00:26 +0000)]
CodeGen/LLVMTargetMachine: Refactor ISel pass construction; NFCI

- Move ISel (and pre-isel) pass construction into TargetPassConfig
- Extract AsmPrinter construction into a helper function

Putting the ISel code into TargetPassConfig seems a lot more natural and
both changes together make make it easier to build custom pipelines
involving .mir in an upcoming commit. This moves MachineModuleInfo to an
earlier place in the pass pipeline which shouldn't have any effect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304754 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] fix over-specific triple; NFC
Sanjay Patel [Tue, 6 Jun 2017 00:18:11 +0000 (00:18 +0000)]
[x86] fix over-specific triple; NFC

There's nothing darwin-specific in these tests, and using that
setting causes extra phantom diffs when the auto-generated check
lines are regenerated today.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304753 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InlineSpiller] Don't spill fully undef values
Quentin Colombet [Mon, 5 Jun 2017 23:51:27 +0000 (23:51 +0000)]
[InlineSpiller] Don't spill fully undef values

Althought it is not wrong to spill undef values, it is useless and harms
both code size and runtime. Before spilling a value, check that its
content actually matters.

http://www.llvm.org/PR33311

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304752 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix PR23384 (part 2 of 3) NFC
Evgeny Stupachenko [Mon, 5 Jun 2017 23:37:00 +0000 (23:37 +0000)]
Fix PR23384 (part 2 of 3) NFC

Summary:
The patch moves LSR cost comparison to target part.

Reviewers: qcolombet

Differential Revision: http://reviews.llvm.org/D30561

From: Evgeny Stupachenko <evstupac@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304750 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove double semicolon
Matt Arsenault [Mon, 5 Jun 2017 23:01:31 +0000 (23:01 +0000)]
Remove double semicolon

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304749 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove some #include from StackProtector.h; NFC
Matthias Braun [Mon, 5 Jun 2017 22:59:21 +0000 (22:59 +0000)]
Remove some #include from StackProtector.h; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304748 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRenameIndependentSubregs: Fix handling of undef tied operands
Matt Arsenault [Mon, 5 Jun 2017 22:58:57 +0000 (22:58 +0000)]
RenameIndependentSubregs: Fix handling of undef tied operands

If a tied source operand was undef, it would be replaced but not
update the other tied operand, which would end up using different
virtual registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304747 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLSR: Calculate instruction cost only if InsnsCost is set to true (NFC)
Evgeny Stupachenko [Mon, 5 Jun 2017 22:44:18 +0000 (22:44 +0000)]
LSR: Calculate instruction cost only if InsnsCost is set to true (NFC)

Summary:

The patch guard all instruction cost calculations with InsnCosts (-lsr-insns-cost) option.
Currently even if the option set to false we calculate and print (in debug mode) instruction costs.

Reviewers: qcolombet

Differential Revision: http://reviews.llvm.org/D33914

From: Evgeny Stupachenko <evstupac@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304746 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalISel] IRTranslator: Add MachineMemOperand to target memory intrinsics
Volkan Keles [Mon, 5 Jun 2017 22:17:17 +0000 (22:17 +0000)]
[GlobalISel] IRTranslator: Add MachineMemOperand to target memory intrinsics

Reviewers: qcolombet, ab, t.p.northover, aditya_nandakumar, dsanders

Reviewed By: qcolombet

Subscribers: rovka, kristof.beyls, javed.absar, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D33724

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304743 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SelectionDAG] Update the dominator after splitting critical edges.
Davide Italiano [Mon, 5 Jun 2017 22:16:41 +0000 (22:16 +0000)]
[SelectionDAG] Update the dominator after splitting critical edges.

Running `llc -verify-dom-info` on the attached testcase results in a
crash in the verifier, due to a stale dominator tree.

i.e.

  DominatorTree is not up to date!
  Computed:
  =============================--------------------------------
  Inorder Dominator Tree:
    [1] %safe_mod_func_uint8_t_u_u.exit.i.i.i {0,7}
      [2] %lor.lhs.false.i61.i.i.i {1,2}
      [2] %safe_mod_func_int8_t_s_s.exit.i.i.i {3,6}
        [3] %safe_div_func_int64_t_s_s.exit66.i.i.i {4,5}

  Actual:
  =============================--------------------------------
  Inorder Dominator Tree:
    [1] %safe_mod_func_uint8_t_u_u.exit.i.i.i {0,9}
      [2] %lor.lhs.false.i61.i.i.i {1,2}
      [2] %safe_mod_func_int8_t_s_s.exit.i.i.i {3,8}
        [3] %safe_div_func_int64_t_s_s.exit66.i.i.i {4,5}
        [3] %safe_mod_func_int8_t_s_s.exit.i.i.i.lor.lhs.false.i61.i.i.i_crit_edge {6,7}

This is because in `SelectionDAGIsel` we split critical edges without
updating the corresponding dominator for the function (and we claim
in `MachineFunctionPass::getAnalysisUsage()` that the domtree is preserved).

We could either stop preserving the domtree in `getAnalysisUsage`
or tell `splitCriticalEdge()` to update it.
As the second option is easy to implement, that's the one I chose.

Differential Revision:  https://reviews.llvm.org/D33800

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304742 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CodeView] Fix endianness bug.
Zachary Turner [Mon, 5 Jun 2017 22:12:23 +0000 (22:12 +0000)]
[CodeView] Fix endianness bug.

We should be outputting in little endian, but we were writing
in host endianness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304741 91177308-0d34-0410-b5e6-96231b3b80d8