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Zhaoshi Zheng [Sat, 1 Sep 2018 00:04:56 +0000 (00:04 +0000)]
[Constant Hoisting] Hoisting Constant GEP Expressions
Leverage existing logic in constant hoisting pass to transform constant GEP
expressions sharing the same base global variable. Multi-dimensional GEPs are
rewritten into single-dimensional GEPs.
Differential Revision: https://reviews.llvm.org/D51396
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341269
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Jessica Paquette [Fri, 31 Aug 2018 22:43:41 +0000 (22:43 +0000)]
Fix typo in size remarks for module passes
ModuleCount = InstrCount was incorrect. It should have been
InstrCount = ModuleCount. This was making it emit an extra, incorrect remark
for Print Module IR.
The test didn't catch this, because it didn't ensure that the only remark
output was from the desired pass. So, it was possible to have an extra remark
come through and not fail. Updated the test so that we ensure that the last
remark that's output comes from the desired pass. This is done by ensuring
that whatever is being read after the last remark is YAML output rather than
some incorrect garbage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341267
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Stanislav Mekhanoshin [Fri, 31 Aug 2018 22:43:36 +0000 (22:43 +0000)]
[AMDGPU] Split v32i32 loads
Differential Revision: https://reviews.llvm.org/D51555
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341266
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Krzysztof Parzyszek [Fri, 31 Aug 2018 22:10:04 +0000 (22:10 +0000)]
[Hexagon] Don't access non-existent instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341264
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Matthias Braun [Fri, 31 Aug 2018 21:47:01 +0000 (21:47 +0000)]
Revamp test-suite documentation
- Remove duplication: Both TestingGuide and TestSuiteMakefileGuide
would give a similar overview over the test-suite.
- Present cmake/lit as the default/normal way of running the test-suite:
- Move information about the cmake/lit testsuite into the new
TestSuiteGuide.rst file. Mark the remaining information in
TestSuiteMakefilesGuide.rst as deprecated.
- General simplification and shorting of language.
- Remove paragraphs about tests known to fail as everything should pass
nowadays.
- Remove paragraph about zlib requirement; it's not required anymore
since we copied a zlib source snapshot into the test-suite.
- Remove paragraph about comparison with "native compiler". Correctness is
always checked against reference outputs nowadays.
- Change cmake/lit quickstart section to recommend `pip` for installing
lit and use `CMAKE_C_COMPILER` and a cache file in the example as that
is what most people will end up doing anyway. Also a section about
compare.py to quickstart.
- Document `Bitcode` and `MicroBenchmarks` directories.
- Add section with commonly used cmake configuration options.
- Add section about showing and comparing result files via compare.py.
- Add section about using external benchmark suites.
- Add section about using custom benchmark suites.
- Add section about profile guided optimization.
- Add section about cross-compilation and running on external devices.
Differential Revision: https://reviews.llvm.org/D51465
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341260
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Craig Topper [Fri, 31 Aug 2018 21:31:53 +0000 (21:31 +0000)]
[X86] Add intrinsics for KTEST instructions.
These intrinsics use the same implementation as PTEST intrinsics, but use vXi1 vectors.
New clang builtins will be accompanying them shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341259
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Jessica Paquette [Fri, 31 Aug 2018 20:54:37 +0000 (20:54 +0000)]
[NFC] Optionally pass a function to emitInstrCountChangedRemark
In basic block, loop, and function passes, we already have a function that
we can use to emit optimization remarks. We can use that instead of searching
the module for the first suitable function (that is, one that contains at
least one basic block.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341253
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Jessica Paquette [Fri, 31 Aug 2018 20:51:54 +0000 (20:51 +0000)]
[NFC] Check if P is a pass manager on entry to emitInstrCountChangedRemark
There's no point in finding a function to use for remark output when we're
not going to emit anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341252
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Jessica Paquette [Fri, 31 Aug 2018 20:20:57 +0000 (20:20 +0000)]
[NFC] Pass the instruction delta to emitInstrCountChangedRemark
Instead of counting the size of the entire module every time we run a pass,
pass along a delta instead and use that to emit the remark.
This means we only have to use (on average) smaller IR units to calculate
instruction counts. E.g, in a BB pass, we only need to look at the delta of
the BB instead of the delta of the entire module.
6/6
(This improved compile time for size remarks on sqlite3 + O2 significantly)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341250
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Jessica Paquette [Fri, 31 Aug 2018 20:20:56 +0000 (20:20 +0000)]
[NFC] Pre-calculate SCC IR counts in size remarks.
Same vein as the previous commits. Pre-calculate the size of
the module and use that to decide if we're going to emit a
remark.
This one comes with a FIXME and TODO. First off, CallGraphSCC
and CallGraphNode don't have a getInstructionCount function. So,
for now, we do the same thing as in a module pass.
Second off, we're not really saving anything here yet, because
as before, I need to change emitInstrCountChangedRemark to take
in a delta. Keeping the patches small though, so that's coming up
next.
5/6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341249
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Jessica Paquette [Fri, 31 Aug 2018 20:20:55 +0000 (20:20 +0000)]
[NFC] Pre-calculate module IR counts in size remarks.
Same as the previous NFC commits in the same vein.
This one introduces a TODO. I'm going to change emitInstrCountChangedRemark
so that it takes in a delta. Since the delta isn't necessary yet, it's not
there. For now, this means that we're calculating the size of the module
twice.
Just done separately to keep the patches small.
4/6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341248
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Jessica Paquette [Fri, 31 Aug 2018 20:20:54 +0000 (20:20 +0000)]
[NFC] Pre-calculate loop IR counts in size remarks.
Another commit reducing compile time in size remarks.
Cache the size of the module and loop, and update values based
off of deltas instead. Avoid recalculating the size of the
whole module whenever possible.
3/6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341247
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Jessica Paquette [Fri, 31 Aug 2018 20:20:53 +0000 (20:20 +0000)]
[NFC] Pre-calculate basic block IR counts in size remarks.
Size remarks are slow due to lots of recalculation of the module.
This is similar to the previous commit. Cache the size of the module and
update counts in basic block passes based off a less-expensive delta.
2/6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341246
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Jessica Paquette [Fri, 31 Aug 2018 20:19:41 +0000 (20:19 +0000)]
[NFC] Pre-calculate function IR counts in size remarks.
Size remarks are slow due to lots of recalculation of the module.
Pre-calculate the module size and initial function size for a remark. Use
deltas calculated using the less-expensive function IR count to update the
module counts for Function passes.
1/6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341245
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Tom Stellard [Fri, 31 Aug 2018 20:15:31 +0000 (20:15 +0000)]
lit: Use sys.executable for executing builtin commands
Summary:
The python executable may not exist on all systems so use sys.executable
instead.
Reviewers: ddunbar, stella.stamenova
Subscribers: delcypher, llvm-commits
Differential Revision: https://reviews.llvm.org/D51511
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341244
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Dean Michael Berris [Fri, 31 Aug 2018 20:02:55 +0000 (20:02 +0000)]
[XRay] Update RecordInitializer for PIDRecord
Since we changed the storage for the PID in PIDRecord instances, we need
to also update the way we load the data from a DataExtractor through the
RecordInitializer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341243
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Dean Michael Berris [Fri, 31 Aug 2018 19:32:46 +0000 (19:32 +0000)]
[XRay] Use correct type for PID records
Previously we've been reading and writing the wrong types which only
worked in little endian implementations. This time we're writing the
same typed values the runtime is using, and reading them appropriately
as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341241
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Tim Northover [Fri, 31 Aug 2018 19:24:37 +0000 (19:24 +0000)]
Tests: fix tests encoding specific hash values for 32-bit systems.
I changed the seed slightly, but forgot to run the tests on a 32-bit system, so
tests which hard-code a specific hash value started breaking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341240
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Dean Michael Berris [Fri, 31 Aug 2018 19:11:19 +0000 (19:11 +0000)]
[XRay] Use correct type for thread ID parsing
Previously we were reading only a uint16_t when we really needed to read
an int32_t from the log.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341239
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Sid Manning [Fri, 31 Aug 2018 19:08:23 +0000 (19:08 +0000)]
[Hexagon] Add support for getRegisterByName.
Support required to build the Hexagon Linux kernel.
Differential Revision: https://reviews.llvm.org/D51363
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341238
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Dean Michael Berris [Fri, 31 Aug 2018 18:56:42 +0000 (18:56 +0000)]
[XRay] Improve test matching granularity (NFC)
Simplify matchers for unittest to better isolate which differences there
are that we're finding in failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341237
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Dean Michael Berris [Fri, 31 Aug 2018 18:36:58 +0000 (18:36 +0000)]
[XRay] Change function record reader to be endian-aware
This change allows us to let the compiler do the right thing for when
handling big-endian and little-endian records for FDR mode function
records.
Previously, we assumed that the encoding was little-endian that reading
the first byte to look for the function id and function record types was
ordered in a little-endian manner. This change allows us to better
handle function records where the first four bytes may actually be
encoded in big-endian thus giving us the wrong bytes where we're seeking
the function information from.
This is a follow-up to D51210 and D51289.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341236
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Dean Michael Berris [Fri, 31 Aug 2018 17:49:59 +0000 (17:49 +0000)]
[XRay] Fix FunctionRecord serialization
This change makes the writer implementation more consistent with the way
fields are written down to avoid assumptions on bitfield order and
padding. We also fix an inconsistency between the type returned by the
`delta()` accessor to match the data member it's returning.
This is a follow-up to D51289 and D51210.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341230
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Alexandre Ganea [Fri, 31 Aug 2018 17:41:58 +0000 (17:41 +0000)]
[DebugInfo] Common behavior for error types
Following D50807, and heading towards D50664, this intermediary change does the following:
1. Upgrade all custom Error types in llvm/trunk/lib/DebugInfo/ to use the new StringError behavior (D50807).
2. Implement std::is_error_code_enum and make_error_code() for DebugInfo error enumerations.
3. Rename GenericError -> PDBError (the file will be renamed in a subsequent commit)
4. Update custom error messages to follow the same formatting: (\w\s*)+\.
5. Keep generic "file not found" (ENOENT) errors as they are in PDB code. Previously, there used to be a custom enumeration for that purpose.
6. Remove a few extraneous LF in log() implementations. Printing LF is a responsability at a higher level, not at the error level.
Differential Revision: https://reviews.llvm.org/D51499
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341228
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Craig Topper [Fri, 31 Aug 2018 17:17:21 +0000 (17:17 +0000)]
[X86] Add support for turning vXi1 shuffles into KSHIFTL/KSHIFTR.
This patch recognizes shuffles that shift elements and fill with zeros. I've copied and modified the shift matching code we use for normal vector registers to do this. I'm not sure if there's a good way to share more of this code without making the existing function more complex than it already is.
This will be used to enable kshift intrinsics in clang.
Differential Revision: https://reviews.llvm.org/D51401
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341227
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Dean Michael Berris [Fri, 31 Aug 2018 17:06:28 +0000 (17:06 +0000)]
[XRay] Make Trace loading endian-aware
This change makes the XRay Trace loading functions first use a
little-endian data extractor, then on failures try a big-endian data
extractor. Without this change, the trace loading facility will not work
with data written from a big-endian machine.
Follow-up to D51210 and D51289.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341226
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Dean Michael Berris [Fri, 31 Aug 2018 16:08:38 +0000 (16:08 +0000)]
[XRay] Make the FDRTraceWriter Endian-aware
Before this patch, the FDRTraceWriter would not take endianness into
account when writing data into the output stream.
This is a follow-up to D51289 and D51210.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341223
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Andrea Di Biagio [Fri, 31 Aug 2018 16:05:48 +0000 (16:05 +0000)]
[X86][BtVer2] Remove wrong ReadAdvance from AVX vbroadcast(ss|sd|f128) instructions.
The presence of a ReadAdvance for input operand #0 is problematic
because it changes the input latency of the register used as the base address
for the folded load.
A broadcast cannot start executing if the load address hasn't been computed yet.
In the llvm-mca example, the VBROADCASTSS is dependent on the address generated
by the LEAQ. That means, it cannot start until LEAQ reaches the write-back
stage. If we apply ReadAdvance, then we wrongly assume that the load can start 3
cycles in advance.
Differential Revision: https://reviews.llvm.org/D51534
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341222
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Simon Atanasyan [Fri, 31 Aug 2018 15:57:17 +0000 (15:57 +0000)]
[mips] Fix `mtc1` and `mfc1` definitions for microMIPS R6
The `mtc1` and `mfc1` definitions in the MipsInstrFPU.td have MMRel,
but do not have StdMMR6Rel tags. When these instructions are emitted
for microMIPS R6 targets, `Mips::MipsR62MicroMipsR6` nor
`Mips::Std2MicroMipsR6` cannot find correct op-codes and as a result the
backend uses mips32 variant of the instructions encoding.
The patch fixes this problem by adding the StdMMR6Rel tag and check
instructions encoding in the test case.
Differential revision: https://reviews.llvm.org/D51482
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341221
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Matt Arsenault [Fri, 31 Aug 2018 15:39:52 +0000 (15:39 +0000)]
AMDGPU: Restrict extract_vector_elt combine to loads
The intention is to enable the extract_vector_elt load combine,
and doing this for other operations interferes with more
useful optimizations on vectors.
Handle any type of load since in principle we should do the
same combine for the various load intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341219
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Matt Arsenault [Fri, 31 Aug 2018 15:05:06 +0000 (15:05 +0000)]
AMDGPU: Actually commit re-run of update_llc_test_checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341218
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Jonas Devlieghere [Fri, 31 Aug 2018 14:54:01 +0000 (14:54 +0000)]
[Wasm] Add missing EOF checks for floats
Adds the same checks we already do for ints to floats.
Fixes: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=8698
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341216
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Matt Arsenault [Fri, 31 Aug 2018 14:34:53 +0000 (14:34 +0000)]
SLPVectorizer: Fix assert with different sized address spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341215
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Matt Arsenault [Fri, 31 Aug 2018 14:34:22 +0000 (14:34 +0000)]
AMDGPU: Fix broken generated check lines
This was incorrectly using the same check prefix for multiple lines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341214
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Andrea Di Biagio [Fri, 31 Aug 2018 14:12:13 +0000 (14:12 +0000)]
[X86] Add llvm-mca tests that show how operand latency is wrongly computed for SSE sqrtss/sd and rcpss.
According to the timeline view, sqrtss/sd/rcpss start executing before the load
address for the memory operand is available.
This problem is caused by the presence of a ReadAfterLd (a ReadAdvance). Those
unary operations should not specify a ReadAdvance at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341213
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Francis Visoiu Mistrih [Fri, 31 Aug 2018 13:10:54 +0000 (13:10 +0000)]
[llvm-objdump] Keep the memory buffer from the dSYM alive when using -g -dsym
When using -g and -dsym, llvm-objdump opens the dsym file and keeps the
MachOObjectFile alive, while the memory buffer that the MachOObjectFile
was based on gets destroyed.
Differential Revision: https://reviews.llvm.org/D51365
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341209
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Dean Michael Berris [Fri, 31 Aug 2018 11:41:08 +0000 (11:41 +0000)]
[XRay] Remove array for Metadata Record Types
This simplifies the implementation of the metadata lookup by using
scoped enums, rather than using enum classes. This way we can get the
number-name mapping without having to resort to comments.
Follow-up to D51289.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341205
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Alexander Ivchenko [Fri, 31 Aug 2018 11:26:51 +0000 (11:26 +0000)]
[GlobalISel][X86] Add the support for G_FPTRUNC
Differential Revision: https://reviews.llvm.org/D49855
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341202
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Alexander Ivchenko [Fri, 31 Aug 2018 11:16:58 +0000 (11:16 +0000)]
[GlobalISel][X86_64] Support for G_FPTOSI
Differential Revision: https://reviews.llvm.org/D49183
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341200
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Alexander Ivchenko [Fri, 31 Aug 2018 11:05:13 +0000 (11:05 +0000)]
[GlobalIsel][X86] Support for llvm.trap intrinsic
Differential Revision: https://reviews.llvm.org/D49180
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341199
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Alexander Ivchenko [Fri, 31 Aug 2018 10:39:54 +0000 (10:39 +0000)]
[NFC] Fix unused variable warning in X86RegisterBankInfo.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341198
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Andrea Di Biagio [Fri, 31 Aug 2018 10:39:33 +0000 (10:39 +0000)]
[X86][BtVer2] Add an llvm-mca test that shows how the read latency of AVX broadcastss on ymm registers is incorrectly set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341197
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Dean Michael Berris [Fri, 31 Aug 2018 10:03:52 +0000 (10:03 +0000)]
[XRay] Attempt to fix failure on Windows
Original version of the code relied on implementation-defined order of bitfields.
Follow-up on D51210.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341194
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Alexander Ivchenko [Fri, 31 Aug 2018 09:38:27 +0000 (09:38 +0000)]
[GlobalIsel][X86] Support for G_FCMP
Differential Revision: https://reviews.llvm.org/D49172
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341193
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Simon Pilgrim [Fri, 31 Aug 2018 09:24:09 +0000 (09:24 +0000)]
Fix MSVC "not all control paths return a value" warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341191
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Roman Lebedev [Fri, 31 Aug 2018 08:59:15 +0000 (08:59 +0000)]
[XRay] FDRProducerConsumerTest: unbreak (gcc?) build
/build/llvm/unittests/XRay/FDRProducerConsumerTest.cpp:90:27: error: declaration of ‘std::unique_ptr<llvm::xray::Record> llvm::xray::{anonymous}::RoundTripTest<T>::Record’ [-fpermissive]
std::unique_ptr<Record> Record;
^~~~~~
In file included from /build/llvm/include/llvm/XRay/FDRLogBuilder.h:12,
from /build/llvm/unittests/XRay/FDRProducerConsumerTest.cpp:15:
/build/llvm/include/llvm/XRay/FDRRecords.h:28:7: error: changes meaning of ‘Record’ from ‘class llvm::xray::Record’ [-fpermissive]
class Record {
^~~~~~
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341189
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Roman Lebedev [Fri, 31 Aug 2018 08:52:03 +0000 (08:52 +0000)]
[NFC][X86][AArch64] A few more patterns for [lack of] signed truncation check pattern.[NFC][X86][AArch64] A few more patterns for [lack of] signed truncation check pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341188
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Andrea Di Biagio [Fri, 31 Aug 2018 08:30:47 +0000 (08:30 +0000)]
[X86][BtVer2] Fix WriteFShuffle256 schedule write info.
This patch fixes the number of micro opcodes, and processor resource cycles for
the following AVX instructions:
vinsertf128rr/rm
vperm2f128rr/rm
vbroadcastf128
Tests have been regenerated using the usual scripts in the llvm/utils directory.
Differential Revision: https://reviews.llvm.org/D51492
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341185
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Dean Michael Berris [Fri, 31 Aug 2018 08:04:56 +0000 (08:04 +0000)]
[XRay] FDR Record Producer/Consumer Implementation
Summary:
This patch defines two new base types called `RecordProducer` and
`RecordConsumer` which have default implementations for convenience
(particularly for testing).
A `RecordProducer` implementation has one member function called
`produce()` which serves as a factory constructor for `Record`
instances. This code exercises the `RecordInitializer` code path in the
implementation for `FileBasedRecordProducer`.
A `RecordConsumer` has a single member function called `consume(...)`
which, as the name implies, consumes instances of
`std::unique_ptr<Record>`. We have two implementations, one of which is
used in the test to generate a vector of `std::unique_ptr<Record>`
similar to how the `LogBuilder` implementation works.
We introduce a test in `FDRProducerConsumerTest` which ensures that
records we write through the `FDRTraceWriter` can be loaded by the
`FileBasedRecordProducer`. The record(s) loaded this way are written
again through the `FDRTraceWriter` into a separate string, which we then
compare. This ensures that the read-in bytes to create the `Record`
instances in memory can be replicated when written out through the
`FDRTraceWriter`.
This change depends on D51210 and is part of the refactoring of D50441
into smaller, more focused changes.
Reviewers: eizan, kpw
Subscribers: mgorny, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D51289
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341180
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Martin Storsjo [Fri, 31 Aug 2018 08:00:34 +0000 (08:00 +0000)]
[AArch64] Hook up the missed machine operand flag name for MO_DLLIMPORT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341178
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Martin Storsjo [Fri, 31 Aug 2018 08:00:31 +0000 (08:00 +0000)]
[MinGW] [X86] Pass true for the second parameter to StubValueTy for MO_COFFSTUB. NFC.
These stubs should never be emitted for internal symbols, and
nothing in AsmPrinter ever actually use this value when producing
the stubs for COFF anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341177
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Martin Storsjo [Fri, 31 Aug 2018 08:00:25 +0000 (08:00 +0000)]
[MinGW] [ARM] Add stubs for potential automatic dllimported variables
The runtime pseudo relocations can't handle the ARM format embedded
addresses in movw/movt pairs. By using stubs, the potentially
dllimported addresses can be touched up by the runtime pseudo relocation
framework.
Differential Revision: https://reviews.llvm.org/D51450
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341176
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Craig Topper [Fri, 31 Aug 2018 07:05:39 +0000 (07:05 +0000)]
[X86] Don't do anything in ReplaceNodeResults for (v2i32 (fptoui/fptosi v2f32)) when -x86-experimental-vector-widening-legalization is on.
We don't need to do our own widening, the generic legalizer can do it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341174
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Craig Topper [Fri, 31 Aug 2018 07:05:38 +0000 (07:05 +0000)]
[X86] Add a -x86-experimental-vector-widening command line to vec_fp_to_int.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341173
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Craig Topper [Fri, 31 Aug 2018 07:05:37 +0000 (07:05 +0000)]
[X86] Don't custom widen (v2i32 (setcc v2f32)) when -x86-experimental-vector-widening-legalization is in effect.
We aren't doing anything than what the generic legalizer will do so just let it do it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341172
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Craig Topper [Fri, 31 Aug 2018 07:05:36 +0000 (07:05 +0000)]
[X86] Add -x86-experimental-vector-widening-legalization run line to avx512-cvt.ll
This will cover the (v2i32 (setcc v2f32)) case in replaceNodeResults. That code shouldn't be needed at all in this mode. A future patch will skip it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341171
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Matt Arsenault [Fri, 31 Aug 2018 06:07:45 +0000 (06:07 +0000)]
AMDGPU: Remove obsolete tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341169
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Matt Arsenault [Fri, 31 Aug 2018 06:02:36 +0000 (06:02 +0000)]
AMDGPU: Stop forcing internalize at -O0
This doesn't really matter if clang is always emitting
the visibility as hidden by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341168
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Matt Arsenault [Fri, 31 Aug 2018 05:49:54 +0000 (05:49 +0000)]
AMDGPU: Remove remnants of old address space mapping
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341165
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Lang Hames [Fri, 31 Aug 2018 00:53:53 +0000 (00:53 +0000)]
[ORC] Remove a stray debugging output line left in a unit test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341155
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Lang Hames [Fri, 31 Aug 2018 00:53:17 +0000 (00:53 +0000)]
[ORC] Add utilities to RTDyldObjectLinkingLayer2 to simplify symbol flag
management and materialization responsibility registration.
The setOverrideObjectFlagsWithResponsibilityFlags method instructs
RTDyldObjectlinkingLayer2 to override the symbol flags produced by RuntimeDyld with
the flags provided by the MaterializationResponsibility instance. This can be used
to enable symbol visibility (hidden/exported) for COFF object files, which do not
currently support the SF_Exported flag.
The setAutoClaimResponsibilityForObjectSymbols method instructs
RTDyldObjectLinkingLayer2 to claim responsibility for any symbols provided by a
given object file that were not already in the MaterializationResponsibility
instance. Setting this flag allows higher-level program representations (e.g.
LLVM IR) to be added based on only a subset of the symbols they provide, without
having to write intervening layers to scan and add the additional symbols. This
trades diagnostic quality for convenience however: If all symbols are enumerated
up-front then clashes can be detected and reported early. If this option is set,
clashes for the additional symbols may not be detected until late, and detection
may depend on the flow of control through JIT'd code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341154
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Fangrui Song [Fri, 31 Aug 2018 00:22:20 +0000 (00:22 +0000)]
Import lit.llvm after rL341135
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341149
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Max Kazantsev [Fri, 31 Aug 2018 00:01:54 +0000 (00:01 +0000)]
Revert "[NFC] Add severe validation of InstructionPrecedenceTracking" for discussion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341147
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Michael Berg [Thu, 30 Aug 2018 22:43:34 +0000 (22:43 +0000)]
[NFC] adding initial intersect test for Node to Instruction association
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341138
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Krzysztof Parzyszek [Thu, 30 Aug 2018 22:26:43 +0000 (22:26 +0000)]
[Hexagon] Check validity of register class when generating bitsplit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341137
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Eli Friedman [Thu, 30 Aug 2018 22:18:27 +0000 (22:18 +0000)]
[ARM] Enable GEP offset splitting for 32-bit ARM.
It has essentially the same benefit it has on 64-bit ARM: it
substantially reduces the number of constants used by large GEP
operations. Seems to be generally helpful across a few different
codebases I've tried.
Differential Revision: https://reviews.llvm.org/D51462
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341136
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Nico Weber [Thu, 30 Aug 2018 22:13:34 +0000 (22:13 +0000)]
Remove LIT_SITE_CFG_IN_FOOTER, llvm
It's always replaced with the same (short) static string, so just put that
there directly.
No intended behavior change.
https://reviews.llvm.org/D51357
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341135
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Thomas Lively [Thu, 30 Aug 2018 22:10:43 +0000 (22:10 +0000)]
[WebAssembly] Update utility functions with SIMD types
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51516
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341131
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Thomas Lively [Thu, 30 Aug 2018 21:43:51 +0000 (21:43 +0000)]
[WebAssembly] Vector conversions
Summary:
Lowers away bitconverts between vector types. This CL depends
on D51383.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51498
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341128
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Thomas Lively [Thu, 30 Aug 2018 21:36:48 +0000 (21:36 +0000)]
[WebAssembly] SIMD loads and stores
Summary: Reuse the patterns from WebAssemblyInstrMemory.td.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51383
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341127
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Adrian Prantl [Thu, 30 Aug 2018 21:21:16 +0000 (21:21 +0000)]
dsymutil: Avoid pruning non-type forward declarations inside DW_TAG_module
forward declarations.
Especially with template instantiations, there are legitimate reasons
why for declarations might be emitted into a DW_TAG_module skeleton /
forward-declaration sub-tree, that are not forward declarations in the
sense of that there is a more complete definition over in a .pcm file.
The example in the testcase is a constant DW_TAG_member of a
DW_TAG_class template instatiation.
rdar://problem/
43623196
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341123
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Zachary Turner [Thu, 30 Aug 2018 21:00:57 +0000 (21:00 +0000)]
Remove some debugging code that was accidentally left in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341122
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Zachary Turner [Thu, 30 Aug 2018 20:53:48 +0000 (20:53 +0000)]
Add a utility script to stress test the demangler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341120
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Zachary Turner [Thu, 30 Aug 2018 20:53:29 +0000 (20:53 +0000)]
[MS Demangler] Add support for $$Z parameter pack separator.
$$Z appears between adjacent expanded parameter packs in the
same template instantiation. We don't need to print it, it's
only there to disambiguate between manglings that would otherwise
be ambiguous. So we just need to parse it and throw it away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341119
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Vlad Tsyrklevich [Thu, 30 Aug 2018 20:44:51 +0000 (20:44 +0000)]
SafeStack: Prevent OOB reads with mem intrinsics
Summary:
Currently, the SafeStack analysis disallows out-of-bounds writes but not
out-of-bounds reads for mem intrinsics like llvm.memcpy. This could
cause leaks of pointers to the safe stack by leaking spilled registers/
frame pointers. Check for allocas used as source or destination pointers
to mem intrinsics.
Reviewers: eugenis
Reviewed By: eugenis
Subscribers: pcc, llvm-commits, kcc
Differential Revision: https://reviews.llvm.org/D51334
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341116
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Tim Northover [Thu, 30 Aug 2018 20:28:32 +0000 (20:28 +0000)]
Hashing: use 64-bit seed for hashing on all platforms.
get_execution_seed returns a size_t which varies across platforms, but its
users actually always feed it into a uint64_t role so it makes sense to be
consistent.
Mostly this is just a tidy-up, but it also apparently allows PCH files to be
shared between Clang compilers built for 32-bit and 64-bit hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341113
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Craig Topper [Thu, 30 Aug 2018 20:10:10 +0000 (20:10 +0000)]
[X86] Add -x86-experimental-vector-widening-legalization command lines to vector-idiv-v2i32.ll
If we're legalizing via widening already, then the type legalizer will scalarize the divs/rems as i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341108
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Ana Pazos [Thu, 30 Aug 2018 19:43:19 +0000 (19:43 +0000)]
[RISCV] Fixed SmallVector.h Assertion `idx < size()'
Summary:
RISCVAsmParser needs to handle the case the error message is of specific type, other than the generic Match_InvalidOperand, and the corresponding
operand is missing.
This bug was uncovered by a LLVM MC Assembler Protocol Buffer Fuzzer for the RISC-V assembly language.
Reviewers: asb
Reviewed By: asb
Subscribers: llvm-commits, jocewei, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX
Differential Revision: https://reviews.llvm.org/D50790
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341104
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Craig Topper [Thu, 30 Aug 2018 19:35:40 +0000 (19:35 +0000)]
[DAGCombiner] Fix bad identation. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341103
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Craig Topper [Thu, 30 Aug 2018 19:35:38 +0000 (19:35 +0000)]
[X86] Weaken an overly aggressive assert.
This assert tried to check that AND constants are only on the RHS. But its possible for both operands to be constants if one is opaque which will prevent the AND from being constant folded.
Fixes PR38771
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341102
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Evandro Menezes [Thu, 30 Aug 2018 19:22:00 +0000 (19:22 +0000)]
[ARM] Adjust the feature set for Exynos
Enable `FeatureUseAA` for all Exynos processors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341101
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Evandro Menezes [Thu, 30 Aug 2018 19:04:51 +0000 (19:04 +0000)]
[InstCombine] Expand the simplification of pow() into exp2()
Generalize the simplification of `pow(2.0, y)` to `pow(2.0 ** n, y)` for all
scalar and vector types.
This improvement helps some benchmarks in SPEC CPU2000 and CPU2006, such as
252.eon, 447.dealII, 453.povray. Otherwise, no significant regressions on
x86-64 or A64.
Differential revision: https://reviews.llvm.org/D49273
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341095
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Eli Friedman [Thu, 30 Aug 2018 18:59:24 +0000 (18:59 +0000)]
[SROA] Fix alignment for uses of PHI nodes.
Splitting an alloca can decrease the alignment of GEPs into the
partition. Normally, rewriting accounts for this, but the code was
missing for uses of PHI nodes and select instructions.
Fixes https://bugs.llvm.org/show_bug.cgi?id=38707 .
Differential Revision: https://reviews.llvm.org/D51335
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341094
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Andrew Kaylor [Thu, 30 Aug 2018 18:37:18 +0000 (18:37 +0000)]
Reverting r340807.
This patch restores the old behavior of getAllocationDataForFunction in MemoryBuiltins.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341091
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Craig Topper [Thu, 30 Aug 2018 17:51:02 +0000 (17:51 +0000)]
[X86] Add kshift test cases for D51401. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341088
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Vladimir Stefanovic [Thu, 30 Aug 2018 17:31:38 +0000 (17:31 +0000)]
Allow inconsistent offsets for 'noreturn' basic blocks when '-verify-cfiinstrs'
With r295105, some 'noreturn' blocks (those that don't return and have no
successors) may be merged.
If such blocks' predecessors have different outgoing offset or register, don't
report an error in CFIInstrInserter verify().
Thanks to Vlad Tsyrklevich for reporting the issue.
Differential Revision: https://reviews.llvm.org/D51161
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341087
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Robert Widmann [Thu, 30 Aug 2018 17:09:43 +0000 (17:09 +0000)]
[LLVM-C] Add Bindings For Named Metadata
Summary: Add a new type for named metadata nodes. Use this to implement iterators and accessors for NamedMDNodes and extend the echo test to use them to copy module-level debug information.
Reviewers: whitequark, deadalnix, aprantl, dexonsmith
Reviewed By: whitequark
Subscribers: Wallbraker, JDevlieghere, llvm-commits, harlanhaskins
Differential Revision: https://reviews.llvm.org/D47179
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341085
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Sanjay Patel [Thu, 30 Aug 2018 16:44:07 +0000 (16:44 +0000)]
[IR] fix declaration of shuffle mask
An address sanitizer bot flagged this as a potential bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341084
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Matt Morehouse [Thu, 30 Aug 2018 15:54:44 +0000 (15:54 +0000)]
[libFuzzer] Port to Windows
Summary:
Port libFuzzer to windows-msvc.
This patch allows libFuzzer targets to be built and run on Windows, using -fsanitize=fuzzer and/or fsanitize=fuzzer-no-link. It allows these forms of coverage instrumentation to work on Windows as well.
It does not fix all issues, such as those with -fsanitize-coverage=stack-depth, which is not usable on Windows as of this patch.
It also does not fix any libFuzzer integration tests. Nearly all of them fail to compile, fixing them will come in a later patch, so libFuzzer tests are disabled on Windows until them.
Patch By: metzman
Reviewers: morehouse, rnk
Reviewed By: morehouse, rnk
Subscribers: #sanitizers, delcypher, morehouse, kcc, eraman
Differential Revision: https://reviews.llvm.org/D51022
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341082
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Wouter van Oortmerssen [Thu, 30 Aug 2018 15:40:53 +0000 (15:40 +0000)]
[WebAssembly] Made disassembler only use stack instructions.
Summary:
Now uses the StackBased bit from the tablegen defs to identify
stack instructions (and ignore register based or non-wasm instructions).
Also changed how we store operands, since we now have up to 16 of them
per instruction. To not cause static data bloat, these are compressed
into a tiny table.
+ a few other cleanups.
Tested:
- MCTest
- llvm-lit -v `find test -name WebAssembly`
Reviewers: dschuff, jgravelle-google, sunfish, tlively
Subscribers: sbc100, aheejin, llvm-commits
Differential Revision: https://reviews.llvm.org/D51320
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341081
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Nicolai Haehnle [Thu, 30 Aug 2018 15:24:00 +0000 (15:24 +0000)]
Move test/Analysis/DivergenceAnalysis/AMDGPU/loads.ll
Should fix failures of buildbots that don't build the AMDGPU backend.
Change-Id: I01cb84b4b47803b10c5b21ea0353546239860a51
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341079
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Sanjay Patel [Thu, 30 Aug 2018 15:05:38 +0000 (15:05 +0000)]
[IR] add shuffle queries for identity extend/extract
This was one of the potential follow-ups suggested in D48236,
and these will be used to make matching the patterns in PR38691 cleaner:
https://bugs.llvm.org/show_bug.cgi?id=38691
About the vocabulary: in the DAG, these would be concat_vector with an
undef operand or extract_subvector. Alternate names are discussed in the
review, but I think these are familiar/good enough to proceed. Once we
have uses of them in code, we might adjust if there are better options.
https://reviews.llvm.org/D51392
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341075
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Alexander Ivchenko [Thu, 30 Aug 2018 14:32:47 +0000 (14:32 +0000)]
Make TargetInstrInfo::isCopyInstr return true for regular COPY-instructions
..Move all target-dependent checks into new isCopyInstrImpl method.
This change allows us to treat MoveReg-type instructions and generic
COPY instruction in the same way
Differential Revision: https://reviews.llvm.org/D49913
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341072
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Nicolai Haehnle [Thu, 30 Aug 2018 14:21:36 +0000 (14:21 +0000)]
[NFC] Rename the DivergenceAnalysis to LegacyDivergenceAnalysis
Summary:
This is patch 1 of the new DivergenceAnalysis (https://reviews.llvm.org/D50433).
The purpose of this patch is to free up the name DivergenceAnalysis for the new generic
implementation. The generic implementation class will be shared by specialized
divergence analysis classes.
Patch by: Simon Moll
Reviewed By: nhaehnle
Subscribers: jvesely, jholewinski, arsenm, nhaehnle, mgorny, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D50434
Change-Id: Ie8146b11be2c50d5312f30e11c7a3036a15b48cb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341071
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Alexandre Ganea [Thu, 30 Aug 2018 14:05:49 +0000 (14:05 +0000)]
More build fix for r341064.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341070
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Daniel Cederman [Thu, 30 Aug 2018 14:05:26 +0000 (14:05 +0000)]
[Sparc] Use ANDN instead of AND if constant can be encoded more efficiently
Summary:
In the case of (and reg, constant) or (or reg, constant), it can be
beneficial to use a ANDNrr/ORNrr instruction instead of ANDrr/ORrr,
if the complement of the constant can be encoded using a single SETHI
instruction instead of a SETHI/ORri pair.
If the constant has more than one use, it is probably better to keep it
in its original form.
Reviewers: jyknight, venkatra
Reviewed By: jyknight
Subscribers: fedor.sergeev, jrtc27, llvm-commits
Differential Revision: https://reviews.llvm.org/D50964
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341069
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Alexander Timofeev [Thu, 30 Aug 2018 13:55:04 +0000 (13:55 +0000)]
[AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1.
Reviewers: rampitec
Differential revision: https://reviews/llvm/org/D51316
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341068
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Alexandre Ganea [Thu, 30 Aug 2018 13:36:07 +0000 (13:36 +0000)]
Build fix for r341064. Temporarily disable compile-time validation for createFileError().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341067
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Alexandre Ganea [Thu, 30 Aug 2018 13:10:42 +0000 (13:10 +0000)]
[Error] Add FileError helper; upgrade StringError behavior
FileError is meant to encapsulate both an Error and a file name/path. It should be used in cases where an Error occurs deep down the call chain, and we want to return it to the caller along with the file name.
StringError was updated to display the error messages in different ways. These can be:
1. display the error_code message, and convert to the same error_code (ECError behavior)
2. display an arbitrary string, and convert to a provided error_code (current StringError behavior)
3. display both an error_code message and a string, in this order; and convert to the same error_code
These behaviors can be triggered depending on the constructor. The goal is to use StringError as a base class, when a library needs to provide a explicit Error type.
Differential Revision: https://reviews.llvm.org/D50807
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341064
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Ties Stuij [Thu, 30 Aug 2018 12:52:35 +0000 (12:52 +0000)]
[CodeGen] emit inline asm clobber list warnings for reserved (cont)
Summary:
This is a continuation of https://reviews.llvm.org/D49727
Below the original text, current changes in the comments:
Currently, in line with GCC, when specifying reserved registers like sp or pc on an inline asm() clobber list, we don't always preserve the original value across the statement. And in general, overwriting reserved registers can have surprising results.
For example:
extern int bar(int[]);
int foo(int i) {
int a[i]; // VLA
asm volatile(
"mov r7, #1"
:
:
: "r7"
);
return 1 + bar(a);
}
Compiled for thumb, this gives:
$ clang --target=arm-arm-none-eabi -march=armv7a -c test.c -o - -S -O1 -mthumb
...
foo:
.fnstart
@ %bb.0: @ %entry
.save {r4, r5, r6, r7, lr}
push {r4, r5, r6, r7, lr}
.setfp r7, sp, #12
add r7, sp, #12
.pad #4
sub sp, #4
movs r1, #7
add.w r0, r1, r0, lsl #2
bic r0, r0, #7
sub.w r0, sp, r0
mov sp, r0
@APP
mov.w r7, #1
@NO_APP
bl bar
adds r0, #1
sub.w r4, r7, #12
mov sp, r4
pop {r4, r5, r6, r7, pc}
...
r7 is used as the frame pointer for thumb targets, and this function needs to restore the SP from the FP because of the variable-length stack allocation a. r7 is clobbered by the inline assembly (and r7 is included in the clobber list), but LLVM does not preserve the value of the frame pointer across the assembly block.
This type of behavior is similar to GCC's and has been discussed on the bugtracker: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=11807 . No consensus seemed to have been reached on the way forward. Clang behavior has briefly been discussed on the CFE mailing (starting here: http://lists.llvm.org/pipermail/cfe-dev/2018-July/058392.html). I've opted for following Eli Friedman's advice to print warnings when there are reserved registers on the clobber list so as not to diverge from GCC behavior for now.
The patch uses MachineRegisterInfo's target-specific knowledge of reserved registers, just before we convert the inline asm string in the AsmPrinter.
If we find a reserved register, we print a warning:
repro.c:6:7: warning: inline asm clobber list contains reserved registers: R7 [-Winline-asm]
"mov r7, #1"
^
Reviewers: efriedma, olista01, javed.absar
Reviewed By: efriedma
Subscribers: eraman, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D51165
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341062
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