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Mikael Holmen [Mon, 15 Jan 2018 07:05:51 +0000 (07:05 +0000)]
[GlobalsAA] Don't let dbg intrinsics affect analysis result
Summary:
This fixes PR35899.
Debug info intrinsics shouldn't affect code generation so ignore them
in GlobalsAA.
Reviewers: hfinkel, aprantl
Reviewed By: aprantl
Subscribers: aprantl, llvm-commits
Differential Revision: https://reviews.llvm.org/D41984
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322470
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Max Kazantsev [Mon, 15 Jan 2018 05:44:43 +0000 (05:44 +0000)]
[NFC] Fix comment to adjust to reality
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322468
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Davide Italiano [Mon, 15 Jan 2018 01:40:18 +0000 (01:40 +0000)]
[BasicAA] Stop crashing when dealing with pointers > 64 bits.
An alternative (and probably better) fix would be that of
making `Scale` an APInt, and there's a patch floating around
to do this. As we're still discussing it, at least stop crashing
in the meanwhile (added bonus, we now have a regression test for
this situation).
Fixes PR35843.
Thanks to Eli for suggesting the fix and Simon for reporting and
reducing the bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322467
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Amara Emerson [Mon, 15 Jan 2018 00:44:20 +0000 (00:44 +0000)]
[GlobalISel][Legalizer] Convert some typedefs to using. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322466
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Simon Pilgrim [Sun, 14 Jan 2018 21:59:43 +0000 (21:59 +0000)]
[X86][SSE] Tag PR21137 test case
The test was added ages ago, but we didn't comment where it came from.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322465
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Craig Topper [Sun, 14 Jan 2018 20:53:49 +0000 (20:53 +0000)]
[X86] Add test cases for D41794.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322464
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Simon Pilgrim [Sun, 14 Jan 2018 19:57:50 +0000 (19:57 +0000)]
[X86][SSE] Add PR22391 test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322463
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Craig Topper [Sun, 14 Jan 2018 19:24:10 +0000 (19:24 +0000)]
[X86] Autoupgrade kunpck intrinsics using vector operations instead of scalar operations
Summary: This patch changes the kunpck intrinsic autoupgrade to use vXi1 shufflevector operations to perform vector extracts and concats. This more closely matches the definition of the kunpck instructions. Currently we rely on a DAG combine to turn the scalar shift/and/or code into a concat vectors operation. By doing it in the IR we get this for free.
Reviewers: spatel, RKSimon, zvi, jina.nahias
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42018
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322462
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Simon Pilgrim [Sun, 14 Jan 2018 19:07:41 +0000 (19:07 +0000)]
[X86] Regenerate fp128 test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322460
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Simon Pilgrim [Sun, 14 Jan 2018 18:50:34 +0000 (18:50 +0000)]
[X86][SSE] Support combining MOVLHPS undef inputs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322459
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Simon Pilgrim [Sun, 14 Jan 2018 18:38:21 +0000 (18:38 +0000)]
[X86][SSE] Add v2f64 3u shuffle test
Shows a missed opportunity to remove a unnecessary move compared to 31 shuffle mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322458
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Sanjay Patel [Sun, 14 Jan 2018 17:47:40 +0000 (17:47 +0000)]
[x86] auto-generate complete checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322457
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Sanjay Patel [Sun, 14 Jan 2018 15:58:18 +0000 (15:58 +0000)]
[InstSimplify] fix code comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322456
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Craig Topper [Sun, 14 Jan 2018 08:11:36 +0000 (08:11 +0000)]
[X86] Use ISD::TRUNCATE instead of X86ISD::VTRUNC when input and output types have the same number of elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322455
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Craig Topper [Sun, 14 Jan 2018 08:11:33 +0000 (08:11 +0000)]
[X86] Add X86ISD::VTRUNC to computeKnownBitsForTargetNode.
We have to take special care to avoid the cases where the result of the truncate would be padded with zero elements.
Ideally we'd just use ISD::TRUNCATE for these cases instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322454
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Craig Topper [Sun, 14 Jan 2018 02:05:51 +0000 (02:05 +0000)]
[X86] Improve legalization of vXi16/vXi8 selects.
Extend vXi1 conditions of vXi8/vXi16 selects even before type legalization gets a chance to split wide vectors. Previously we would only extend 128 and 256 bit vectors. But if we start with a 512 bit vector or wider that needs to be split we wouldn't extend until after the split had taken place. By extending early we improve the results of type legalization.
Don't widen condition of 128/256 bit vXi16/vXi8 selects when we have BWI but not VLX. We can still use a mask register by widening the select to 512-bits instead. This is similar to what we do for compares already.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322450
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Craig Topper [Sun, 14 Jan 2018 02:05:49 +0000 (02:05 +0000)]
[X86] Add an avx512bw command line to the avx512-vec-cmp.ll test. Add some additional test cases.
Additional test cases cover selects with i16/i8 conditions that are only 128/256-bits wide, but the compares are 512-bits wide and can only produce k-registers. We should be able to artificially widen the selects to avoid moving the k-register to an xmm/ymm register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322449
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Zvi Rackover [Sat, 13 Jan 2018 17:42:19 +0000 (17:42 +0000)]
X86: Add pattern matching for PMADDWD
In addition to the existing match as part of a loop-reduction, add a
straightforward pattern match for DAG-contained patterns.
Reviewers: RKSimon, craig.topper
Subscribers: llvm-commits
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D41811
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322446
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Simon Pilgrim [Sat, 13 Jan 2018 16:55:28 +0000 (16:55 +0000)]
[X86] Regenerate double shift tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322444
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Sanjay Patel [Sat, 13 Jan 2018 15:44:44 +0000 (15:44 +0000)]
[InstSimplify] fold implied null ptr check (PR35790)
This extends rL322327 to handle the pointer cast and should solve:
https://bugs.llvm.org/show_bug.cgi?id=35790
Name: or_eq_zero
%isnull = icmp eq i64* %p, null
%x = ptrtoint i64* %p to i64
%somebits = and i64 %x, %y
%somebits_are_zero = icmp eq i64 %somebits, 0
%or = or i1 %somebits_are_zero, %isnull
=>
%or = %somebits_are_zero
Name: and_ne_zero
%isnotnull = icmp ne i64* %p, null
%x = ptrtoint i64* %p to i64
%somebits = and i64 %x, %y
%somebits_are_not_zero = icmp ne i64 %somebits, 0
%and = and i1 %somebits_are_not_zero, %isnotnull
=>
%and = %somebits_are_not_zero
https://rise4fun.com/Alive/CQ3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322439
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Simon Pilgrim [Sat, 13 Jan 2018 12:29:06 +0000 (12:29 +0000)]
[X86][MMX] Add test for MMX zero folding
As discussed in D41908
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322436
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Zvi Rackover [Sat, 13 Jan 2018 08:21:29 +0000 (08:21 +0000)]
X86 Tests: add more pamddwd cases. NFC
Improve coverage of D41811
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322434
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Craig Topper [Sat, 13 Jan 2018 06:24:46 +0000 (06:24 +0000)]
[X86] Add DAG combine to promote vXi1 result of a vXi8/vXi16 setcc when we have AVX512 but not BWI.
This avoids having the result type stick around until lowering where we have to extend the setcc and insert a truncate. If we get the types converted early we can do more to optimize it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322432
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Paul Robinson [Sat, 13 Jan 2018 01:39:30 +0000 (01:39 +0000)]
XFAIL a test on Darwin, line-table stuck on DWARF 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322430
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Evgeniy Stepanov [Sat, 13 Jan 2018 01:32:15 +0000 (01:32 +0000)]
[hwasan] An LLVM flag to disable stack tag randomization.
Summary: Necessary to achieve consistent test results.
Reviewers: kcc, alekseyshl
Subscribers: kubamracek, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D42023
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322429
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Jessica Paquette [Sat, 13 Jan 2018 00:42:28 +0000 (00:42 +0000)]
[MachineOutliner] Move hasAddressTaken check to MachineOutliner.cpp
*Mostly* NFC. Still updating the test though just for completeness.
This moves the hasAddressTaken check to MachineOutliner.cpp and replaces it
with a per-basic block test rather than a per-function test. The old test was
too conservative and was preventing functions in C programs from being
outlined even though they were safe to outline.
This was mostly a problem in C sources.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322425
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Tim Renouf [Fri, 12 Jan 2018 22:57:24 +0000 (22:57 +0000)]
[AMDGPU] stop image_store being moved illegally
Summary:
A recent change
321556: AMDGPU: Remove mayLoad/hasSideEffects from MIMG stores
can allow the machine instruction scheduler to move an image store past
an image load using the same descriptor.
V2: Fixed by marking image ops as mayAlias and isAliased. This may be
overly conservative, and we may need to revisit.
V3: Reverted test change done on 321556.
Reviewers: arsenm, nhaehnle, dstuttard
Subscribers: llvm-commits, t-tye, yaxunl, wdng, kzhuravl
Differential Revision: https://reviews.llvm.org/D41969
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322419
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Sanjay Patel [Fri, 12 Jan 2018 22:16:26 +0000 (22:16 +0000)]
[InstSimplify] add tests for implied ptr cmp with null (PR35790); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322411
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Rui Ueyama [Fri, 12 Jan 2018 22:09:19 +0000 (22:09 +0000)]
Allow unaligned access to ELF file data structures.
The ELF specification says that all ELF data structures are aligned to
their natural alignments both in memory and file. That means when we
access mmap'ed ELF files, we could assume that all data structures are
aligned properly.
However, in reality, we assume that the data structures are aligned only
to two bytes because .a files only guarantee that their member files are
aligned to two bytes in archive files. So the data access is already
unaligned.
This patch relaxes the alignment requirement even more, so that we
accept unaligned access to all ELF data structures.
This patch in particular makes lld bug-compatible with icc. Intel C
compiler doesn't seem to care about data alignment and generates unaligned
relocation sections (https://bugs.llvm.org/show_bug.cgi?id=35854).
I also saw another instance of compatibility issues with our internal tool
which creates unaligned section headers.
Because GNU linkers are not picky about alignment, looks like it is
not uncommon that ELF-generating tools create unaligned files.
There is a performance penalty with this patch on host machines on which
unaligned access is expensive. x86 and AArch64 are fine. ARMv6 is a
problem, but I don't think using ARMv6 machines as hosts is common, so I
believe it's not a real problem.
Differential Revision: https://reviews.llvm.org/D41978
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322407
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Zachary Turner [Fri, 12 Jan 2018 21:42:39 +0000 (21:42 +0000)]
Update MSF File Documentation.
This adds some more detail about the PDB container format,
specifically surrounding the layout of the Free Page Map.
Patch by Colden Cullen
Differential Revision: https://reviews.llvm.org/D41825
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322404
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Daniel Neilson [Fri, 12 Jan 2018 21:33:37 +0000 (21:33 +0000)]
[NFC] Change MemIntrinsicInst::setAlignment() to take an unsigned instead of a Constant
Summary:
In preparation for https://reviews.llvm.org/D41675 this NFC changes this
prototype of MemIntrinsicInst::setAlignment() to accept an unsigned instead
of a Constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322403
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Changpeng Fang [Fri, 12 Jan 2018 21:12:19 +0000 (21:12 +0000)]
AMDGPU/SI: Add d16 support for buffer intrinsics.
Differential Revision:
https://reviews.llvm.org/D38906
Reviewers:
Matt and Brian.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322402
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Brian M. Rzycki [Fri, 12 Jan 2018 21:06:48 +0000 (21:06 +0000)]
[JumpThreading] Preservation of DT and LVI across the pass
Summary:
See D37528 for a previous (non-deferred) version of this
patch and its description.
Preserves dominance in a deferred manner using a new class
DeferredDominance. This reduces the performance impact of
updating the DominatorTree at every edge insertion and
deletion. A user may call DDT->flush() within JumpThreading
for an up-to-date DT. This patch currently has one flush()
at the end of runImpl() to ensure DT is preserved across
the pass.
LVI is also preserved to help subsequent passes such as
CorrelatedValuePropagation. LVI is simpler to maintain and
is done immediately (not deferred). The code to perform the
preversation was minimally altered and simply marked as
preserved for the PassManager to be informed.
This extends the analysis available to JumpThreading for
future enhancements such as threading across loop headers.
Reviewers: dberlin, kuhar, sebpop
Reviewed By: kuhar, sebpop
Subscribers: mgorny, dmgreen, kuba, rnk, rsmith, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D40146
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322401
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Paul Robinson [Fri, 12 Jan 2018 20:54:45 +0000 (20:54 +0000)]
Try to fix more bots after r322391
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322400
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Florian Hahn [Fri, 12 Jan 2018 20:35:45 +0000 (20:35 +0000)]
Silence GCC 7 warning by using an enum class.
This silences the following GCC7 warning:
lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp:142:30: warning:
enumeral and non-enumeral type in conditional expression [-Wextra]
return F != Colors.end() ? F->second : None;
~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~
Reviewers: amharc, RKSimon, davide
Reviewed By: RKSimon, davide
Differential Revision: https://reviews.llvm.org/D41003
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322398
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Max Moroz [Fri, 12 Jan 2018 20:31:32 +0000 (20:31 +0000)]
[llvm-cov] Skip unnecessary coverage computations for "export -summary-only".
Summary:
This speeds up export "summary-only" execution by an order of magnitude or two,
depending on number of threads used for prepareFileReports execution.
Also includes minor refactoring for splitting render of summary and detailed data
in two independent methods.
Reviewers: vsk, morehouse
Reviewed By: vsk
Subscribers: llvm-commits, kcc
Differential Revision: https://reviews.llvm.org/D42000
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322397
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Rui Ueyama [Fri, 12 Jan 2018 19:59:43 +0000 (19:59 +0000)]
Remove ELFDataTypeTypedefHelper class.
Differential Revision: https://reviews.llvm.org/D41973
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322395
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Paul Robinson [Fri, 12 Jan 2018 19:58:35 +0000 (19:58 +0000)]
Add toothpicks to test from r322391
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322394
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Evandro Menezes [Fri, 12 Jan 2018 19:20:11 +0000 (19:20 +0000)]
[AArch64] Fix scheduling resources for post indexed loads and stores
Fix typos in the default scheduling resources when using the post indexed
addressing modes.
Differential revision: https://reviews.llvm.org/D40511
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322392
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Paul Robinson [Fri, 12 Jan 2018 19:17:50 +0000 (19:17 +0000)]
[DWARFv5] CodeGen support for MD5 file checksums
Pass MD5 checksums through from IR to assembly/object files.
After this, getting Clang to compute the MD5 should be the last step
to supporting MD5 in the DWARF v5 line table header.
Differential Revision: https://reviews.llvm.org/D41926
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322391
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Sam Clegg [Fri, 12 Jan 2018 18:05:40 +0000 (18:05 +0000)]
MC: Remove redundant `SetUsed` arguments in MCSymbol methods
We can probably take this a step further since the only
user of the isUsed flag is AsmParser it should probably
be doing this explicitly. For now this is a step in the
right direction though.
Differential Revision: https://reviews.llvm.org/D41971
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322386
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Simon Pilgrim [Fri, 12 Jan 2018 18:05:29 +0000 (18:05 +0000)]
[X86][SSE] Force blend domains on stack folding tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322385
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Simon Pilgrim [Fri, 12 Jan 2018 18:02:52 +0000 (18:02 +0000)]
[X86][AVX] Regenerate element insertion tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322384
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Craig Topper [Fri, 12 Jan 2018 17:34:09 +0000 (17:34 +0000)]
[X86] Remove unused isel pattern for zero extend from v16i1/v8i1 to v16i32/v8i64.
We have custom lowering on vzext that produces a vselect and a build vector. So zext never gets to isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322381
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Rafael Espindola [Fri, 12 Jan 2018 17:03:43 +0000 (17:03 +0000)]
Allow dso_local on ifunc.
It was never fully disallowed. We were rejecting it in the asm parser,
but not in the verifier.
Currently TargetMachine::shouldAssumeDSOLocal returns true for hidden
ifuncs. I considered changing it and moving the check from the asm
parser to the verifier.
The reason for deciding to allow it instead is that all linkers handle
a direct reference just fine. They use the plt address as the address
of the function. In fact doing that means that clang doesn't have the
same bug as gcc: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83782.
This patch then removes the check from the asm parser and updates the
bitcode reader and writer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322378
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Ben Hamilton [Fri, 12 Jan 2018 15:44:35 +0000 (15:44 +0000)]
[docs] Tweak update to Phabricator docs about setting repository for diffs uploaded via web
Summary:
In D41919, I missed that there was a *second* step when uploading
diffs via web where the repository should be specified.
Reviewers: asb, probinson
Reviewed By: asb
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41956
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322375
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Ben Hamilton [Fri, 12 Jan 2018 15:37:41 +0000 (15:37 +0000)]
[llvm] Set up .arcconfig to point to Diffusion L repository
Summary:
Thanks to probinson for noticing this in his review of D41956.
Now that we have repository callsigns set in all the other
LLVM/Clang projects' .arcconfig files, we can set the top-level
LLVM .arcconfig repository callsign to "L".
This will correctly Cc: llvm-commits@ on all review requests
sent out from the LLVM repo directory, using Herald rule H270.
Reviewers: klimek, sammccall
Reviewed By: sammccall
Subscribers: llvm-commits, probinson, asb
Differential Revision: https://reviews.llvm.org/D41964
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322374
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Benjamin Kramer [Fri, 12 Jan 2018 15:03:24 +0000 (15:03 +0000)]
[PowerPC] Don't miscompile rotate+mask into an ANDIo if it can't recreate the immediate
I'm not even sure if this transform is ever worth it, but this at least
stops the bleeding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322373
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Nemanja Ivanovic [Fri, 12 Jan 2018 14:58:41 +0000 (14:58 +0000)]
[PowerPC] Zero-extend the compare operand for ATOMIC_CMP_SWAP
Part of the fix for https://bugs.llvm.org/show_bug.cgi?id=35812.
This patch ensures that the compare operand for the atomic compare and swap
is properly zero-extended to 32 bits if applicable.
A follow-up commit will fix the extension for the SETCC node generated when
expanding an ATOMIC_CMP_SWAP_WITH_SUCCESS. That will complete the bug fix.
Differential Revision: https://reviews.llvm.org/D41856
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322372
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Stefan Pintilie [Fri, 12 Jan 2018 13:12:49 +0000 (13:12 +0000)]
Revert "[PowerPC] Manually schedule the prologue and epilogue"
This reverts commit r322124 since some tests were broken by that patch.
Will recommmit once the patch is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322369
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Diana Picus [Fri, 12 Jan 2018 12:44:36 +0000 (12:44 +0000)]
[ARM GlobalISel] Add inst selector tests for G_FMA
We don't yet match all the patterns involving G_FMA. Add tests for some
of the ones that we do match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322368
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Diana Picus [Fri, 12 Jan 2018 12:06:01 +0000 (12:06 +0000)]
[ARM GlobalISel] Map G_FMA to FPR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322367
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Diana Picus [Fri, 12 Jan 2018 11:30:45 +0000 (11:30 +0000)]
[ARM GlobalISel] Legalize G_FMA
For hard float with VFP4, it is legal. Otherwise, we use libcalls.
This needs a bit of support in the LegalizerHelper for soft float
because we didn't handle G_FMA libcalls yet. The support is trivial, as
the only difference between G_FMA and other libcalls that we already
handle is that it has 3 input operands rather than just 2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322366
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Max Kazantsev [Fri, 12 Jan 2018 10:00:26 +0000 (10:00 +0000)]
[IRCE][NFC] Make range check's End a non-null SCEV
Currently, IRC contains `Begin` and `Step` as SCEVs and `End` as value.
Aside from that, `End` can also be `nullptr` which can be later conditionally
converted into a non-null SCEV.
To make this logic more transparent, this patch makes `End` a SCEV and
calculates it early, so that it is never a null.
Differential Revision: https://reviews.llvm.org/D39590
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322364
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Andre Vieira [Fri, 12 Jan 2018 09:24:41 +0000 (09:24 +0000)]
[ARM] Add codegen for SMMULR, SMMLAR and SMMLSR
This patch teaches the Arm back-end to generate the SMMULR, SMMLAR and SMMLSR
instructions from equivalent IR patterns.
Differential Revision: https://reviews.llvm.org/D41775
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322361
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Andre Vieira [Fri, 12 Jan 2018 09:21:09 +0000 (09:21 +0000)]
[ARM] Fix erroneous availability of SMMLS for Armv7-M
Differential Revision: https://reviews.llvm.org/D41855
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322360
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Serguei Katkov [Fri, 12 Jan 2018 08:33:34 +0000 (08:33 +0000)]
[CGP] Re-enable Select in complex addressing mode
Re-enable Select after a couple of fixes.
Differential Revision: https://reviews.llvm.org/D40634
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322358
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Serguei Katkov [Fri, 12 Jan 2018 07:24:43 +0000 (07:24 +0000)]
[LoopDeletion] Handle users in unreachable block
This is a fix for PR35884.
When we want to delete dead loop we must clean uses in unreachable blocks
otherwise we'll get an assert during deletion of instructions from the loop.
Reviewers: anna, davide
Reviewed By: anna
Subscribers: llvm-commits, lebedev.ri
Differential Revision: https://reviews.llvm.org/D41943
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322357
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Craig Topper [Fri, 12 Jan 2018 06:48:26 +0000 (06:48 +0000)]
[X86] Don't allow lods/stos/scas/cmps/movs to be parsed without a suffix and only memory operand in at&t syntax.
Without a register with a size being mentioned the instruction is ambiguous in at&t syntax. With Intel syntax the memory operation caries a size that can be used to disambiguate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322356
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Craig Topper [Fri, 12 Jan 2018 06:48:24 +0000 (06:48 +0000)]
[X86] Don't require suffix on 'clr' mnemonic in intel syntax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322355
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Craig Topper [Fri, 12 Jan 2018 06:21:36 +0000 (06:21 +0000)]
[X86] Add 'l' and 'q' suffixes to the tbm instruction mnemonics.
While the suffix isn't required to disambiguate the instructions, it is required in order to parse the instructions when the suffix is specified in order to match the GNU assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322354
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Craig Topper [Fri, 12 Jan 2018 05:38:15 +0000 (05:38 +0000)]
[X86] Disable sldtq parsing in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322353
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Craig Topper [Fri, 12 Jan 2018 05:38:14 +0000 (05:38 +0000)]
[X86] Disable movsq/stosq/scasqcmpsq/lodsq parsing in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322352
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Eric Fiselier [Fri, 12 Jan 2018 04:01:41 +0000 (04:01 +0000)]
[CMake] Add LLVM_ENABLE_IDE option to better process sources for IDE's
Summary:
Currently LLVM has no way to support configuring for IDE's like CLion. Like XCode and MSVC's IDE, CLion needs to see all of the headers and tablegen files in order to properly parse the sources.
This patch adds an `LLVM_ENABLE_IDE` option which can be used to configure for IDE's in general. It is used by `LLVMProcessSources.cmake` to determine if the extra source files should be added to the target.
Unfortunately because of the low level of `LLVMProcessSources.cmake`, I'm not sure where the `LLVM_ENABLE_IDE` option should live. I choose `HandleLLVMOptions.cmake` so that out-of-tree Clang builds would correctly configure the option by default.
Reviewers: beanz, mgorny, lebedev.ri
Reviewed By: beanz
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D40219
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322349
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Rui Ueyama [Fri, 12 Jan 2018 02:28:31 +0000 (02:28 +0000)]
Instead of ELFFile<ELFT>::Type, use ELFT::Type. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322346
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Ana Pazos [Fri, 12 Jan 2018 02:27:00 +0000 (02:27 +0000)]
[RISCV] Pass MCSubtargetInfo to print methods.
Summary:
This change allows checking for ISA extensions in print methods.
Reviewers: asb, niosHD
Reviewed By: asb, niosHD
Subscribers: llvm-commits, niosHD, asb, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal
Differential Revision: https://reviews.llvm.org/D41503
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322345
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Rui Ueyama [Fri, 12 Jan 2018 02:15:41 +0000 (02:15 +0000)]
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322344
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Sam Clegg [Fri, 12 Jan 2018 02:11:31 +0000 (02:11 +0000)]
[WebAssembly] Don't allow functions to be named twice
The spec doesn't allow this.
Differential Revision: https://reviews.llvm.org/D41974
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322343
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Rui Ueyama [Fri, 12 Jan 2018 01:40:32 +0000 (01:40 +0000)]
Use ELF{32,64}{LE,BE} instead of ELFType<{little,big}, {true,false}>. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322342
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Lang Hames [Fri, 12 Jan 2018 00:22:05 +0000 (00:22 +0000)]
[ORC] Add a stub ExecutionSession and VModuleKey type.
ExecutionSession will represent a running JIT program.
VModuleKey is a unique key assigned to each module added as part of
an ExecutionSession. The Layer concept will be updated in future to
require a VModuleKey when a module is added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322336
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David L. Jones [Fri, 12 Jan 2018 00:17:38 +0000 (00:17 +0000)]
Revert r322279 due to Skylake miscompile.
Summary:
This revision causes Skylake (and apparently, only Skylake) codegen to fail in
certain cases. Details: https://bugs.llvm.org/show_bug.cgi?id=35918
Subscribers: sanjoy, llvm-commits
Differential Revision: https://reviews.llvm.org/D41972
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322335
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Sam Clegg [Thu, 11 Jan 2018 23:59:16 +0000 (23:59 +0000)]
[WebAssembly] MC: Remove SetUsed argument when calling MCSymbol::isDefined et al
Summary:
This argument (the isUsed flag) seems to only be relevant
when parsing. Other calls sites such as these don't seem
to ever use it.
Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish
Differential Revision: https://reviews.llvm.org/D41970
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322332
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Sanjay Patel [Thu, 11 Jan 2018 23:27:37 +0000 (23:27 +0000)]
[InstSimplify] fold implied cmp with zero (PR35790)
This doesn't handle the more complicated case in the bug report yet:
https://bugs.llvm.org/show_bug.cgi?id=35790
For that, we have to match / look through a cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322327
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Matthias Braun [Thu, 11 Jan 2018 22:59:33 +0000 (22:59 +0000)]
PeepholeOpt cleanup/refactor; NFC
- Less unnecessary use of `auto`
- Add early `using RegSubRegPair(AndIdx) =` to avoid countless
`TargetInstrInfo::` qualifications.
- Use references instead of pointers where possible.
- Remove unused parameters.
- Rewrite the CopyRewriter class hierarchy:
- Pull out uncoalescable copy rewriting functionality into
PeepholeOptimizer class.
- Use an abstract base class to make it clear that rewriters are
independent.
- Remove unnecessary \brief in doxygen comments.
- Remove unused constructor and method from ValueTracker.
- Replace UseAdvancedTracking of ValueTracker with DisableAdvCopyOpt use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322325
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Evgeniy Stepanov [Thu, 11 Jan 2018 22:53:30 +0000 (22:53 +0000)]
[hwasan] Stack instrumentation.
Summary:
Very basic stack instrumentation using tagged pointers.
Tag for N'th alloca in a function is built as XOR of:
* base tag for the function, which is just some bits of SP (poor
man's random)
* small constant which is a function of N.
Allocas are aligned to 16 bytes. On every ReturnInst allocas are
re-tagged to catch use-after-return.
This implementation has a bunch of issues that will be taken care of
later:
1. lifetime intrinsics referring to tagged pointers are not
recognized in SDAG. This effectively disables stack coloring.
2. Generated code is quite inefficient. There is one extra
instruction at each memory access that adds the base tag to the
untagged alloca address. It would be better to keep tagged SP in a
callee-saved register and address allocas as an offset of that XOR
retag, but that needs better coordination between hwasan
instrumentation pass and prologue/epilogue insertion.
3. Lifetime instrinsics are ignored and use-after-scope is not
implemented. This would be harder to do than in ASan, because we
need to use a differently tagged pointer depending on which
lifetime.start / lifetime.end the current instruction is dominated
/ post-dominated.
Reviewers: kcc, alekseyshl
Subscribers: srhines, kubamracek, javed.absar, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D41602
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322324
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Sanjay Patel [Thu, 11 Jan 2018 22:48:07 +0000 (22:48 +0000)]
[InstSimplify] add tests for implied cmp with zero (PR35790); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322323
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Matthias Braun [Thu, 11 Jan 2018 22:30:43 +0000 (22:30 +0000)]
PeepholeOptimizer: Fix for vregs without defs
The PeepholeOptimizer would fail for vregs without a definition. If this
was caused by an undef operand abort to keep the code simple (so we
don't need to add logic everywhere to replicate the undef flag).
Differential Revision: https://reviews.llvm.org/D40763
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322319
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Rafael Espindola [Thu, 11 Jan 2018 22:15:05 +0000 (22:15 +0000)]
Make internal/private GVs implicitly dso_local.
While updating clang tests for having clang set dso_local I noticed
that:
- There are *a lot* of tests to update.
- Many of the updates are redundant.
They are redundant because a GV is "obviously dso_local". This patch
starts formalizing that a bit by requiring that internal and private
GVs be dso_local too. Since they all are, we don't have to print
dso_local to the textual representation, making it a bit more compact
and easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322317
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Paul Robinson [Thu, 11 Jan 2018 22:03:43 +0000 (22:03 +0000)]
Tighten up DIFile verifier for checksums
Differential Revision: https://reviews.llvm.org/D41965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322314
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Matthias Braun [Thu, 11 Jan 2018 21:57:03 +0000 (21:57 +0000)]
PeepholeOptimizer: Do not form PHI with subreg arguments
When replacing a PHI the PeepholeOptimizer currently takes the register
class of the register at the first operand. This however is not correct
if this argument has a subregister index.
As there is currently no API to query the register class resulting from
applying a subregister index to all registers in a class, we can only
abort in these cases and not perform the transformation.
This changes findNextSource() to require the end of all copy chains to
not use a subregister if there is any PHI in the chain. I had to rewrite
the overly complicated inner loop there to have a good place to insert
the new check.
This fixes https://llvm.org/PR33071 (aka rdar://
32262041)
Differential Revision: https://reviews.llvm.org/D40758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322313
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Evgeniy Stepanov [Thu, 11 Jan 2018 21:37:58 +0000 (21:37 +0000)]
[arm] Implement Target Operand Flag MIR serialization.
Reviewers: efriedma, pcc
Subscribers: aemerson, javed.absar, kristof.beyls, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D39975
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322312
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Fiona Glaser [Thu, 11 Jan 2018 21:28:57 +0000 (21:28 +0000)]
[Sink] Really really fix predicate in legality check
LoadInst isn't enough; we need to include intrinsics that perform loads too.
All side-effecting intrinsics and such are already covered by the isSafe
check, so we just need to care about things that read from memory.
D41960, originally from D33179.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322311
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Sam Clegg [Thu, 11 Jan 2018 20:35:17 +0000 (20:35 +0000)]
[WebAssemlby] MC: Don't write COMDAT symbols as global imports
This was causing undefined references at link time in lld.
Differential Revision: https://reviews.llvm.org/D41959
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322309
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Craig Topper [Thu, 11 Jan 2018 19:38:30 +0000 (19:38 +0000)]
[X86] Legalize 128/256 gathers/scatters on KNL by using widening rather than sign extending the index.
We can just widen the vectors with undef and zero extend the mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322308
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Sam Clegg [Thu, 11 Jan 2018 19:37:03 +0000 (19:37 +0000)]
[WebAssemly] Rename and improve formatting for ctor/dtor test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322307
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Aaron Ballman [Thu, 11 Jan 2018 18:47:15 +0000 (18:47 +0000)]
Use size_t to represent the size of a StringMapEntry length and alignment rather than unsigned.
Patch by Matt Davis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322305
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Adrian Prantl [Thu, 11 Jan 2018 18:35:12 +0000 (18:35 +0000)]
dag-combine: Transfer debug information when folding (zext (truncate x))
-> (zext (truncate x))
This patch adds debug info support to the dagcombine rule (zext
(truncate x)) -> (zext (truncate x)).
Differential Revision: https://reviews.llvm.org/D41924
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322304
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Krzysztof Parzyszek [Thu, 11 Jan 2018 18:30:41 +0000 (18:30 +0000)]
[Hexagon] Fix building 64-bit vector from constant values
The constants were aggregated in a reverse order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322303
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Krzysztof Parzyszek [Thu, 11 Jan 2018 18:03:23 +0000 (18:03 +0000)]
[Hexagon] Cast elements to correct type when creating constant vector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322301
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Zvi Rackover [Thu, 11 Jan 2018 18:02:33 +0000 (18:02 +0000)]
DAGCombine: Let truncates negate extension through extract-subvector
Summary:
Fold cases such as:
(v8i8 truncate (v8i32 extract_subvector (v16i32 sext (v16i8 V), Idx)))
->
(v8i8 extract_subvector (v16i8 V), Idx)
This can be generalized to cases where the truncate and extend do not
fully cancel each other out, but it may require querying the target
about profitability.
Reviewers: RKSimon, craig.topper, spatel, efriedma
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41927
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322300
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Krzysztof Parzyszek [Thu, 11 Jan 2018 18:02:13 +0000 (18:02 +0000)]
[Hexagon] Impose limits on container sizes in HexagonGenInsert
With over 300k virtual registers, the size of the data exceeded 12GB.
Impose limits on how much information is collected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322299
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Krzysztof Parzyszek [Thu, 11 Jan 2018 17:59:34 +0000 (17:59 +0000)]
[Hexagon] Use SetVector when queuing nodes to scan in selectVectorConstants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322298
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Zvi Rackover [Thu, 11 Jan 2018 17:50:34 +0000 (17:50 +0000)]
X86 Tests: Add zext cases in (trunc (subvector)) test. NFC
Cases were missing as observed in D41927
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322297
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Zvi Rackover [Thu, 11 Jan 2018 17:29:47 +0000 (17:29 +0000)]
X86: Refactor type-splitting to target-legal size vector to a helper function
Summary: This is a preparatory step for D41811: refactoring code for breaking vector operands of binary operation to legal-types.
Reviewers: RKSimon, craig.topper, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41925
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322296
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Simon Pilgrim [Thu, 11 Jan 2018 16:57:58 +0000 (16:57 +0000)]
[X86][SSE] Drop old insertps stack folding test
Broken test from old attempt for folding tables - we don't peek through extract_subvector spills at all (which is why it doesn't fold), and we already have foldMemoryOperandCustom to handle insertps immediate correction anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322292
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Joel Jones [Thu, 11 Jan 2018 16:50:56 +0000 (16:50 +0000)]
[AArch64] Remove Unsupported = 1 flag for the WriteAtomic WriteRes.
In practice, this patch has no effect on scheduling.
There is no test case as there already exists a comprehensive test case for
LSE Atomics.
Patch by Stefan Teleman
Differential Revision: https://reviews.llvm.org/D40694
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322291
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Ben Hamilton [Thu, 11 Jan 2018 16:30:08 +0000 (16:30 +0000)]
[docs] Update Phabricator docs about setting repository for diffs uploaded via web
Summary:
Docs are out of date now that we have separate repositories for LLVM,
Clang, etc.
Reviewers: asb
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D41919
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322290
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Daniel Neilson [Thu, 11 Jan 2018 16:28:32 +0000 (16:28 +0000)]
[NFC] Abstract out source argument index in MemTransferInst.
Summary:
References to the source operand within class MemTransferInst are currently
by a constant 1. Abstract this out into a named constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322289
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Benjamin Kramer [Thu, 11 Jan 2018 15:33:21 +0000 (15:33 +0000)]
[InstCombine] Apply the fix from r322284 for sin / cos -> tan too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322285
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Benjamin Kramer [Thu, 11 Jan 2018 15:19:02 +0000 (15:19 +0000)]
[InstCombine] For cos/sin -> tan copy attributes from cos instead of the
parent function
Ideally we should merge the attributes from the functions somehow, but
this is obviously an improvement over taking random attributes from the
caller which will trip up the verifier if they're nonsensical for an
unary intrinsic call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322284
91177308-0d34-0410-b5e6-
96231b3b80d8