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Dean Michael Berris [Fri, 8 Sep 2017 01:47:56 +0000 (01:47 +0000)]
[XRay][CodeGen][PowerPC] Fix tail exit codegen for XRay in PPC
Summary:
This fixes code-gen for XRay in PPC. The regression wasn't caught by
codegen tests which we add in this change.
What happened was the following:
- For tail exits, we used to unconditionally prepend the returns/exits
with a pseudo-instruction that gets lowered to the instrumentation
sled (and leave the actual return/exit instruction as-is).
- Changes to the XRay instrumentation pass caused the tail exits to
suddenly also emit the tail exit pseudo-instruction, since the check
for whether a return instruction was also a call instruction meant it
was a tail exit instruction.
- None of the tests caught the regression either due to non-existent
tests, or the tests being disabled/removed for continuous breakage.
This change re-introduces some of the basic tests and verifies that
we're back to a state that allows the back-end to generate appropriate
XRay instrumented binaries for PPC in the presence of tail exits.
Reviewers: echristo, timshen
Subscribers: nemanjai, kbarton, llvm-commits
Differential Revision: https://reviews.llvm.org/D37570
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312772
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Chandler Carruth [Fri, 8 Sep 2017 00:17:12 +0000 (00:17 +0000)]
[x86] Flesh out the custom ISel for RMW aritmetic ops with used flags to
cover the bitwise operators.
Nothing really exciting here, this just stamps out the rest of the core
operations that can RMW memory and set flags.
Still not implemented here: ADC, SBB. Those will require more
interesting logic to channel the flags *in*, and I'm not currently
planning to try to tackle that. It might be interesting for someone who
wants to improve our code generation for bignum implementations.
Differential Revision: https://reviews.llvm.org/D37141
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312768
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Peter Collingbourne [Fri, 8 Sep 2017 00:10:53 +0000 (00:10 +0000)]
WholeProgramDevirt: When promoting for single-impl devirt, also rename the comdat.
This is required when targeting COFF, as the comdat name must match
one of the names of the symbols in the comdat.
Differential Revision: https://reviews.llvm.org/D37550
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312767
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Chandler Carruth [Thu, 7 Sep 2017 23:54:24 +0000 (23:54 +0000)]
[x86] Extend the manual ISel of `add` and `sub` with both RMW memory
operands and used flags to support matching immediate operands.
This is a bit trickier than register operands, and we still want to fall
back on a register operands even for things that appear to be
"immediates" when they won't actually select into the operation's
immediate operand. This also requires us to handle things like selecting
`sub` vs. `add` to minimize the number of bits needed to represent the
immediate, and picking the shortest immediate encoding. In order to
that, we in turn need to scan to make sure that CF isn't used as it will
get inverted.
The end result seems very nice though, and we're now generating
optimal instruction sequences for these patterns IMO.
A follow-up patch will further expand this to other operations with RMW
memory operands. But handing `add` and `sub` are useful starting points
to flesh out the machinery and make sure interesting and complex cases
can be handled.
Thanks to Craig Topper who provided a few fixes and improvements to this
patch in addition to the review!
Differential Revision: https://reviews.llvm.org/D37139
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312764
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Rafael Espindola [Thu, 7 Sep 2017 23:30:48 +0000 (23:30 +0000)]
Don't call exit from cl::PrintHelpMessage.
Most callers were not expecting the exit(0) and trying to exit with a
different value.
This also adds back the call to cl::PrintHelpMessage in llvm-ar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312761
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Eugene Zelenko [Thu, 7 Sep 2017 23:28:24 +0000 (23:28 +0000)]
[Bitcode] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312760
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Reid Kleckner [Thu, 7 Sep 2017 23:27:44 +0000 (23:27 +0000)]
Sink some IntrinsicInst.h and Intrinsics.h out of llvm/include
Many of these uses can get by with forward declarations. Hopefully this
speeds up compilation after adding a single intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312759
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Richard Trieu [Thu, 7 Sep 2017 23:20:35 +0000 (23:20 +0000)]
Revert r312318, r312325, r312424, r312489
r312318 - Debug info for variables whose type is shrinked to bool
r312325, r312424, r312489 - Test case for r312318
Revision 312318 introduced a null dereference bug.
Details in https://bugs.llvm.org/show_bug.cgi?id=34490
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312758
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Petr Hosek [Thu, 7 Sep 2017 23:02:50 +0000 (23:02 +0000)]
[llvm-objcopy] Add support for special section indexes in symbol table greater than SHN_LORESERVE
As is indexes above SHN_LORESERVE will not be handled correctly because
they'll be treated as indexes of sections rather than special values
that should just be copied. This change adds support to copy them
though.
Patch by Jake Ehrlich
Differential Revision: https://reviews.llvm.org/D37393
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312756
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Reid Kleckner [Thu, 7 Sep 2017 22:46:24 +0000 (22:46 +0000)]
Move duplicate helpers from DbgValueInst / DbgDeclareInst to DbgInfoIntrinsic
NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312754
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Rafael Espindola [Thu, 7 Sep 2017 22:20:38 +0000 (22:20 +0000)]
llvm-ar: exit with 1 if there is an error.
This is pr34396.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312752
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Paul Robinson [Thu, 7 Sep 2017 22:15:44 +0000 (22:15 +0000)]
[DWARF] Line 0 should not have a discriminator.
It's meaningless and takes up extra space in the line table.
Differential Revision: https://reviews.llvm.org/D37364
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312751
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Reid Kleckner [Thu, 7 Sep 2017 21:28:09 +0000 (21:28 +0000)]
Fix llvm-xray tests to avoid subshells
We already uses pipefail to detect failure of a redirected command, so
the "|| echo failure" construct was unnecessary.
These tests run and pass on Windows now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312747
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Lang Hames [Thu, 7 Sep 2017 21:04:00 +0000 (21:04 +0000)]
[ORC] Add ErrorSuccess and void specializations to AsyncHandlerTraits.
This will allow async handlers to be added that return void or Error::success().
Such handlers are expected to be common, since one of the primary uses of
addAsyncHandler is to run the body of the handler in a detached thread, in which
case the main handler returns immediately and does not need to provide an Error
value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312746
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Petr Hosek [Thu, 7 Sep 2017 20:44:16 +0000 (20:44 +0000)]
[yaml2obj][ELF] Add support for symbol indexes greater than SHN_LORESERVE
Right now Symbols must be either undefined or defined in a specific
section. Some symbols have section indexes like SHN_ABS however. This
change adds support for outputting symbols that have such section
indexes.
Patch by Jake Ehrlich
Differential Revision: https://reviews.llvm.org/D37391
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312745
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Peter Collingbourne [Thu, 7 Sep 2017 20:39:46 +0000 (20:39 +0000)]
COFF: PDB: Allow multiple modules with the same name.
It is possible for two modules to have the same name if they are
archive members with the same name, or if we are doing LTO (in which
case all modules will have the name "lto.tmp").
Differential Revision: https://reviews.llvm.org/D37589
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312744
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Peter Collingbourne [Thu, 7 Sep 2017 19:17:30 +0000 (19:17 +0000)]
Remove dead code. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312740
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Keith Wyss [Thu, 7 Sep 2017 19:10:34 +0000 (19:10 +0000)]
[XRay][tools] Disable windows for tests that use an unsupported shell redirect.
The tests are filechecking against stderr and use some magic to make stdout go
away and pipe stderr to FileCheck. This broke bots on windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312739
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Artem Belevich [Thu, 7 Sep 2017 18:14:32 +0000 (18:14 +0000)]
[CUDA] Added rudimentary support for CUDA-9 and sm_70.
For now CUDA-9 is not included in the list of CUDA versions clang
searches for, so the path to CUDA-9 must be explicitly passed
via --cuda-path=.
On LLVM side NVPTX added sm_70 GPU type which bumps required
PTX version to 6.0, but otherwise is equivalent to sm_62 at the moment.
Differential Revision: https://reviews.llvm.org/D37576
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312734
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Keith Wyss [Thu, 7 Sep 2017 18:07:48 +0000 (18:07 +0000)]
[XRay][tools] Function call stack based analysis tooling for XRay traces
Second try after fixing a code san problem with iterator reference types.
This change introduces a subcommand to the llvm-xray tool called
"stacks" which allows for analysing XRay traces provided as inputs and
accounting time to stacks instead of just individual functions. This
gives us a more precise view of where in a program the latency is
actually attributed.
The tool uses a trie data structure to keep track of the caller-callee
relationships as we process the XRay traces. In particular, we keep
track of the function call stack as we enter functions. While we're
doing this we're adding nodes in a trie and indicating a "calls"
relatinship between the caller (current top of the stack) and the callee
(the new top of the stack). When we push function ids onto the stack, we
keep track of the timestamp (TSC) for the enter event.
When exiting functions, we are able to account the duration by getting
the difference between the timestamp of the exit event and the
corresponding entry event in the stack. This works even if we somehow
miss the exit events for intermediary functions (i.e. if the exit event
is not cleanly associated with the enter event at the top of the stack).
The output of the tool currently provides just the top N leaf functions
that contribute the most latency, and the top N stacks that have the
most frequency. In the future we can provide more sophisticated query
mechanisms and potentially an export to database feature to make offline
analysis of the stack traces possible with existing tools.
Differential revision: D34863
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312733
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Matt Arsenault [Thu, 7 Sep 2017 18:05:07 +0000 (18:05 +0000)]
AMDGPU: Start selecting v_mad_mix_f32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312732
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Matt Arsenault [Thu, 7 Sep 2017 17:24:43 +0000 (17:24 +0000)]
DAG: Allow creating extract_vector_elt post-legalize
Fixes some combine issues for AMDGPU where we weren't
getting the many extract_vector_elt combines expected
in a future patch.
This should really be checking isOperationLegalOrCustom on
the extract. That improves a number of x86 lit tests, but
a few get stuck in an infinite loop from one place
where a similar looking extract is created. I have a
different workaround in the backend for that which
keeps many of those improvements, but also adds a few
regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312730
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Konstantin Zhuravlyov [Thu, 7 Sep 2017 17:14:54 +0000 (17:14 +0000)]
AMDGPU: Handle non-temporal loads and stores
Differential Revision: https://reviews.llvm.org/D36862
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312729
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Konstantin Zhuravlyov [Thu, 7 Sep 2017 16:14:21 +0000 (16:14 +0000)]
AMDGPU: Handle more than one memory operand in SIMemoryLegalizer
Differential Revision: https://reviews.llvm.org/D37397
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312725
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Benjamin Kramer [Thu, 7 Sep 2017 14:52:26 +0000 (14:52 +0000)]
[ARM] Remove redundant vcvt patterns.
These don't add any value as they're just compositions of existing
patterns. However, they can confuse the cost logic in ISel, leading to
duplicated vcvt instructions like in PR33199.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312724
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Michael Zuckerman [Thu, 7 Sep 2017 14:02:13 +0000 (14:02 +0000)]
[X86][LLVM]Expanding Supports lowerInterleavedLoad() in X86InterleavedAccess (VF{8|16|32} stride 3).
This patch expands the support of lowerInterleavedload to {8|16|32}x8i stride 3.
LLVM creates suboptimal shuffle code-gen for AVX2. In overall, this patch is a specific fix for the pattern (Strid=3 VF={8|16|32}) and we plan to include the store (deinterleved side).
The patch goal is to optimize the following sequence:
a0 b0 c0 a1 b1 c1 a2 b2
c2 a3 b3 c3 a4 b4 c4 a5
b5 c5 a6 b6 c6 a7 b7 c7
into
a0 a1 a2 a3 a4 a5 a6 a7
b0 b1 b2 b3 b4 b5 b6 b7
c0 c1 c2 c3 c4 c5 c6 c7
Reviewers
1. zvi
2. igor
3. guyblank
4. dorit
5. Ayal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312722
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Simon Atanasyan [Thu, 7 Sep 2017 12:54:26 +0000 (12:54 +0000)]
[mips] Use RegisterMCAsmBackend to register all MIPS asm backends. NFC
This change converts the `MipsAsmBackend` constructor to the "standard"
form. It makes possible to use `RegisterMCAsmBackend` for the backends
registrations. Now we pass `Triple` instance to the `MipsAsmBackend`
ctor and deduce all required options like endianness and bitness from
the triple. We still need to implement explicit ABI checking for
providing correct options to backends.
Differential revision: https://reviews.llvm.org/D37519
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312720
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Florian Hahn [Thu, 7 Sep 2017 12:49:39 +0000 (12:49 +0000)]
[MachineCombiner] Update instruction depths incrementally for large BBs.
Summary:
For large basic blocks with lots of combinable instructions, the
MachineTraceMetrics computations in MachineCombiner can dominate the compile
time, as computing the trace information is quadratic in the number of
instructions in a BB and it's relevant successors/predecessors.
In most cases, knowing the instruction depth should be enough to make
combination decisions. As we already iterate over all instructions in a basic
block, the instruction depth can be computed incrementally. This reduces the
cost of machine-combine drastically in cases where lots of instructions
are combined. The major drawback is that AFAIK, computing the critical path
length cannot be done incrementally. Therefore we only compute
instruction depths incrementally, for basic blocks with more
instructions than inc_threshold. The -machine-combiner-inc-threshold
option can be used to set the threshold and allows for easier
experimenting and checking if using incremental updates for all basic
blocks has any impact on the performance.
Reviewers: sanjoy, Gerolf, MatzeB, efriedma, fhahn
Reviewed By: fhahn
Subscribers: kiranchandramohan, javed.absar, efriedma, llvm-commits
Differential Revision: https://reviews.llvm.org/D36619
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312719
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Florian Hahn [Thu, 7 Sep 2017 11:51:30 +0000 (11:51 +0000)]
[MachineTraceMetrics] Add computeDepth function (NFCI).
Summary:
This function is used in D36619 to update the instruction depths
incrementally.
Reviewers: efriedma, Gerolf, MatzeB, fhahn
Reviewed By: fhahn
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D36696
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312714
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Alex Bradbury [Thu, 7 Sep 2017 11:30:55 +0000 (11:30 +0000)]
[Sparc][NFC] Clean up SelectCC lowering
The ARM, BPF, MSP430, Sparc and Mips backends all use a similar code sequence
for lowering SelectCC. As pointed out by @reames in D29937, this code isn't
particularly clear and in most of these backends doesn't actually match the
comments. This patch makes the code sequence clearer for the Sparc backend
through better variable naming and more accurate comments (e.g. we are
inserting triangle control flow, _not_ diamond). There is no functional
change.
Differential Revision: https://reviews.llvm.org/D37194
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312713
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Benjamin Kramer [Thu, 7 Sep 2017 09:54:03 +0000 (09:54 +0000)]
Fixing incorrectly capitalised regexps.
Patch by Sam Allen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312709
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Jonas Paulsson [Thu, 7 Sep 2017 09:13:17 +0000 (09:13 +0000)]
Revert "[RegAlloc] Make sure live-ranges reflect the state of the IR when removing them"
This temporarily reverts commit
463fa38 (r311401).
See https://bugs.llvm.org/show_bug.cgi?id=34502
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312708
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Alexander Ivchenko [Thu, 7 Sep 2017 08:59:05 +0000 (08:59 +0000)]
[x86] Update to cmov promotion tests for D36711; NFC
Adding i8 -> [i16, i32, i64] and i32 -> i64 cases.
This way we can see what the current codegen looks like.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312707
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Zvi Rackover [Thu, 7 Sep 2017 07:40:34 +0000 (07:40 +0000)]
X86: Improve AVX512 fptoui lowering
Summary:
Add patterns for
fptoui <16 x float> to <16 x i8>
fptoui <16 x float> to <16 x i16>
Reviewers: igorb, delena, craig.topper
Reviewed By: craig.topper
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D37505
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312704
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Craig Topper [Thu, 7 Sep 2017 06:11:10 +0000 (06:11 +0000)]
[X86] Force shuffle lowering to only create X86ISD::VPERM2X128 with 64-bit element types so we can remove some patterns from isel.
Intrinsic handling is still creating these nodes with 32-bit elements as well. But at least this gets rid of 8 and 16.
Ideally, someday we'll convert the intrinsics to generic vector shuffles and remove the intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312702
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Matt Arsenault [Thu, 7 Sep 2017 05:37:34 +0000 (05:37 +0000)]
AMDGPU: Don't legalize i16 extloads to i32 with legal i16
Keeping non-i16 extloads makes it easier to match some new
gfx9 load instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312699
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Peter Collingbourne [Thu, 7 Sep 2017 05:35:35 +0000 (05:35 +0000)]
ModuleSummaryAnalysis: Correctly handle all function operand references.
The current code that handles personality functions when creating a
module summary does not correctly handle the case where a function's
personality function operand refers to the function indirectly
(e.g. via a bitcast). This patch handles such cases by treating
personality function references like any other reference, i.e. by
adding them to the function's reference list. This has the minor side
benefit of allowing personality functions to participate in early
dead stripping.
We do this by calling findRefEdges on the function itself. This way
we also end up handling other function operands (specifically prefix
data and prologue data) for free.
Differential Revision: https://reviews.llvm.org/D37553
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312698
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Craig Topper [Thu, 7 Sep 2017 05:08:16 +0000 (05:08 +0000)]
[X86] Remove patterns for selecting a v8f32 X86ISD::MOVSS or v4f64 X86ISD::MOVSD.
I don't think we ever generate these. If we did, I would expect we would also be able to generate v16f32 and v8f64, but we don't have those patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312694
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Saleem Abdulrasool [Thu, 7 Sep 2017 04:00:13 +0000 (04:00 +0000)]
ARM: track globals promoted to coalesced const pool entries
Globals that are promoted to an ARM constant pool may alias with another
existing constant pool entry. We need to keep a reference to all globals
that were promoted to each constant pool value so that we can emit a
distinct label for each promoted global. These labels are necessary so
that debug info can refer to the promoted global without an undefined
reference during linking.
Patch by Stephen Crane!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312692
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Peter Collingbourne [Thu, 7 Sep 2017 01:33:52 +0000 (01:33 +0000)]
Object: Downgrade invalid weak externals from an assert fail to an llvm::Error when creating an irsymtab.
This fixes bitcode emission for modules containing invalid weak externals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312686
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Matt Arsenault [Thu, 7 Sep 2017 01:21:43 +0000 (01:21 +0000)]
InstSimplify: canonicalize is idempotent
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312685
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Peter Collingbourne [Thu, 7 Sep 2017 00:55:00 +0000 (00:55 +0000)]
LTO: Remove unnecessary Windows support code.
I empirically verified that open files can in fact be renamed on
Windows with sys::fs::rename, so remove the incorrect code and comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312683
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Petr Hosek [Wed, 6 Sep 2017 23:41:02 +0000 (23:41 +0000)]
Reland "[llvm-objcopy] Add support for relocations"
This change adds support for SHT_REL and SHT_RELA sections in
llvm-objcopy.
Patch by Jake Ehrlich
Differential Revision: https://reviews.llvm.org/D36554
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312680
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Eugene Zelenko [Wed, 6 Sep 2017 23:05:38 +0000 (23:05 +0000)]
[Pass] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312679
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Zvi Rackover [Wed, 6 Sep 2017 23:04:28 +0000 (23:04 +0000)]
Util: Improve update_llc_test_checks to scrub macosx-style assembly annotations
Summary:
In D37523 Sanjay pointed out that the tool does not scrub macosx-style 'End of Function' annotations,
where the comments begin with a double-#.
I tested this patch by verifying all existing occurences of 'End function' are scrubbed:
find ./test/CodeGen/X86 -name '*.ll' | xargs grep -l "End function" | xargs utils/update_llc_test_checks.py --llc-binary build/bin/llc
Reviewers: spatel, chandlerc, craig.topper
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D37532
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312678
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Stanislav Mekhanoshin [Wed, 6 Sep 2017 22:27:29 +0000 (22:27 +0000)]
[AMDGPU] Use v_pk_max_f16 for fcanonicalize
Differential Revision: https://reviews.llvm.org/D37325
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312676
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Sam Clegg [Wed, 6 Sep 2017 22:05:41 +0000 (22:05 +0000)]
[WebAssembly] Only treat imports/exports as symbols when reading relocatable object files
This change only treats imported and exports functions and globals
as symbol table entries the object has a "linking" section (i.e. it is
relocatable object file).
In this case all globals must be of type I32 and initialized with
i32.const. This was previously being assumed but not checked for and
was causing a failure on big endian machines due to using the wrong
value of then union.
See: https://bugs.llvm.org/show_bug.cgi?id=34487
Differential Revision: https://reviews.llvm.org/D37497
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312674
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Rui Ueyama [Wed, 6 Sep 2017 22:05:32 +0000 (22:05 +0000)]
Removes redundant `llvm::`, add comments and simplify a return type of a function.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312673
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Matthias Braun [Wed, 6 Sep 2017 20:45:24 +0000 (20:45 +0000)]
Insert IMPLICIT_DEFS for undef uses in tail merging
Tail merging can convert an undef use into a normal one when creating a
common tail. Doing so can make the register live out from a block which
previously contained the undef use. To keep the liveness up-to-date,
insert IMPLICIT_DEFs in such blocks when necessary.
To enable this patch the computeLiveIns() function which used to
compute live-ins for a block and set them immediately is split into new
functions:
- computeLiveIns() just computes the live-ins in a LivePhysRegs set.
- addLiveIns() applies the live-ins to a block live-in list.
- computeAndAddLiveIns() is a convenience function combining the other
two functions and behaving like computeLiveIns() before this patch.
Based on a patch by Krzysztof Parzyszek <kparzysz@codeaurora.org>
Differential Revision: https://reviews.llvm.org/D37034
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312668
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Mandeep Singh Grang [Wed, 6 Sep 2017 20:19:10 +0000 (20:19 +0000)]
[docs] Add a note on iteration of unordered containers to coding standards
Summary: Beware of non-determinism due to ordering of pointers
Reviewers: dblaikie, dexonsmith
Reviewed By: dblaikie
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D37525
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312667
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Krzysztof Parzyszek [Wed, 6 Sep 2017 19:36:58 +0000 (19:36 +0000)]
Disable jump threading into loop headers
Consider this type of a loop:
for (...) {
...
if (...) continue;
...
}
Normally, the "continue" would branch to the loop control code that
checks whether the loop should continue iterating and which contains
the (often) unique loop latch branch. In certain cases jump threading
can "thread" the inner branch directly to the loop header, creating
a second loop latch. Loop canonicalization would then transform this
loop into a loop nest. The problem with this is that in such a loop
nest neither loop is countable even if the original loop was. This
may inhibit subsequent loop optimizations and be detrimental to
performance.
Differential Revision: https://reviews.llvm.org/D36404
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312664
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Sanjay Patel [Wed, 6 Sep 2017 19:05:20 +0000 (19:05 +0000)]
[x86] fix triple and regenerate checks for psubus; NFC
Patch by Yulia Koval!
Differential Revision: https://reviews.llvm.org/D37523
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312662
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Craig Topper [Wed, 6 Sep 2017 19:03:55 +0000 (19:03 +0000)]
[X86] Move more isel patterns to X86InstrVecCompiler.td. NFC
This moves more of our subvector insert/extract tricks to X86InstrVecCompiler.td and refactors them into multiclasses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312661
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Stanislav Mekhanoshin [Wed, 6 Sep 2017 18:29:51 +0000 (18:29 +0000)]
[AMDGPU] Fixed encoding of v_pk_mul_f16 in fcanonicalize
Differential Revision: https://reviews.llvm.org/D37522
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312660
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Krzysztof Parzyszek [Wed, 6 Sep 2017 17:57:13 +0000 (17:57 +0000)]
[IfConversion] Remove kill flags from common instructions as well
When if-converting a diamond, two separate blocks will be placed back
to back to form a straight line code. To ensure correctness of the
liveness information, any registers that are live in the second block
should not be killed in the first block, even if they were in the
original code.
Additionally, when the two blocks share common instructions at the
beginning, these instructions will not be duplicated, but only placed
once, before both of the blocks. Since the function "isIdenticalTo"
(as used here) ignores kill flags, the common initial code in one
block may have a kill flag for a register that is live in the other
block.
Because the code that removes kill flags only runs for the non-common
parts of the predicated blocks, a kill flag mismatch in the common
code could still lead to a live register being killed prematurely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312654
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Craig Topper [Wed, 6 Sep 2017 17:06:40 +0000 (17:06 +0000)]
[X86] Actually add the new file that was supposed to go with r312649.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312650
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Craig Topper [Wed, 6 Sep 2017 16:56:52 +0000 (16:56 +0000)]
[X86] Introduce a new td file to hold patterns some of the non instruction patterns from SSE and AVX512
This patch moves some of similar non-instruction patterns from X86InstrSSE.td and X86InstrAVX512.td to a common file.
This is intended as a starting point. There are many other optimization patterns that exist in both files that we could move here.
Differential Revision: https://reviews.llvm.org/D37455
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312649
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Nuno Lopes [Wed, 6 Sep 2017 16:55:31 +0000 (16:55 +0000)]
Fix PR33878: BasicAA incorrectly assumes different address spaces don't alias
Remove code that assumed that a nullptr of address space != 0 couldnt alias with a non-null pointer. This is incorrect, since nothing can be concluded about a null pointer in an address space != 0.
This code was written before address spaces were introduced
Differential Revision: https://reviews.llvm.org/D37518
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312648
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Alexander Kornienko [Wed, 6 Sep 2017 16:28:33 +0000 (16:28 +0000)]
Minor style fixes in lib/Support/**/Program.(inc|cpp).
No functional changes intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312646
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Petr Hosek [Wed, 6 Sep 2017 16:23:15 +0000 (16:23 +0000)]
Revert "[llvm-objcopy] Add support for relocations"
This reverts r312643 because it's failing on llvm-i686-linux-RA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312645
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Krzysztof Parzyszek [Wed, 6 Sep 2017 16:22:55 +0000 (16:22 +0000)]
[Hexagon] Add option to generate calls to "abort" for "unreachable"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312644
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Petr Hosek [Wed, 6 Sep 2017 16:19:48 +0000 (16:19 +0000)]
[llvm-objcopy] Add support for relocations
This change adds support for SHT_REL and SHT_RELA sections in
llvm-objcopy.
Patch by Jake Ehrlich
Differential Revision: https://reviews.llvm.org/D36554
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312643
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Wei Mi [Wed, 6 Sep 2017 16:05:17 +0000 (16:05 +0000)]
[TailCall] Allow llvm.memcpy/memset/memmove to be tail calls when parent
function return the intrinsics's first argument.
llvm.memcpy/memset/memmove return void but they will return the first
argument after they are expanded as libcalls. Now if the parent function
has any return value, llvm.memcpy cannot be turned into tail call after
expansion.
The patch is to handle that case in SelectionDAGBuilder so when caller
function return the same value as the first argument of llvm.memcpy,
tail call is allowed.
Differential Revision: https://reviews.llvm.org/D37406
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312641
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Stanislav Mekhanoshin [Wed, 6 Sep 2017 15:31:30 +0000 (15:31 +0000)]
[AMDGPU] Fix shouldClusterMemOps to process flat loads
Flat loads do not have vdata operand but have vdst instead.
Differential Revision: https://reviews.llvm.org/D37502
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312640
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Nicolai Haehnle [Wed, 6 Sep 2017 13:50:13 +0000 (13:50 +0000)]
AMDGPU: Make worst-case assumption about the wait states in inline assembly
Summary:
Mesa still uses a hack where empty inline assembly is used as a kind of
optimization barrier. This exposed a problem where not enough wait states
were inserted, because the hazard recognizer implicitly assumed that each
inline assembly "instruction" has at least one wait state.
Reviewers: arsenm
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D37205
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312635
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Simon Pilgrim [Wed, 6 Sep 2017 10:23:12 +0000 (10:23 +0000)]
[X86][X87] Ensure x87 instructions are tagged as altering the FPSW reg
As noted in PR34080, a lot of x87 instructions alter the FPSW status register (or leave it in an undefined state) but aren't tagged as such in the tablegen.
This patch tags the control word, stack, wait and math instructions as altering FPSW, which matches what the AMD APMs suggests happens.
Differential Revision: https://reviews.llvm.org/D36414
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312629
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Alex Bradbury [Wed, 6 Sep 2017 09:21:21 +0000 (09:21 +0000)]
[RISCV][NFC] Fix sorting of includes in lib/Target/RISCV
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312624
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Craig Topper [Wed, 6 Sep 2017 06:50:03 +0000 (06:50 +0000)]
[DAGCombiner] When combining EXTRACT_SUBVECTOR of a BUILD_VECTOR, make sure we don't create a BUILD_VECTOR with an illegal type after type legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312621
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Chandler Carruth [Wed, 6 Sep 2017 06:28:08 +0000 (06:28 +0000)]
[x86] Fix PR34377 by disabling cmov conversion when we relied on it
performing a zext of a register.
On the PR there is discussion of how to more effectively handle this,
but this patch prevents us from miscompiling code.
Differential Revision: https://reviews.llvm.org/D37504
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312620
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Zvi Rackover [Wed, 6 Sep 2017 05:33:04 +0000 (05:33 +0000)]
X86 Tests: Tidy up AVX512 conversion tests. NFC.
Rename functions to a consistent format to make it easier to track coverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312619
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Jatin Bhateja [Wed, 6 Sep 2017 03:58:14 +0000 (03:58 +0000)]
Updating a test reference for rL312608.
Differential Revision: https://reviews.llvm.org/D37501
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312614
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Craig Topper [Wed, 6 Sep 2017 03:35:58 +0000 (03:35 +0000)]
[X86] Add more FMA3 patterns to cover a load in all 3 possible positions.
This matches what we already do for AVX512. The peephole pass makes up for this in most if not all cases. But this makes isel behavior for these consistent with every other instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312613
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Hal Finkel [Wed, 6 Sep 2017 03:08:26 +0000 (03:08 +0000)]
[PowerPC] Don't use xscvdpspn on the P7
xscvdpspn was not introduced until the P8, so don't use it on the P7. Fixes a
regression introduced in r288152.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312612
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Jatin Bhateja [Wed, 6 Sep 2017 02:58:47 +0000 (02:58 +0000)]
[X86] Allow cross-lane permutations for sub targets supporting AVX2.
Summary:
Most instructions in AVX work “in-lane”, that is, each source element is applied only to other
elements of the same lane, thus a cross lane permutation is costly and needs more than one instrution.
AVX2 includes instructions to perform any-to-any permutation of words over a 256-bit register
and vectorized table lookup.
This should also Fix PR34369
Differential Revision: https://reviews.llvm.org/D37388
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312608
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Lang Hames [Wed, 6 Sep 2017 02:53:37 +0000 (02:53 +0000)]
[ORC] Fix some comments in JITSymbol.
Patch by Breckin Loggins. Thanks Breckin!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312607
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Eric Beckmann [Wed, 6 Sep 2017 01:50:36 +0000 (01:50 +0000)]
Fix crbug 759265 by suppressing llvm mt warnings.
Summary:
Previous would throw warning whenever libxml2 is not installed. Now
only give this warning if merging manifest fails.
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D37240
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312604
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Rafael Espindola [Wed, 6 Sep 2017 00:57:53 +0000 (00:57 +0000)]
Use the section name if a STT_SECTION symbol has empty name.
Without this we would have multiple relocations pointing to symbols
with the same name: the empty string. There was no way for yaml2obj to
be able to handle that.
A more general solution would be to unique symbol names in a similar
way to how we unique section names. In practice I think this covers
all common cases and is a bit more user friendly than using names like
sym1, sym2, sym3, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312603
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Yaxun Liu [Wed, 6 Sep 2017 00:30:27 +0000 (00:30 +0000)]
[AMDGPU] Transform __read_pipe_* and __write_pipe_*
When packet size equals packet align and is power of 2, transform
__read_pipe* and __write_pipe* to specialized library function.
Differential Revision: https://reviews.llvm.org/D36831
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312598
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Sanjay Patel [Tue, 5 Sep 2017 23:13:13 +0000 (23:13 +0000)]
[ValueTracking, InstCombine] canonicalize fcmp ord/uno with non-NAN ops to null constants
This is a preliminary step towards solving the remaining part of PR27145 - IR for isfinite():
https://bugs.llvm.org/show_bug.cgi?id=27145
In order to solve that one more generally, we need to add matching for and/or of fcmp ord/uno
with a constant operand.
But while looking at those patterns, I realized we were missing a canonicalization for nonzero
constants. Rather than limiting to just folds for constants, we're adding a general value
tracking method for this based on an existing DAG helper.
By transforming everything to 0.0, we can simplify the existing code in foldLogicOfFCmps()
and pick up missing vector folds.
Differential Revision: https://reviews.llvm.org/D37427
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312591
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Rafael Espindola [Tue, 5 Sep 2017 23:00:51 +0000 (23:00 +0000)]
Fix a use after free.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312590
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Eli Friedman [Tue, 5 Sep 2017 22:54:06 +0000 (22:54 +0000)]
[ARM] Make ARMExpandPseudo add implicit uses for predicated instructions
Missing these could potentially screw up post-ra scheduling.
Issue found by inspection, so I don't have a real testcase. Included
test just verifies the expected operands after expansion.
Differential Revision: https://reviews.llvm.org/D35156
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312589
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Eli Friedman [Tue, 5 Sep 2017 22:45:23 +0000 (22:45 +0000)]
[ARM] Register ARMExpandPseudo pass.
This allows -run-pass etc. to refer to it.
(Split off from D35156.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312587
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Rafael Espindola [Tue, 5 Sep 2017 22:30:00 +0000 (22:30 +0000)]
obj2yaml: Print unique section names.
Without this patch passing a .o file with multiple sections with the
same name to obj2yaml produces a yaml file that yaml2obj cannot
handle. This is pr34162.
The problem is that when specifying, for example, the section of a
symbol, we get only
Section: foo
and don't know which of the sections whose name is foo we have to use.
One alternative would be to use section numbers. This would work, but
the output from obj2yaml would be very inconvenient to edit as
deleting a section would invalidate all indexes.
Another alternative would be to invent a unique section id that would
exist only on yaml. This would work, but seems a bit heavy handed. We
could make the id optional and default it to the section name.
Since in the last alternative the id is basically what this patch uses
as a name, it can be implemented as a followup patch if needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312585
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Lang Hames [Tue, 5 Sep 2017 22:24:40 +0000 (22:24 +0000)]
[ORC] Convert null remote symbols to null JITSymbols.
The existing code created a JITSymbol with an invalid materializer instead,
guaranteeing a 'missing symbol' error when someone tried to materialize the
symbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312584
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Zachary Turner [Tue, 5 Sep 2017 22:06:39 +0000 (22:06 +0000)]
[CodeView] Don't output S_UDTs for nested typedefs.
S_UDT records are basically the "bridge" between the debugger's
expression evaluator and the type information. If you type
(Foo*)nullptr into the watch window, the debugger looks for an
S_UDT record named Foo. If it can find one, it displays your type.
Otherwise you get an error.
We have always understood this to mean that if you have code like
this:
struct A {
int X;
};
struct B {
typedef A AT;
AT Member;
};
that you will get 3 S_UDT records. "A", "B", and "B::AT". Because
if you were to type (B::AT*)nullptr into the debugger, it would
need to find an S_UDT record named "B::AT".
But "B::AT" is actually the S_UDT record that would be generated
if B were a namespace, not a struct. So the debugger needs to be
able to distinguish this case. So what it does is:
1. Look for an S_UDT named "B::AT". If it finds one, it knows
that AT is in a namespace.
2. If it doesn't find one, split at the scope resolution operator,
and look for an S_UDT named B. If it finds one, look up the type
for B, and then look for AT as one of its members.
With this algorithm, S_UDT records for nested typedefs are not just
unnecessary, but actually wrong!
The results of implementing this in clang are dramatic. It cuts
our /DEBUG:FASTLINK PDB sizes by more than 50%, and we go from
being ~20% larger than MSVC PDBs on average, to ~40% smaller.
It also slightly speeds up link time. We get about 10% faster
links than without this patch.
Differential Revision: https://reviews.llvm.org/D37410
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312583
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Vedant Kumar [Tue, 5 Sep 2017 22:04:00 +0000 (22:04 +0000)]
Revert "[Decompression] Fail gracefully when out of memory"
This reverts commit r312526.
Revert "Fix test/DebugInfo/dwarfdump-decompression-invalid-size.test"
This reverts commit r312527.
It causes an ASan failure:
http://lab.llvm.org:8080/green/job/clang-stage2-cmake-RgSan_check/4150
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312582
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Davide Italiano [Tue, 5 Sep 2017 21:27:23 +0000 (21:27 +0000)]
[unittest/ReverseIteration] Unbreak when compiling with GCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312579
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Sanjay Patel [Tue, 5 Sep 2017 21:20:35 +0000 (21:20 +0000)]
[InstCombine] add nnan tests; NFC
As suggested in D37427, we could have a value tracking function and folds that use
it to simplify these cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312578
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Davide Italiano [Tue, 5 Sep 2017 20:49:41 +0000 (20:49 +0000)]
[GVNHoist] Move duplicated code to a helper function. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312575
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Mandeep Singh Grang [Tue, 5 Sep 2017 20:39:01 +0000 (20:39 +0000)]
[unittests] Add reverse iteration unit test for pointer-like keys
Reviewers: dblaikie, efriedma, mehdi_amini
Reviewed By: dblaikie
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D37241
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312574
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Reid Kleckner [Tue, 5 Sep 2017 20:26:25 +0000 (20:26 +0000)]
Fix RST syntax in LangRef for llvm.codeview.annotation intrinsic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312571
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Reid Kleckner [Tue, 5 Sep 2017 20:14:58 +0000 (20:14 +0000)]
Add llvm.codeview.annotation to implement MSVC __annotation
Summary:
This intrinsic represents a label with a list of associated metadata
strings. It is modelled as reading and writing inaccessible memory so
that it won't be removed as dead code. I think the intention is that the
annotation strings should appear at most once in the debug info, so I
marked it noduplicate. We are allowed to inline code with annotations as
long as we strip the annotation, but that can be done later.
Reviewers: majnemer
Subscribers: eraman, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D36904
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312569
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Daniel Neilson [Tue, 5 Sep 2017 19:54:03 +0000 (19:54 +0000)]
[SCEV] Ensure ScalarEvolution::createAddRecFromPHIWithCastsImpl properly handles out of range truncations of the start and accum values
Summary:
When constructing the predicate P1 in ScalarEvolution::createAddRecFromPHIWithCastsImpl() it is possible
for the PHISCEV from which the predicate is constructed to be a SCEVConstant instead of a SCEVAddRec. If
this happens, then the cast<SCEVAddRec>(PHISCEV) in the code will assert.
Such a PHISCEV is possible if either the start value or the accumulator value is a constant value
that not equal to its truncated value, and if the truncated value is zero.
This patch adds tests that demonstrate the cast<> assertion, and fixes this problem by checking
whether the PHISCEV is a constant before constructing the P1 predicate; if it is, then P1 is
equivalent to one of P2 or P3. Additionally, if we know that the start value or accumulator
value are constants then we check whether the P2 and/or P3 predicates are known false at compile
time; if either is, then we bail out of constructing the AddRec.
Reviewers: sanjoy, mkazantsev, silviu.baranga
Reviewed By: mkazantsev
Subscribers: mkazantsev, llvm-commits
Differential Revision: https://reviews.llvm.org/D37265
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312568
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Peter Collingbourne [Tue, 5 Sep 2017 19:51:38 +0000 (19:51 +0000)]
LTO: Try to open cache files before renaming them.
It appears that a potential race between the cache client and the cache
pruner that I thought was unlikely actually happened in practice [1].
Try to avoid the race condition by opening the temporary file before
renaming it. Do this only on non-Windows platforms because we cannot
rename open files on Windows using the sys::fs::rename function.
[1] https://luci-logdog.appspot.com/v/?s=chromium%2Fbb%2Fchromium.memory%2FLinux_CFI%2F1610%2F%2B%2Frecipes%2Fsteps%2Fcompile%2F0%2Fstdout
Differential Revision: https://reviews.llvm.org/D37410
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312567
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Craig Topper [Tue, 5 Sep 2017 19:09:02 +0000 (19:09 +0000)]
[X86] Remove unnecessary (v4f32 (X86vzmovl (v4f32 (scalar_to_vector FR32X)))) patterns
We had already disabled the pattern for SSE4.1 and SSE4.2. But it got re-enabled for AVX and AVX512.
With SSE41 we rely on a separate (v4f32 (X86vzmovl VR128)) pattern to select blendps with a xorps to create zeroess. And a separate (v4f32 (scalar_to_vector FR32X)) to select a COPY_TO_REG_CLASS to move FR32 to VR128
The same thing can happen for AVX with vblendps and those separate patterns already exist.
For AVX512, (v4f32 (X86vzmov VR128)) will select a VMOVSS instruction instead of VBLENDPS due to their not being a EVEX VBLENDPS. This is what we were getting out of the larger pattern anyway. So the larger pattern is unneeded for AVX512 too.
For SSE1-SSSE3 we can rely on (v4f32 (X86vzmov VR128)) selecting a MOVSS similar to AVX512. Again this is what the larger pattern did too.
So the only real change here is that AVX1/2 now properly outputs a VBLENDPS during isel instead of a VMOVSS to match SSE41. Most tests didn't notice because the two address instruction pass knows how to turn VMOVSS into VBLENDPS to get an independent destination register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312564
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Konstantin Zhuravlyov [Tue, 5 Sep 2017 19:01:10 +0000 (19:01 +0000)]
AMDGPU: Cleanup/refactor SIMemoryLegalizer [3]:
- Refactor SIMemOpInfo's constructors
- Allow construction of NotAtomic SIMemOpInfo
Differential Revision: https://reviews.llvm.org/D37396
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312563
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Matt Arsenault [Tue, 5 Sep 2017 18:36:36 +0000 (18:36 +0000)]
AMDGPU: Fix not accounting for tail call resource usage
If the only call in a function is a tail call, the
function isn't considered to have a call since it's a
type of return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312561
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Zvi Rackover [Tue, 5 Sep 2017 18:24:39 +0000 (18:24 +0000)]
X86 Tests: Adding missing AVX512 fptoui coverage tests. NFC.
Some of the cases show missing pattern i intend to fix shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312560
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Tony Jiang [Tue, 5 Sep 2017 18:08:02 +0000 (18:08 +0000)]
[PPC][NFC] Renaming things with 'xxinsert' moniker to 'vecinsert' to make it more general.
Commit on behalf of Graham Yiu (gyiu@ca.ibm.com)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312547
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Adam Nemet [Tue, 5 Sep 2017 18:03:39 +0000 (18:03 +0000)]
Split opt-remark YAML and opt output testing on this test
This prepares for https://reviews.llvm.org/D33514
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312544
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