OSDN Git Service
Akira Hatanaka [Wed, 11 Nov 2015 20:35:42 +0000 (20:35 +0000)]
Move the enum attributes defined in Attributes.h to a table-gen file.
This is a step towards consolidating some of the information regarding
attributes in a single place.
This patch moves the enum attributes in Attributes.h to the table-gen
file. Additionally, it adds definitions of target independent string
attributes that will be used in follow-up commits by the inliner to
check attribute compatibility.
rdar://problem/
19836465
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252796
91177308-0d34-0410-b5e6-
96231b3b80d8
Yunzhong Gao [Wed, 11 Nov 2015 19:59:08 +0000 (19:59 +0000)]
Add a libLTO diagnostic handler that supports lto_get_error_message API
This is a follow-up from the previous discussion on the thread:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151019/307763.html
The LibLTO lto_get_error_message() API reads error messages from a std::string
sLastErrorString. Instead of passing this string around as an argument, this
patch creates a diagnostic handler and then sends this handler to the
constructor of LTOCodeGenerator.
Differential Revision: http://reviews.llvm.org/D14313
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252791
91177308-0d34-0410-b5e6-
96231b3b80d8
Geoff Berry [Wed, 11 Nov 2015 19:42:52 +0000 (19:42 +0000)]
[DAGCombiner] Improve zextload optimization.
Summary:
Don't fold
(zext (and (load x), cst)) -> (and (zextload x), (zext cst))
if
(and (load x) cst)
will match as a zextload already and has additional users.
For example, the following IR:
%load = load i32, i32* %ptr, align 8
%load16 = and i32 %load, 65535
%load64 = zext i32 %load16 to i64
store i32 %load16, i32* %dst1, align 4
store i64 %load64, i64* %dst2, align 8
used to produce the following aarch64 code:
ldr w8, [x0]
and w9, w8, #0xffff
and x8, x8, #0xffff
str w9, [x1]
str x8, [x2]
but with this change produces the following aarch64 code:
ldrh w8, [x0]
str w8, [x1]
str x8, [x2]
Reviewers: resistor, mcrosier
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D14340
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252789
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Wed, 11 Nov 2015 19:40:49 +0000 (19:40 +0000)]
dwarfdump: DWP type unit index dumping skeleton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252786
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Wed, 11 Nov 2015 19:31:53 +0000 (19:31 +0000)]
Refactoring and fix another instance of asan error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252783
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Wed, 11 Nov 2015 19:30:47 +0000 (19:30 +0000)]
Format my previous commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252782
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Wed, 11 Nov 2015 19:28:21 +0000 (19:28 +0000)]
dwarfdump: First piece of support for DWP dumping
Just a tiny piece of index dumping - the header in this instance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252781
91177308-0d34-0410-b5e6-
96231b3b80d8
Hemant Kulkarni [Wed, 11 Nov 2015 19:24:08 +0000 (19:24 +0000)]
Test commit after password reset
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252779
91177308-0d34-0410-b5e6-
96231b3b80d8
Joseph Tremoulet [Wed, 11 Nov 2015 19:21:09 +0000 (19:21 +0000)]
[WinEH] Only generate UnwindHelp slot for MSVCXX
Summary: Other personalities don't use this special frame slot.
Reviewers: majnemer, andrew.w.kaylor, rnk
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D14580
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252778
91177308-0d34-0410-b5e6-
96231b3b80d8
Dawn Perchik [Wed, 11 Nov 2015 18:47:36 +0000 (18:47 +0000)]
Support: Recognize Borland DWARF extensions.
This patch adds DWARF values for the Delphi language and Borland C++
language extensions.
Reviewed by: dblaikie
Subscribers: llvm-commits, majnemer
Differential Revision: http://reviews.llvm.org/D14522
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252776
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Wed, 11 Nov 2015 18:44:33 +0000 (18:44 +0000)]
Add target preference for GatherAllAliases max depth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252775
91177308-0d34-0410-b5e6-
96231b3b80d8
Colin LeMahieu [Wed, 11 Nov 2015 18:11:06 +0000 (18:11 +0000)]
Reverting r252760
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252770
91177308-0d34-0410-b5e6-
96231b3b80d8
Dehao Chen [Wed, 11 Nov 2015 18:09:47 +0000 (18:09 +0000)]
clang-format lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252769
91177308-0d34-0410-b5e6-
96231b3b80d8
Dehao Chen [Wed, 11 Nov 2015 18:08:18 +0000 (18:08 +0000)]
Emit discriminator for inlined callsites.
Summary: Inlined callsites need to be emitted in debug info so that sample profile can be annotated to the correct inlined instance.
Reviewers: dnovillo, dblaikie
Subscribers: dblaikie, llvm-commits
Differential Revision: http://reviews.llvm.org/D14511
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252768
91177308-0d34-0410-b5e6-
96231b3b80d8
Diego Novillo [Wed, 11 Nov 2015 17:54:37 +0000 (17:54 +0000)]
SamplePGO - Fix PR 25482 - Do not rely on llvm.dbg.cu for discriminators
The discriminators pass relied on the presence of llvm.dbg.cu to decide
whether to add discriminators, but this fails in the case where debug
info is only enabled partially when -fprofile-sample-use is active.
The reason llvm.dbg.cu is not present in these cases is to prevent
codegen from emitting debug info (as it is only used for the sample
profile pass).
This changes the discriminators pass to also emit discriminators even
when debug info is not being emitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252763
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Wed, 11 Nov 2015 17:50:20 +0000 (17:50 +0000)]
llvm-config.cpp: Prune an obsolete \param. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252762
91177308-0d34-0410-b5e6-
96231b3b80d8
Hemant Kulkarni [Wed, 11 Nov 2015 17:47:54 +0000 (17:47 +0000)]
[Symbolizer]: Add -pretty-print option
Differential Revision: http://reviews.llvm.org/D13671
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252760
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Wed, 11 Nov 2015 17:24:56 +0000 (17:24 +0000)]
[MIPS] add overrides for isCheapToSpeculateCttz() and isCheapToSpeculateCtlz()
MIPS32 has instructions for efficient count-leading/trailing-zeros, so this should be
considered a cheap operation (and therefore fair game for speculation) for any MIPS32
implementation.
The net result of allowing this speculation for the regression tests in this patch is
that we get this code:
ctlz:
jr $ra
clz $2, $4
cttz:
addiu $1, $4, -1
not $2, $4
and $1, $2, $1
clz $1, $1
addiu $2, $zero, 32
jr $ra
subu $2, $2, $1
Instead of:
ctlz:
beqz $4, $BB0_2
addiu $2, $zero, 32
clz $2, $4
$BB0_2:
jr $ra
nop
cttz:
beqz $4, $BB1_2
addiu $2, $zero, 32
addiu $1, $4, -1
not $2, $4
and $1, $2, $1
clz $1, $1
addiu $2, $zero, 32
subu $2, $2, $1
$BB1_2:
jr $ra
nop
See D14469 for the larger motivation.
Differential Revision: http://reviews.llvm.org/D14500
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252755
91177308-0d34-0410-b5e6-
96231b3b80d8
Artyom Skrobov [Wed, 11 Nov 2015 17:22:18 +0000 (17:22 +0000)]
test/DebugInfo/ARM/prologue_end.ll references thumbv1, which is invalid.
The committer didn't respond at http://reviews.llvm.org/D14338, so we've got to fix this for them.
This test doesn't pass with thumbv6, so I suppose what they meant is thumbv7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252754
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Wed, 11 Nov 2015 16:50:13 +0000 (16:50 +0000)]
[mips] Move MC tests for the DSP ASE into the standard format.
Summary:
Only DSPr2 is present because it appears we've never added DSPr1 tests.
We'll have to correct that in a later patch.
Reviewers: vkalintiris
Subscribers: llvm-commits, dsanders
Differential Revision: http://reviews.llvm.org/D14448
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252752
91177308-0d34-0410-b5e6-
96231b3b80d8
Diego Novillo [Wed, 11 Nov 2015 16:39:22 +0000 (16:39 +0000)]
Properly fix unused variable in disable-assert builds.
I missed the side-effects of ParseBFI in my previous attempt (r252748).
Thanks dblaikie for the suggestion of adding a void use of the unused
variable instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252751
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Wed, 11 Nov 2015 16:19:39 +0000 (16:19 +0000)]
[CMake] Make llvm_install_library_symlink respect LLVM_LIBDIR_SUFFIX.
This is required to support multilib install targets, and addresses a regression introduced in r252093.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252749
91177308-0d34-0410-b5e6-
96231b3b80d8
Diego Novillo [Wed, 11 Nov 2015 16:14:52 +0000 (16:14 +0000)]
Remove unused variable in disable-assert builds. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252748
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Wed, 11 Nov 2015 16:14:03 +0000 (16:14 +0000)]
[CMake] Add support for building the llvm test-suite as part of an LLVM build using clang and lld
Summary:
This patch adds a new CMake module for working with ExternalProjects. This wrapper for ExternalProject supports using just-built tools and can hook up dependencies properly so that projects get cleared out.
The example usage here is for the llvm test-suite. In this example, the test-suite is setup as dependent on clang and lld if they are in-tree. If the clang or lld binaries change the test-suite is re-configured, cleaned, and rebuilt.
This cleanup and abstraction wrapping ExternalProject can be extended and applied to other runtime libraries like compiler-rt and libcxx.
Reviewers: samsonov, jroelofs, rengolin, jmolloy
Subscribers: jmolloy, llvm-commits
Differential Revision: http://reviews.llvm.org/D14513
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252747
91177308-0d34-0410-b5e6-
96231b3b80d8
Douglas Katzman [Wed, 11 Nov 2015 15:51:16 +0000 (15:51 +0000)]
Visibly fail if attempting to encode register AH,BH,CH,DH in a REX-prefixed instruction.
Differential Revision: http://reviews.llvm.org/D13316
Fixes PR25003
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252743
91177308-0d34-0410-b5e6-
96231b3b80d8
James Molloy [Wed, 11 Nov 2015 15:40:40 +0000 (15:40 +0000)]
[ARM] Combine BFIs together
If we have a chain of BFIs, we may be able to combine several together into one merged BFI. We can do this if the "from" bits from one BFI OR'd with the "from" bits from the other BFI form a contiguous range, and the same with the "to" bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252740
91177308-0d34-0410-b5e6-
96231b3b80d8
Charlie Turner [Wed, 11 Nov 2015 15:03:46 +0000 (15:03 +0000)]
[SLP] Enable -slp-vectorize-hor by default.
Measurements primarily on AArch64 have shown this feature does not
significantly effect compile-time. The are no significant perf changes in LNT,
but for AArch64 at least, there are wins in third party benchmarks.
As discussed on llvm-dev, we're going to try turning this on by default and see
how other targets react to the change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252733
91177308-0d34-0410-b5e6-
96231b3b80d8
Aaron Ballman [Wed, 11 Nov 2015 14:57:28 +0000 (14:57 +0000)]
Silencing a signed vs unsigned type mismatch warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252732
91177308-0d34-0410-b5e6-
96231b3b80d8
Aaron Ballman [Wed, 11 Nov 2015 13:44:06 +0000 (13:44 +0000)]
Silencing nine warnings for "enumeral and non-enumeral type in conditional expression"; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252728
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Kuperstein [Wed, 11 Nov 2015 11:44:31 +0000 (11:44 +0000)]
[X86] Replace LEAs with INC/DEC when profitable
If possible and profitable, replace lea %reg, 1(%reg) and lea %reg, -1(%reg) with inc %reg and dec %reg respectively.
Patch by: anton.nadolsky@intel.com
Differential Revision: http://reviews.llvm.org/D14059
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252722
91177308-0d34-0410-b5e6-
96231b3b80d8
Yury Gribov [Wed, 11 Nov 2015 10:36:49 +0000 (10:36 +0000)]
[ASan] Enable optional ASan recovery.
Differential Revision: http://reviews.llvm.org/D14242
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252719
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Wed, 11 Nov 2015 07:29:25 +0000 (07:29 +0000)]
[X86] Fix feature flags on some MMX register instructions that really were introduced with SSE or SSE2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252709
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Wed, 11 Nov 2015 07:29:22 +0000 (07:29 +0000)]
[X86] Remove redundant MMX isel patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252708
91177308-0d34-0410-b5e6-
96231b3b80d8
Kostya Serebryany [Wed, 11 Nov 2015 05:25:24 +0000 (05:25 +0000)]
[libFuzzer] better links
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252705
91177308-0d34-0410-b5e6-
96231b3b80d8
Kostya Serebryany [Wed, 11 Nov 2015 05:20:55 +0000 (05:20 +0000)]
[libFuzzer] more trophies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252704
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Wed, 11 Nov 2015 03:03:54 +0000 (03:03 +0000)]
lit: Show all output with --show-all, even in combination with --succinct
I missed an earlier exit for the --succinct case when I introduced the
-a option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252698
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan P. N. Exon Smith [Wed, 11 Nov 2015 02:26:42 +0000 (02:26 +0000)]
ADT: Avoid relying on UB in ilist_node::getNextNode()
Re-implement `ilist_node::getNextNode()` and `getPrevNode()` without
relying on the sentinel having a "next" pointer. Instead, get access to
the owning list and compare against the `begin()` and `end()` iterators.
This only works when the node *can* get access to the owning list. The
new support is in `ilist_node_with_parent<>`, and any class `Ty`
inheriting from `ilist_node<NodeTy>` that wants `getNextNode()` and/or
`getPrevNode()` should inherit from
`ilist_node_with_parent<NodeTy, ParentTy>` instead. The requirements:
- `NodeTy` must have a `getParent()` function that returns the parent.
- `ParentTy` must have a `getSublistAccess()` static that, given a(n
ignored) `NodeTy*` (to determine which list), returns a member field
pointer to the appropriate `ilist<>`.
This isn't the cleanest way to get access to the owning list, but it
leverages the API already used in the IR hierarchy (see, e.g.,
`Instruction::getSublistAccess()`).
If anyone feels like ripping out the calls to `getNextNode()` and
`getPrevNode()` and replacing with direct iterator logic, they can also
remove the access function, etc., but as an incremental step, I'm
maintaining the API where it's currently used in tree.
If these requirements are *not* met, call sites with access to the ilist
can call `iplist<NodeTy>::getNextNode(NodeTy*)` directly, as in
ilistTest.cpp.
Why rewrite this?
The old code was broken, calling `getNext()` on a sentinel that possibly
didn't have a "next" pointer at all! The new code avoids that
particular flavour of UB (see the commit message for r252538 for more
details about the "lucky" memory layout that made this function so
interesting).
There's still some UB here: the end iterator gets downcast to `NodeTy*`,
even when it's a sentinel (which is typically
`ilist_half_node<NodeTy*>`). I'll tackle that in follow-up commits.
See this llvm-dev thread for more details:
http://lists.llvm.org/pipermail/llvm-dev/2015-October/091115.html
What's the danger?
There might be some code that relies on `getNextNode()` or
`getPrevNode()` *never* returning `nullptr` -- i.e., that relies on them
being broken when the sentinel is an `ilist_half_node<NodeTy>`. I tried
to root out those cases with the audits I did leading up to r252380, but
it's possible I missed one or two. I hope not.
(If (1) you have out-of-tree code, (2) you've reverted r252380
temporarily, and (3) you get some weird crashes with this commit, then I
recommend un-reverting r252380 and auditing the compile errors looking
for "strange" implicit conversions.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252694
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Wed, 11 Nov 2015 02:11:46 +0000 (02:11 +0000)]
Sort the enums in Attributes.h in case insensitive alphabetical order.
Sort the enums in preparation for moving the attributes to a table-gen
file.
rdar://problem/
19836465
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252692
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Wed, 11 Nov 2015 01:33:02 +0000 (01:33 +0000)]
[WebAssembly] Support non-legal argument and return types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252687
91177308-0d34-0410-b5e6-
96231b3b80d8
Ahmed Bougacha [Wed, 11 Nov 2015 00:51:36 +0000 (00:51 +0000)]
[MC] Use LShr for constant evaluation of ">>" on non-arm64 darwin.
Follow-up to r235963: this matches other assemblers and is less
unexpected (e.g. PR23227).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252681
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Wed, 11 Nov 2015 00:41:58 +0000 (00:41 +0000)]
MachineInstr: addRegisterDefReadUndef() => setRegisterDefReadUndef()
This way we can not only add but also remove read undef flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252678
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Wed, 11 Nov 2015 00:27:46 +0000 (00:27 +0000)]
AMDGPU: Print more fields in comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252677
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Wed, 11 Nov 2015 00:16:41 +0000 (00:16 +0000)]
[ValueTracking] Remove untested / unreachable code, NFC
Right now isTruePredicate is only ever called with Pred == ICMP_SLE or
ICMP_ULE, and the ICMP_SLT and ICMP_ULT cases are dead. This change
removes the untested dead code so that the function is not misleading.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252676
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Wed, 11 Nov 2015 00:01:36 +0000 (00:01 +0000)]
AMDGPU: Remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252675
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Wed, 11 Nov 2015 00:01:32 +0000 (00:01 +0000)]
AMDGPU: Set isAllocatable = 0 on VS_32/VS_64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252674
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Tue, 10 Nov 2015 23:56:20 +0000 (23:56 +0000)]
[ValueTracking] Teach isImpliedCondition a new bitwise trick
Summary:
This change teaches isImpliedCondition to prove things like
(A | 15) < L ==> (A | 14) < L
if the low 4 bits of A are known to be zero.
Depends on D14391
Reviewers: majnemer, reames, hfinkel
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D14392
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252673
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Tue, 10 Nov 2015 23:56:15 +0000 (23:56 +0000)]
[ValueTracking] Use m_APInt instead of m_ConstantInt, NFC
This change would add functionality if isImpliedCondition worked on
vector types; but since it bail out on vector predicates this change is
an NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252672
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Tue, 10 Nov 2015 23:23:05 +0000 (23:23 +0000)]
TableGen: Emit LaneMask for register classes without subregisters as ~0u
This makes it slightly easier to handle classes with and without
subregister uniformly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252671
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Tue, 10 Nov 2015 23:22:20 +0000 (23:22 +0000)]
[WinEH] Insert the MBB for EH_RESTORE after the catchret
Inserting it before the target block could be bad, we might already have
a fallthrough edge to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252670
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Wilkins [Tue, 10 Nov 2015 23:19:21 +0000 (23:19 +0000)]
[cmake] move SONAME handling to llvm_add_library
Summary:
Move handling of the SONAME option from add_llvm_library
to llvm_add_library, so that it can be used in sub-projects.
In particular, this makes it possible to have consistently
named shared libraries for LLVM, Clang and LLDB.
Also, base the SONAME and symlinks on the output name
by extracting the OUTPUT_NAME property, rather than assuming
it is the same as the target name.
Reviewers: beanz
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D14539
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252669
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 10 Nov 2015 22:59:11 +0000 (22:59 +0000)]
don't repeat function/class/variable names in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252666
91177308-0d34-0410-b5e6-
96231b3b80d8
Jingyue Wu [Tue, 10 Nov 2015 22:35:47 +0000 (22:35 +0000)]
[doc] Compile CUDA with LLVM
Summary:
This patch adds documentation on compiling CUDA with LLVM as requested by many
engineers and researchers. It includes not only user guides but also some
internals (mostly optimizations) so that early adopters can start hacking and
contributing.
Quite a few researchers who contacted us haven't used LLVM before, which is
unsurprising as it hasn't been long since LLVM picked up CUDA. So I added a
short summary to help these folks get started with LLVM.
I expect this document to evolve substantially down the road. The user guides
will be much simplified after the Clang integration is done. However, the
internals should continue growing to include for example performance debugging
and key areas to improve.
Reviewers: chandlerc, meheff, broune, tra
Subscribers: silvas, jingyue, llvm-commits, eliben
Differential Revision: http://reviews.llvm.org/D14370
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252660
91177308-0d34-0410-b5e6-
96231b3b80d8
Kostya Serebryany [Tue, 10 Nov 2015 22:02:56 +0000 (22:02 +0000)]
[libFuzzer] add UninstrumentedTest.cpp (missing from a previous commit)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252658
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Tue, 10 Nov 2015 21:48:21 +0000 (21:48 +0000)]
[WebAssembly] Remove special cases for things that are no longer special. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252656
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Schmidt [Tue, 10 Nov 2015 21:43:45 +0000 (21:43 +0000)]
Add PPCMIPeephole.cpp to CMakeLists.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252654
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Tue, 10 Nov 2015 21:40:21 +0000 (21:40 +0000)]
[WebAssembly] Support for floating point min and max.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252653
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Bieneman [Tue, 10 Nov 2015 21:38:58 +0000 (21:38 +0000)]
[CMake] Autoconf builds libLTO with -fPIC, CMake should be able to as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252652
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Schmidt [Tue, 10 Nov 2015 21:38:26 +0000 (21:38 +0000)]
[PowerPC] Add an MI SSA peephole pass.
This patch adds a pass for doing PowerPC peephole optimizations at the
MI level while the code is still in SSA form. This allows for easy
modifications to the instructions while depending on a subsequent pass
of DCE. Both passes are very fast due to the characteristics of SSA.
At this time, the only peepholes added are for cleaning up various
redundancies involving the XXPERMDI instruction. However, I would
expect this will be a useful place to add more peepholes for
inefficiencies generated during instruction selection. The pass is
placed after VSX swap optimization, as it is best to let that pass
remove unnecessary swaps before performing any remaining clean-ups.
The utility of these clean-ups are demonstrated by changes to four
existing test cases, all of which now have tighter expected code
generation. I've also added Eric Schweiz's bugpoint-reduced test from
PR25157, for which we now generate tight code. One other test started
failing for me, and I've fixed it
(test/Transforms/PlaceSafepoints/finite-loops.ll) as well; this is not
related to my changes, and I'm not sure why it works before and not
after. The problem is that the CHECK-NOT: of "statepoint" from test1
fails because of the "statepoint" in test2, and so forth. Adding a
CHECK-LABEL in between keeps the different occurrences of that string
properly scoped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252651
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Tue, 10 Nov 2015 21:31:05 +0000 (21:31 +0000)]
dsymutil: Prune module forward decl DIEs if a uniquable definition was
already emitted and fix a latent bug in DIECloner where the DW_CHILDREN_yes
flag is set based on the number of children in the input DIE rather than
the number of children that are actually being cloned.
rdar://problem/
23439845
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252649
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Tue, 10 Nov 2015 21:09:06 +0000 (21:09 +0000)]
Ensure ModuleLinker materializes complete comdat groups
Summary:
The module linker lazy links some "discardable if unused" global
values (e.g. linkonce), materializing and linking them only
if they are referenced in the module. If a comdat group contains a
linkonce member that is not referenced, however, it would not be
materialized and linked, leading to an incomplete comdat group.
If there are other object files not part of the same LTO link that also
define and use that comdat group, the linker may select the incomplete
group leading to link time unsats.
To solve this, whenever a global value body is linked, make sure we
materialize any other members of the same comdat group that are not yet
materialized. This ensures they are in the lazy link list and get linked
as well.
Added new test and adjusted old test to remove parts that didn't
make sense with fix.
Reviewers: rafael
Subscribers: dexonsmith, davidxl, llvm-commits
Differential Revision: http://reviews.llvm.org/D14516
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252647
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Tue, 10 Nov 2015 20:13:21 +0000 (20:13 +0000)]
[IR] Make {Call,Invoke}::cloneImpl aware of operand bundles
This was an omission in the patch that landed initial support for
operand bundles. So far we haven't hit this, but we will once the
inliner is able to inline calls to functions that contain calls with
operand bundles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252645
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Tue, 10 Nov 2015 20:13:15 +0000 (20:13 +0000)]
[OperandBundles] Identify operand bundles with both their names and IDs
No code uses this functionality yet. This change just exposes
information / structure that was already present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252644
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 10 Nov 2015 20:09:02 +0000 (20:09 +0000)]
less indent; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252643
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 10 Nov 2015 19:24:31 +0000 (19:24 +0000)]
[ARM] add overrides for isCheapToSpeculateCttz() and isCheapToSpeculateCtlz()
ARM V6T2 has instructions for efficient count-leading/trailing-zeros, so this should be
considered a cheap operation (and therefore fair game for speculation) for any ARM V6T2
implementation.
The net result of allowing this speculation for the regression tests in this patch is
that we get this code:
ctlz:
clz r0, r0
bx lr
cttz:
rbit r0, r0
clz r0, r0
bx lr
Instead of:
ctlz:
cmp r0, #0
moveq r0, #32
clzne r0, r0
bx lr
cttz:
cmp r0, #0
moveq r0, #32
rbitne r0, r0
clzne r0, r0
bx lr
This will help solve a general speculation/despeculation problem noted in PR24818:
https://llvm.org/bugs/show_bug.cgi?id=24818
Differential Revision: http://reviews.llvm.org/D14469
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252639
91177308-0d34-0410-b5e6-
96231b3b80d8
Yunzhong Gao [Tue, 10 Nov 2015 18:52:48 +0000 (18:52 +0000)]
llvm-lto: trivial spelling changes to distinguish custom diagnostic handler and
default diagnostic handler.
Differential Revision: http://reviews.llvm.org/D14520
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252633
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 10 Nov 2015 18:48:11 +0000 (18:48 +0000)]
LegalizeDAG: Implement promote for scalar_to_vector
This allows avoiding the default Expand behavior which
introduces stack usage. Bitcast the scalar and replace
the missing elements with undef.
This is covered by existing tests and used by a future
commit which makes 64-bit vectors legal types on AMDGPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252632
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 10 Nov 2015 18:48:08 +0000 (18:48 +0000)]
LegalizeDAG: Implement promote for insert_vector_elt
This is covered by existing tests and used by a future
commit which makes 64-bit vectors legal types on AMDGPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252631
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 10 Nov 2015 18:48:04 +0000 (18:48 +0000)]
LegalizeDAG: Implement promote for extract_vector_elt
This is for AMDGPU to implement v2i64 extract as extract of
half of a v4i32.
This is covered by existing tests and used by a future
commit which makes 64-bit vectors legal types on AMDGPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252630
91177308-0d34-0410-b5e6-
96231b3b80d8
Philip Reames [Tue, 10 Nov 2015 18:46:14 +0000 (18:46 +0000)]
[ValueTracking] Recognize that and(x, add (x, -1)) clears the low bit
This is a cleaned up version of a patch by John Regehr with permission. Originally found via the souper tool.
If we add an odd number to x, then bitwise-and the result with x, we know that the low bit of the result must be zero. Either it was zero in x originally, or the add cleared it in the temporary value. As a result, one of the two values anded together must have the bit cleared.
Differential Revision: http://reviews.llvm.org/D14315
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252629
91177308-0d34-0410-b5e6-
96231b3b80d8
Ramkumar Ramachandra [Tue, 10 Nov 2015 18:26:34 +0000 (18:26 +0000)]
AddLLVM: squelch CMP0007 by not adding empty elements to list
When configuring various llvm projects that use AddLLVM.cmake, this warning is
emitted many times, flooding the screen:
Policy CMP0007 is not set: list command no longer ignores empty elements.
The fix is removing an extra semicolon.
Differential Revision: http://reviews.llvm.org/D14339
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252628
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Tue, 10 Nov 2015 18:26:31 +0000 (18:26 +0000)]
[ThinLTO] Update comment per change in WeakAny handling (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252627
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Tue, 10 Nov 2015 18:20:11 +0000 (18:20 +0000)]
[ThinLTO] WeakAny fixes/cleanup
Ensure WeakAny variables are imported as ExternalWeak declarations. To
handle WeakAny more consistently and fix this issue:
1) Update helper doImportAsDefinition to properly flag WeakAny variables
and aliases as not importing defintions.
Update callers of doImportAsDefinition to remove now redundant checks for
WeakAny aliases, or ignore aliases, as appropriate.
2) Add any !doImportAsDefinition GVs to DoNotLinkFromSource set during
linking of the GV prototype, where we usually add GVs to the
DoNotLinkFromSource set for other reasons.
Remove now unnecessary adding of WeakAny aliases to
DoNotLinkFromSource set from copyGlobalAliasProto.
Remove now unnecessary guard against linking non-imported function
bodies from ModuleLinker::run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252626
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 10 Nov 2015 18:11:37 +0000 (18:11 +0000)]
[AArch64] add overrides for isCheapToSpeculateCttz() and isCheapToSpeculateCtlz()
AArch64 has instructions for efficient count-leading/trailing-zeros, so this should be
considered a cheap operation (and therefore fair game for speculation) for any AArch64
implementation.
The net result of allowing this speculation for the regression tests in this
patch is that we get this code:
ctlz:
clz w0, w0
ret
cttz:
rbit w8, w0
clz w0, w8
ret
Instead of:
ctlz:
cbz w0, .LBB0_2
clz w0, w0
ret
.LBB0_2:
orr w0, wzr, #0x20
ret
cttz:
cbz w0, .LBB1_2
rbit w8, w0
clz w0, w8
ret
.LBB1_2:
orr w0, wzr, #0x20
ret
See D14469 for the larger motivation.
Differential Revision: http://reviews.llvm.org/D14505
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252625
91177308-0d34-0410-b5e6-
96231b3b80d8
Renato Golin [Tue, 10 Nov 2015 18:01:16 +0000 (18:01 +0000)]
Revert "Strip metadata when speculatively hoisting instructions"
This reverts commit r252604, as it broke all ARM and AArch64 buildbots, as
well as some x86, et al.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252623
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Kuperstein [Tue, 10 Nov 2015 17:37:49 +0000 (17:37 +0000)]
[X86] Do not try to custom-lower sitofp/fptosi in soft-float mode
Differential Revision: http://reviews.llvm.org/D14495
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252621
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Tue, 10 Nov 2015 17:11:33 +0000 (17:11 +0000)]
Fix asan warning (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252617
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 10 Nov 2015 16:48:53 +0000 (16:48 +0000)]
add 'MustReduceDepth' as an objective/cost-metric for the MachineCombiner
This is one of the problems noted in PR25016:
https://llvm.org/bugs/show_bug.cgi?id=25016
and:
http://lists.llvm.org/pipermail/llvm-dev/2015-October/090998.html
The spilling problem is independent and not addressed by this patch.
The MachineCombiner was doing reassociations that don't improve or even worsen the critical path.
This is caused by inclusion of the "slack" factor when calculating the critical path of the original
code sequence. If we don't add that, then we have a more conservative cost comparison of the old code
sequence vs. a new sequence. The more liberal calculation must be preserved, however, for the AArch64
MULADD patterns because benchmark regressions were observed without that.
The two failing test cases now have identical asm that does what we want:
a + b + c + d ---> (a + b) + (c + d)
Differential Revision: http://reviews.llvm.org/D13417
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252616
91177308-0d34-0410-b5e6-
96231b3b80d8
James Molloy [Tue, 10 Nov 2015 14:22:05 +0000 (14:22 +0000)]
Reapply "[ARM] Combine CMOV into BFI where possible"
Added fixes for stage2 failures: CMOV is not commutable; commuting the operands results in the condition being flipped! d'oh!
Original commit message:
If we have a CMOV, OR and AND combination such as:
if (x & CN)
y |= CM;
And:
* CN is a single bit;
* All bits covered by CM are known zero in y;
Then we can convert this to a sequence of BFI instructions. This will always be a win if CM is a single bit, will always be no worse than the TST & OR sequence if CM is two bits, and for thumb will be no worse if CM is three bits (due to the extra IT instruction).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252606
91177308-0d34-0410-b5e6-
96231b3b80d8
Igor Laevsky [Tue, 10 Nov 2015 14:10:31 +0000 (14:10 +0000)]
Strip metadata when speculatively hoisting instructions
This is fix for PR24059.
When we are hoisting instruction above some condition it may turn out
that metadata on this instruction was control dependant on the condition.
This metadata becomes invalid and we need to drop it.
This patch should cover most obvious places of speculative execution (which
I have found by greping isSafeToSpeculativelyExecute). I think there are more
cases but at least this change covers the severe ones.
Differential Revision: http://reviews.llvm.org/D14398
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252604
91177308-0d34-0410-b5e6-
96231b3b80d8
Oliver Stannard [Tue, 10 Nov 2015 14:09:08 +0000 (14:09 +0000)]
Update test to use explicit triple
This is needed for targets which do not support big-endian with the default
triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252603
91177308-0d34-0410-b5e6-
96231b3b80d8
Tilmann Scheller [Tue, 10 Nov 2015 12:29:37 +0000 (12:29 +0000)]
[PowerPC] Remove redundant code.
The local variable Hi is never being read.
Issue identified by the Clang static analyzer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252600
91177308-0d34-0410-b5e6-
96231b3b80d8
Oliver Stannard [Tue, 10 Nov 2015 11:04:18 +0000 (11:04 +0000)]
[AArch64] Fix halfword load merging for big-endian targets
For big-endian targets, when we merge two halfword loads into a word load, the
order of the halfwords in the loaded value is reversed compared to
little-endian, so the load-store optimiser needs to swap the destination
registers.
This does not affect merging of two word loads, as we use ldp, which treats the
memory as two separate 32-bit words.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252597
91177308-0d34-0410-b5e6-
96231b3b80d8
Hans Wennborg [Tue, 10 Nov 2015 09:47:48 +0000 (09:47 +0000)]
Inliner: Do zero-cost inlines even if above a negative threshold (PR24851)
Differential Revision: http://reviews.llvm.org/D14499
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252595
91177308-0d34-0410-b5e6-
96231b3b80d8
Igor Breger [Tue, 10 Nov 2015 07:09:07 +0000 (07:09 +0000)]
AVX512 : Implemented encoding and DAG lowering for VMOVHPS/PD and VMOVLPS/PD instructions.
Differential Revision: http://reviews.llvm.org/D14492
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252592
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Tue, 10 Nov 2015 04:10:04 +0000 (04:10 +0000)]
Remove another variable unused in -Asserts build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252582
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Tue, 10 Nov 2015 03:16:28 +0000 (03:16 +0000)]
Remove some unused variables to clean up the -Werror build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252580
91177308-0d34-0410-b5e6-
96231b3b80d8
Colin LeMahieu [Tue, 10 Nov 2015 01:58:26 +0000 (01:58 +0000)]
[Hexagon] Adding instruction aliases and tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252579
91177308-0d34-0410-b5e6-
96231b3b80d8
Andy Ayers [Tue, 10 Nov 2015 01:50:49 +0000 (01:50 +0000)]
Support for emitting inline stack probes
For CoreCLR on Windows, stack probes must be emitted as inline sequences that probe successive stack pages
between the current stack limit and the desired new stack pointer location. This implements support for
the inline expansion on x64.
For in-body alloca probes, expansion is done during instruction lowering. For prolog probes, a stub call
is initially emitted during prolog creation, and expanded after epilog generation, to avoid complications
that arise when introducing new machine basic blocks during prolog and epilog creation.
Added a new test case, modified an existing one to exclude non-x64 coreclr (for now).
Add test case
Fix tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252578
91177308-0d34-0410-b5e6-
96231b3b80d8
Richard Diamond [Tue, 10 Nov 2015 01:03:51 +0000 (01:03 +0000)]
Fix mingw targets. Bandaid for r252532's buildbot brakage.
Reviewers: brad.king, beanz
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D14523
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252576
91177308-0d34-0410-b5e6-
96231b3b80d8
Colin LeMahieu [Tue, 10 Nov 2015 00:51:56 +0000 (00:51 +0000)]
[Hexagon] Fixing compound register printing and reenabling more tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252574
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Tue, 10 Nov 2015 00:44:23 +0000 (00:44 +0000)]
AArch64: add experimental support for address tagging.
AArch64 has the ability to use the top 8-bits of an "address" for extra
information, with the memory subsystem automatically masking them off for loads
and stores. When that's happening, we can sometimes skip masks on memory
operations in the compiler.
However, this requires the host OS and support stack to preserve those bits so
it can't be enabled everywhere. In principle iOS 8.0 and above do take the
required precautions and but we'll put it under a flag for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252573
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Tue, 10 Nov 2015 00:31:08 +0000 (00:31 +0000)]
Fix llvm-nm(1) printing of llvm-bitcode files for -format darwin to match darwin’s nm(1).
Also a small fix to match printing of Mach-O objects with -format posix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252567
91177308-0d34-0410-b5e6-
96231b3b80d8
Derek Schuff [Tue, 10 Nov 2015 00:30:57 +0000 (00:30 +0000)]
[WebAssembly] Support 'unreachable' expression
Lower LLVM's 'unreachable' terminator to ISD::TRAP, and lower ISD::TRAP to
wasm's 'unreachable' expression.
WebAssembly type-checks expressions, but a noreturn function with a
return type that doesn't match the context will cause a check
failure. So we lower LLVM 'unreachable' to ISD::TRAP and then lower that
to WebAssembly's 'unreachable' expression, which typechecks in any
context and causes a trap if executed.
Differential Revision: http://reviews.llvm.org/D14515
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252566
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 10 Nov 2015 00:30:14 +0000 (00:30 +0000)]
Remove unnecessary call to getAllocatableRegClass
I'm not sure what the point of this was. I'm not sure why
you would ever define an instruction that produces an unallocatable
register class. No tests fail with this removed, and it seems like
it should be a verifier error to define such an instruction.
This was problematic for AMDGPU because it would make bad decisions
by arbitrarily changing the register class when unsetting isAllocatable
for VS_32/VS_64, which is currently set as a workaround to this problem.
AMDGPU uses the VS_32/VS_64 register classes to represent operands which
can use either VGPRs or SGPRs. When isAllocatable is unset for these,
this would need to pick either the SGPR or VGPR class and insert either
a copy we don't want, or an illegal copy we would need to deal with
later. A semi-arbitrary register class ordering decision is made in tablegen,
which resulted in always picking a VGPR class because it happens to have
more registers than the SGPR register class. We really just want to
use whatever register class the original register had.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252565
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Tue, 10 Nov 2015 00:24:45 +0000 (00:24 +0000)]
[PGO] Make indexed value profile data more compact
- Make indexed value profile data more compact by peeling out
the per-site value count field into its own smaller sized array.
- Introduced formal data structure definitions to specify value
profile data layout in indexed format. Previously the layout
of the data is only assumed in the client code (scattered in
three different places : size computation, EmitData, and ReadData
- The new data structure serves as a central place for layout documentation.
- Add interfaces to force BE output for value profile data (testing purpose)
- Add byte swap unit tests
Differential Revision: http://reviews.llvm.org/D14401
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252563
91177308-0d34-0410-b5e6-
96231b3b80d8
Colin LeMahieu [Tue, 10 Nov 2015 00:22:00 +0000 (00:22 +0000)]
[Hexagon] Fixing store instructions and reenabling a few more tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252561
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Tue, 10 Nov 2015 00:10:41 +0000 (00:10 +0000)]
[ARM] Handle t2ADDri in ARMAsmPrinter::EmitUnwindingInstruction.
This fixes a bug in ARMAsmPrinter::EmitUnwindingInstruction where
llvm_unreachable was reached because t2ADDri wasn't handled.
Test case provided by Tim Northover.
rdar://problem/
23270609
http://reviews.llvm.org/D14518
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252557
91177308-0d34-0410-b5e6-
96231b3b80d8
Colin LeMahieu [Tue, 10 Nov 2015 00:02:27 +0000 (00:02 +0000)]
[Hexagon] Fixing load instruction parsing and reenabling tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252555
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Mon, 9 Nov 2015 23:59:33 +0000 (23:59 +0000)]
MachineVerifier: Streamline live interval related error reporting
Simply perform additional report_context() calls after a report()
instead of adding more and more overloaded variations of report(). Also
improve several instances where information was output in an ad-hoc way
probably because no matching report() overload was available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252552
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Mon, 9 Nov 2015 23:59:29 +0000 (23:59 +0000)]
MachineVerifier: Add missing linebreak
MachineInstr::print() with SkipOppers==true does not produce a
linebreak, so we have to do that in MachineVerifier::report().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252551
91177308-0d34-0410-b5e6-
96231b3b80d8