OSDN Git Service
Quentin Colombet [Mon, 18 Aug 2014 17:55:32 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Math instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215913
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Quentin Colombet [Mon, 18 Aug 2014 17:55:29 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Arithmetic instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215912
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Quentin Colombet [Mon, 18 Aug 2014 17:55:26 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Move instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215911
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Quentin Colombet [Mon, 18 Aug 2014 17:55:23 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Other instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215910
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Quentin Colombet [Mon, 18 Aug 2014 17:55:21 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Synchronization instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215909
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Quentin Colombet [Mon, 18 Aug 2014 17:55:19 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: String instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215908
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Quentin Colombet [Mon, 18 Aug 2014 17:55:16 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Control transfer instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215907
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Quentin Colombet [Mon, 18 Aug 2014 17:55:13 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Logic instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215906
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Quentin Colombet [Mon, 18 Aug 2014 17:55:11 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Arithmetic instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215905
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Quentin Colombet [Mon, 18 Aug 2014 17:55:08 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Move instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215904
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Robin Morisset [Mon, 18 Aug 2014 16:48:58 +0000 (16:48 +0000)]
Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends
Summary:
Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends
These helper functions are introduced in D4844.
Depends D4844
Test Plan: make check-all passes
Reviewers: jfb
Subscribers: aemerson, llvm-commits, mcrosier, reames
Differential Revision: http://reviews.llvm.org/D4937
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215902
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Aaron Ballman [Mon, 18 Aug 2014 14:54:22 +0000 (14:54 +0000)]
Disabling an MSVC warning ('var' : definition from the for loop is ignored; the definition from the enclosing scope is used) which will trigger false positives more than true positives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215895
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Oliver Stannard [Mon, 18 Aug 2014 14:22:39 +0000 (14:22 +0000)]
Teach the AArch64 backend to handle f16
This allows the AArch64 backend to handle fadd, fsub, fmul and fdiv
operations on f16 (half-precision) types by promoting to f32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215891
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Oliver Stannard [Mon, 18 Aug 2014 12:42:15 +0000 (12:42 +0000)]
[ARM,AArch64] Do not tail-call to an externally-defined function with weak linkage
Externally-defined functions with weak linkage should not be
tail-called on ARM or AArch64, as the AAELF spec requires normal calls
to undefined weak functions to be replaced with a NOP or jump to the
next instruction. The behaviour of branch instructions in this
situation (as used for tail calls) is implementation-defined, so we
cannot rely on the linker replacing the tail call with a return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215890
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Elena Demikhovsky [Mon, 18 Aug 2014 11:59:06 +0000 (11:59 +0000)]
AVX-512: Fixed a bug in emitting compare for MVT:i1 type.
Added a test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215889
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Aaron Ballman [Mon, 18 Aug 2014 11:51:41 +0000 (11:51 +0000)]
Silencing an MSVC warning about loop variable conflicting with a variable from an outer scope. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215888
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Tim Northover [Mon, 18 Aug 2014 11:49:42 +0000 (11:49 +0000)]
TableGen: allow use of uint64_t for available features mask.
ARM in particular is getting dangerously close to exceeding 32 bits worth of
possible subtarget features. When this happens, various parts of MC start to
fail inexplicably as masks get truncated to "unsigned".
Mostly just refactoring at present, and there's probably no way to test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215887
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Abramo Bagnara [Mon, 18 Aug 2014 07:48:18 +0000 (07:48 +0000)]
Added forgotten noexcept.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215886
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Craig Topper [Mon, 18 Aug 2014 00:24:38 +0000 (00:24 +0000)]
Revert "Repace SmallPtrSet with SmallPtrSetImpl in function arguments to avoid needing to mention the size."
Getting a weird buildbot failure that I need to investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215870
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Craig Topper [Sun, 17 Aug 2014 23:47:00 +0000 (23:47 +0000)]
Repace SmallPtrSet with SmallPtrSetImpl in function arguments to avoid needing to mention the size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215868
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Rafael Espindola [Sun, 17 Aug 2014 23:38:08 +0000 (23:38 +0000)]
Use copy initialization to initialize std::unique_ptr.
Thanks to David Blaikie for the suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215867
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Saleem Abdulrasool [Sun, 17 Aug 2014 22:51:04 +0000 (22:51 +0000)]
ARM: mark missing functions from RTABI
Simply indicate the functions that are part of the runtime library that we do
not setup libcalls for. This is merely for ease of identification. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215863
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Saleem Abdulrasool [Sun, 17 Aug 2014 22:51:02 +0000 (22:51 +0000)]
ARM: improve RTABI 4.2 conformance on Linux
The set of functions defined in the RTABI was separated for no real reason.
This brings us closer to proper utilisation of the functions defined by the
RTABI. It also sets the ground for correctly emitting function calls to AEABI
functions on all AEABI conforming platforms.
The previously existing lie on the behaviour of __ldivmod and __uldivmod is
propagated as it is beyond the scope of the change.
The changes to the test are due to the fact that we now use the divmod functions
which return both the quotient and remainder and thus we no longer need to
invoke two functions on Linux (making it closer to EABI's behaviour).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215862
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Saleem Abdulrasool [Sun, 17 Aug 2014 22:50:59 +0000 (22:50 +0000)]
ARM: whitespace
Whitespace fix, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215861
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Rafael Espindola [Sun, 17 Aug 2014 22:48:55 +0000 (22:48 +0000)]
Remove unused member variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215860
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Rafael Espindola [Sun, 17 Aug 2014 22:37:39 +0000 (22:37 +0000)]
Return a std::uinque_ptr. Every caller was already using one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215858
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Rafael Espindola [Sun, 17 Aug 2014 22:20:33 +0000 (22:20 +0000)]
Convert an ownership comment with std::uinque_ptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215855
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Rafael Espindola [Sun, 17 Aug 2014 21:36:47 +0000 (21:36 +0000)]
Pass a std::uinque_ptr to ParseAssembly to make the ownership explicit. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215852
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Rafael Espindola [Sun, 17 Aug 2014 21:22:19 +0000 (21:22 +0000)]
getLazyIRModule always takes ownership. Make that explicit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215851
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Rafael Espindola [Sun, 17 Aug 2014 21:11:31 +0000 (21:11 +0000)]
Return a std::unique_ptr to make the ownership explicit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215850
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Rafael Espindola [Sun, 17 Aug 2014 21:05:08 +0000 (21:05 +0000)]
Don't repeat the function name in comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215849
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Rafael Espindola [Sun, 17 Aug 2014 20:57:50 +0000 (20:57 +0000)]
Don't repeat names in comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215848
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Daniel Sanders [Sun, 17 Aug 2014 19:47:47 +0000 (19:47 +0000)]
Revert: r215698 - Current implementation of c.cond.fmt instructions only accept default cc0 register...
It causes a number of regressions when -fintegrated-as is enabled. This happens
because there are codegen-only instructions that incorrectly uses the first
operand as the encoding for the $fcc register. The regressions do not occur when
-via-file-asm is also given.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215847
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Saleem Abdulrasool [Sun, 17 Aug 2014 19:20:38 +0000 (19:20 +0000)]
ARM: correct toggling behaviour
This was a thinko. The intent was to flip the explicit bits that need toggling
rather than all bits. This would result in incorrect behaviour (which now is
tested).
Thanks to Nico Weber for pointing this out!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215846
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Rafael Espindola [Sun, 17 Aug 2014 19:09:37 +0000 (19:09 +0000)]
llvm-objdump: don't print relocations in non-relocatable files.
This matches the behavior of GNU objdump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215844
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Rafael Espindola [Sun, 17 Aug 2014 18:33:17 +0000 (18:33 +0000)]
Remove a redundant "public:". NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215842
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Hans Wennborg [Sun, 17 Aug 2014 18:31:18 +0000 (18:31 +0000)]
BumpPtrAllocator: remove 'no slabs allocated yet' check
We already handle the no-slabs case when checking whether the current slab
is large enough: if no slabs have been allocated, CurPtr and End are both 0.
alignPtr(0), will still be 0, and so "if (Ptr + Size <= End)" fails.
Differential Revision: http://reviews.llvm.org/D4943
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215841
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Rafael Espindola [Sun, 17 Aug 2014 17:52:10 +0000 (17:52 +0000)]
Add a non-templated ELFObjectFileBase class.
Use it to implement some ELF only virtual interfaces instead of using error
prone series of dyn_casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215838
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Rafael Espindola [Sun, 17 Aug 2014 16:31:39 +0000 (16:31 +0000)]
Fix an off-by-one bug in the target independent llvm-objdump.
It would prevent the display of a single byte instruction before a label.
Patch by Steve King!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215837
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Elena Demikhovsky [Sun, 17 Aug 2014 09:39:48 +0000 (09:39 +0000)]
Reverted last commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215828
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Elena Demikhovsky [Sun, 17 Aug 2014 09:36:07 +0000 (09:36 +0000)]
Reverted last commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215827
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Elena Demikhovsky [Sun, 17 Aug 2014 09:00:20 +0000 (09:00 +0000)]
Added a table for intrinsics on X86.
It should remove dosens of lines in handling instrinsics (in a huge switch) and give an easy way to add new intrinsics.
I did not completed to move al intrnsics to the table, I'll do this in the upcomming commits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215826
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Owen Anderson [Sun, 17 Aug 2014 03:51:29 +0000 (03:51 +0000)]
Remove an InstCombine that transformed patterns like (x * uitofp i1 y) to (select y, x, 0.0) when the multiply has fast math flags set.
While this might seem like an obvious canonicalization, there is one subtle problem with it. The result of the original expression
is undef when x is NaN (remember, fast math flags), but the result of the select is always defined when x is NaN. This means that the
new expression is strictly more defined than the original one. One unfortunate consequence of this is that the transform is not reversible!
It's always legal to make increase the defined-ness of an expression, but it's not legal to reduce it. Thus, targets that prefer the original
form of the expression cannot reverse the transform to recover it. Another way to think of it is that the transform has lost source-level
information (the fast math flags), which is undesirable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215825
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Chandler Carruth [Sun, 17 Aug 2014 00:40:34 +0000 (00:40 +0000)]
[x86] Fix an indentation goof in a prior commit. Should have re-run
clang-format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215824
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Chandler Carruth [Sun, 17 Aug 2014 00:40:31 +0000 (00:40 +0000)]
[shuffle] Teach the shufflevector fuzzer to support fixed element types.
I'm using this to try to find more minimal test cases by re-fuzzing
within a specific domain once errors are found.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215823
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NAKAMURA Takumi [Sat, 16 Aug 2014 22:28:37 +0000 (22:28 +0000)]
llvm/test/CodeGen/X86/fmul-combines.ll: Appease Windows x64. <4 x float> is passed by stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215821
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Matt Arsenault [Sat, 16 Aug 2014 10:14:19 +0000 (10:14 +0000)]
Fix fmul combines with constant splat vectors
Fixes things like fmul x, 2 -> fadd x, x
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215820
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Chandler Carruth [Sat, 16 Aug 2014 09:42:15 +0000 (09:42 +0000)]
[x86] Teach lots of the new vector shuffle lowering to use UNPCK
instructions for blend operations at 128 bits. This was a serious hole
in our prior blend lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215819
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David Majnemer [Sat, 16 Aug 2014 09:23:42 +0000 (09:23 +0000)]
InstCombine: Fix a potential bug in 0 - (X sdiv C) -> (X sdiv -C)
While *most* (X sdiv 1) operations will get caught by InstSimplify, it
is still possible for a sdiv to appear in the worklist which hasn't been
simplified yet.
This means that it is possible for 0 - (X sdiv 1) to get transformed
into (X sdiv -1); dividing by -1 can make the transform produce undef
values instead of the proper result.
Sorry for the lack of testcase, it's a bit problematic because it relies
on the exact order of operations in the worklist.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215818
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David Majnemer [Sat, 16 Aug 2014 08:55:06 +0000 (08:55 +0000)]
InstCombine: Combine mul with div.
We can combne a mul with a div if one of the operands is a multiple of
the other:
%mul = mul nsw nuw %a, C1
%ret = udiv %mul, C2
=>
%ret = mul nsw %a, (C1 / C2)
This can expose further optimization opportunities if we end up
multiplying or dividing by a power of 2.
Consider this small example:
define i32 @f(i32 %a) {
%mul = mul nuw i32 %a, 14
%div = udiv exact i32 %mul, 7
ret i32 %div
}
which gets CodeGen'd to:
imull $14, %edi, %eax
imulq $
613566757, %rax, %rcx
shrq $32, %rcx
subl %ecx, %eax
shrl %eax
addl %ecx, %eax
shrl $2, %eax
retq
We can now transform this into:
define i32 @f(i32 %a) {
%shl = shl nuw i32 %a, 1
ret i32 %shl
}
which gets CodeGen'd to:
leal (%rdi,%rdi), %eax
retq
This fixes PR20681.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215815
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Nico Weber [Sat, 16 Aug 2014 05:37:51 +0000 (05:37 +0000)]
arm asm: Let .fpu enable instructions, PR20447.
I'm not very happy with duplicating the fpu->feature mapping in ARMAsmParser.cpp
and in clang's driver. See the bug for a patch that doesn't do that, and the
review thread [1] for why this duplication exists.
1: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-
20140811/231052.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215811
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Eric Fiselier [Sat, 16 Aug 2014 02:16:25 +0000 (02:16 +0000)]
[LIT] Move display of unsupported and xfail tests to summary.
Summary:
This patch changes the way xfail and unsupported tests are displayed.
This output is only displayed when the --show-unsupported/--show-xfail flags are passed to lit.
Currently xfail/unsupported tests are printed during the run of the test-suite. I think its better to display this information during the summary instead.
This patch removes the printing of these tests from when they are run to the summary.
Reviewers: ddunbar, EricWF
Reviewed By: EricWF
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D4842
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215809
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Duncan P. N. Exon Smith [Sat, 16 Aug 2014 01:54:37 +0000 (01:54 +0000)]
BitcodeReader: Only create one basic block for each blockaddress
Block address forward-references are implemented by creating a
`BasicBlock` ahead of time that gets inserted in the `Function` when
it's eventually encountered.
However, if the same blockaddress was used in two separate functions
that were parsed *before* the referenced function (and the blockaddress
was never used at global scope), two separate basic blocks would get
created, one of which would be forgotten creating invalid IR.
This commit changes the forward-reference logic to create only one basic
block (and always return the same blockaddress).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215805
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Duncan P. N. Exon Smith [Sat, 16 Aug 2014 01:54:34 +0000 (01:54 +0000)]
UseListOrder: Correctly count the number of uses
This is an off-by-one bug I found by inspection, which would only
trigger if the bitcode writer sees more uses of a `Value` than the
reader. Since this is only relevant when an instruction gets upgraded
somehow, there unfortunately isn't a reasonable way to add test
coverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215804
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Duncan P. N. Exon Smith [Sat, 16 Aug 2014 01:54:32 +0000 (01:54 +0000)]
IR: Don't add inbounds to GEPs of extern_weak variables
Global variables that have `extern_weak` linkage may be null, so it's
incorrect to add `inbounds` when constant folding.
This also fixes a bug when parsing global aliases, whose forward
reference placeholders are global variables with `extern_weak` linkage.
If GEPs to these aliases are encountered before the alias itself, the
GEPs would incorrectly gain the `inbounds` keyword as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215803
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Andrea Di Biagio [Sat, 16 Aug 2014 00:29:44 +0000 (00:29 +0000)]
[DAGCombiner] Improve the folding of target independet shuffles to Undef.
When combining a pair of shuffle nodes, check if the combined shuffle mask is
trivially Undef. In case, immediately fold that pair of shuffles to Undef.
The lack of checks for undef masks was the root-cause of a poor-codegen bug
in the dag combiner.
Example:
%1 = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> <i32 4, i32 1, i32 1, i32 6>
%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 6>
%3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 3>
Before this patch, on x86 (with -mcpu=corei7) we failed to fold the entire
sequence to Undef value and therefore we generated:
shufps $-123, %xmm1, $xmm0
pshufd $-46, %xmm0, %xmm0
With this patch, the entire shuffle sequence is folded to Undef and no
shuffles are generated in the output assembly.
Added new test cases to test 'combine-vec-shuffle-5.ll'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215797
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Hal Finkel [Sat, 16 Aug 2014 00:17:05 +0000 (00:17 +0000)]
[PowerPC] Mark fixed-offset byvals as pointed-to by IR values
A byval object, even if allocated at a fixed offset (prescribed by the ABI) is
pointed to by IR values. Most fixed-offset stack objects are not pointed-to by
IR values, so the default is to assume this is not possible. However, we need
to override the default in this case (instruction scheduling can cause
miscompiles otherwise).
Fixes PR20280.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215795
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Hal Finkel [Sat, 16 Aug 2014 00:17:02 +0000 (00:17 +0000)]
Make isAliased property for fixed-offset stack objects adjustable
We used to assume that any fixed-offset stack object was not aliased. This
meant that no IR value could point to the memory contained in such an object.
This is a reasonable default, but is not a universally-correct
target-independent fact. For example, on PowerPC (both Darwin and non-Darwin),
some byval arguments are allocated at fixed offsets by the ABI. These, however,
certainly can be pointed to by IR values. This change moves the 'isAliased'
logic out of FixedStackPseudoSourceValue and into MFI, and allows the isAliased
property to be overridden for fixed-offset objects.
This will be used by an upcoming commit to the PowerPC backend to fix PR20280.
No functionality change intended (the behavior of
FixedStackPseudoSourceValue::isAliased has been made more conservative for
callers that don't pass an MFI object, but I don't see any in-tree callers that
do that).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215794
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Hal Finkel [Sat, 16 Aug 2014 00:16:29 +0000 (00:16 +0000)]
[PowerPC] Darwin byval arguments are not immutable
On PPC/Darwin, byval arguments occur at fixed stack offsets in the callee's
frame, but are not immutable -- the pointer value is directly available to the
higher-level code as the address of the argument, and the value of the byval
argument can be modified at the IR level.
This is necessary, but not sufficient, to fix PR20280. When PR20280 is fixed in
a follow-up commit, its test case will cover this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215793
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Sean Silva [Fri, 15 Aug 2014 23:39:01 +0000 (23:39 +0000)]
Revert "[Support] Promote cl::StringSaver to a separate utility"
This reverts commit r215784 /
3f8a26f6fe16cc76c98ab21db2c600bd7defbbaa.
LLD has 3 StringSaver's, one of which takes a lock when saving the
string... Need to investigate more closely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215790
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Robin Morisset [Fri, 15 Aug 2014 23:36:00 +0000 (23:36 +0000)]
Get rid of dead code: SelectAtomic64 in X86ISelDAGtoDAG.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215789
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Sean Silva [Fri, 15 Aug 2014 23:18:33 +0000 (23:18 +0000)]
[Support] Promote cl::StringSaver to a separate utility
This class is generally useful.
In breaking it out, the primary change is that it has been made
non-virtual. It seems like being abstract led to there being 3 different
(2 in llvm + 1 in clang) concrete implementations which disagreed about
the ownership of the saved strings (see the manual call to free() in the
unittest StrDupSaver; yes this is different from the CommandLine.cpp
StrDupSaver which owns the stored strings; which is different from
Clang's StringSetSaver which just holds a reference to a
std::set<std::string> which owns the strings).
I've identified 2 other places in the
codebase that are open-coding this pattern:
memcpy(Alloc.Allocate<char>(strlen(S)+1), S, strlen(S)+1)
I'll be switching them over. They are
* llvm::sys::Process::GetArgumentVector
* The StringAllocator member of YAMLIO's Input class
This also will allow simplifying Clang's driver.cpp quite a bit.
Let me know if there are any other places that could benefit from
StringSaver. I'm also thinking of adding a saveStringRef member for
getting a stable StringRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215784
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Robin Morisset [Fri, 15 Aug 2014 22:25:12 +0000 (22:25 +0000)]
Add two helper functions: isAtLeastAcquire, isAtLeastRelease
These methods are available on AtomicOrdering values, and will be used
in a later separate patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215779
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Robin Morisset [Fri, 15 Aug 2014 22:17:28 +0000 (22:17 +0000)]
Fix typos in comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215777
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Chad Rosier [Fri, 15 Aug 2014 21:38:16 +0000 (21:38 +0000)]
[AArch32] Add support for FP rounding operations for ARMv8/AArch32.
Phabricator Revision: http://reviews.llvm.org/D4935
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215772
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Nick Kledzik [Fri, 15 Aug 2014 21:35:07 +0000 (21:35 +0000)]
[Option] Support MultiArg in --help
Currently, if you use a MultiArg<> option, then printing out the help/usage
message will cause an assert. This fixes getOptionHelpName() to work with
MultiArg Options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215770
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Rafael Espindola [Fri, 15 Aug 2014 20:17:08 +0000 (20:17 +0000)]
Set comdats when lazily linking functions.
We were setting the comdat when functions were copied in the initial pass, but
not when they were linked only when we found out that they are needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215765
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Juergen Ributzka [Fri, 15 Aug 2014 18:55:55 +0000 (18:55 +0000)]
[FastISel][AArch64] Fix a latent bug in floating-point materialization.
The floating-point value positive zero (+0.0) is a valid immedate value
according to isFPImmLegal. As a result AArch64 FastISel went ahead and
used the immediate version of fmov to materialize the constant.
The problem is that the immediate version of fmov cannot encode an imediate for
postive zero. Instead a fmov from the zero register was supposed to be used in
this case.
This fix adds handling for this special case and uses fmov from the zero
register to materialize a positive zero (negative zeroes go to the constant
pool).
There is no test case for this, because this code is currently dead. It will be
enabled in a future commit and I will add a test case in a separate commit
after that.
This fixes <rdar://problem/
18027157>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215753
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Juergen Ributzka [Fri, 15 Aug 2014 18:55:52 +0000 (18:55 +0000)]
Reapplying [FastISel][AArch64] Cleanup constant materialization code. NFCI.
Note: This reapplies r215582 without any modifications. The refactoring wasn't
responsible for the buildbot failures.
Original commit message:
Cleanup and prepare constant materialization code for future commits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215752
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Matt Arsenault [Fri, 15 Aug 2014 18:42:22 +0000 (18:42 +0000)]
R600/SI: Move all fabs / fneg handling to patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215749
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Matt Arsenault [Fri, 15 Aug 2014 18:42:18 +0000 (18:42 +0000)]
R600/SI: Use source modifiers for f64 fneg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215748
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Matt Arsenault [Fri, 15 Aug 2014 18:42:15 +0000 (18:42 +0000)]
R600/SI: Use source modifier for f64 fabs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215747
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Matt Arsenault [Fri, 15 Aug 2014 18:42:11 +0000 (18:42 +0000)]
R600/SI: Refactor fneg / fabs patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215746
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Reid Kleckner [Fri, 15 Aug 2014 18:03:58 +0000 (18:03 +0000)]
Fix the build with MSVC 2013 after new shuffle code
MSVC gives this awesome diagnostic:
..\lib\Target\X86\X86ISelLowering.cpp(7085) : error C2971: 'llvm::VariadicFunction1' : template parameter 'Func' : 'isShuffleEquivalentImpl' : a local variable cannot be used as a non-type argument
..\include\llvm/ADT/VariadicFunction.h(153) : see declaration of 'llvm::VariadicFunction1'
..\lib\Target\X86\X86ISelLowering.cpp(7061) : see declaration of 'isShuffleEquivalentImpl'
Using an anonymous namespace makes the problem go away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215744
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Matt Arsenault [Fri, 15 Aug 2014 17:49:05 +0000 (17:49 +0000)]
R600/SI: Fix offset folding in some cases with shifted pointers.
Ordinarily (shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2)
is only done if the add has one use. If the resulting constant
add can be folded into an addressing mode, force this to happen
for the pointer operand.
This ends up happening a lot because of how LDS objects are allocated.
Since the globals are allocated next to each other, acessing the first
element of the second object is directly indexed by a shifted pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215739
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Chandler Carruth [Fri, 15 Aug 2014 17:42:00 +0000 (17:42 +0000)]
[x86] Teach the new AVX v4f64 shuffle lowering to use UNPCK instructions
where applicable for blending.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215737
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Juergen Ributzka [Fri, 15 Aug 2014 17:36:30 +0000 (17:36 +0000)]
[FastISel] Remove an performance debugging assert.
As Jim pointed out this assert isn't really needed to test for correctness,
because the code right afterwards does the same check and falls-back to
SelectionDAG - as intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215735
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Matt Arsenault [Fri, 15 Aug 2014 17:30:25 +0000 (17:30 +0000)]
R600/SI: Add intrinsic for ldexp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215734
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Juergen Ributzka [Fri, 15 Aug 2014 17:23:20 +0000 (17:23 +0000)]
[FastISel][ARM] Fix unit test from r215682.
Thanks Jim for finding this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215733
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Matt Arsenault [Fri, 15 Aug 2014 17:17:07 +0000 (17:17 +0000)]
R600/SI: Implement isLegalAddressingMode
The default assumes that a 16-bit signed offset is used.
LDS instruction use a 16-bit unsigned offset, so it wasn't
being used in some cases where it was assumed a negative offset
could be used.
More should be done here, but first isLegalAddressingMode needs
to gain an addressing mode argument. For now, copy most of the rest
of the default implementation with the immediate offset change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215732
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Moritz Roth [Fri, 15 Aug 2014 17:00:30 +0000 (17:00 +0000)]
ARM: Fix and re-enable load/store optimizer for Thumb1.
In a previous iteration of the pass, we would try to compensate for
writeback by updating later instructions and/or inserting a SUBS to
reset the base register if necessary.
Since such a SUBS sets the condition flags it's not generally safe to do
this. For now, only merge LDR/STRs if there is no writeback to the base
register (LDM that loads into the base register) or the base register is
killed by one of the merged instructions. These cases are clear wins
both in terms of instruction count and performance.
Also add three new test cases, and update the existing ones accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215729
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Moritz Roth [Fri, 15 Aug 2014 17:00:20 +0000 (17:00 +0000)]
ARM load/store optimizer: Compute BaseKill correctly.
This adds some code back that was deleted in r92053. The location of the
last merged memory operation needs to be kept up-to-date since MemOps
may be in a different order to the original instruction stream to
allow merging (since registers need to be in ascending order). Also
simplify the logic to determine BaseKill using findRegisterUseOperandIdx
to use an equivalent function call instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215728
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Juergen Ributzka [Fri, 15 Aug 2014 16:59:46 +0000 (16:59 +0000)]
[FastISel][ARM] Fix a think-o in my previous commit (r215682).
We actually need to return the register into which we materialized the constant
and not just "true" for success. This code is currently partially dead, that is
why it didn't trigger any failures yet. Once I change the order of the constant
materialization this code will be fully exercised.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215727
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Rafael Espindola [Fri, 15 Aug 2014 15:46:38 +0000 (15:46 +0000)]
Introduce a helper to combine instruction metadata.
Replace the old code in GVN and BBVectorize with it. Update SimplifyCFG to use
it.
Patch by Björn Steinbrink!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215723
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Rafael Espindola [Fri, 15 Aug 2014 15:12:13 +0000 (15:12 +0000)]
Make EmitAbsValue an static helper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215721
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Rafael Espindola [Fri, 15 Aug 2014 14:58:22 +0000 (14:58 +0000)]
Delete dead code. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215720
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Rafael Espindola [Fri, 15 Aug 2014 14:43:02 +0000 (14:43 +0000)]
Make EmitDwarfSetLineAddr an static helper. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215718
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Rafael Espindola [Fri, 15 Aug 2014 14:31:47 +0000 (14:31 +0000)]
Make BuildSymbolDiff an static helper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215717
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Amara Emerson [Fri, 15 Aug 2014 14:29:57 +0000 (14:29 +0000)]
[AArch64] Narrow arguments passed in wrong position on the stack in
big-endian mode.
Patch by Asiri Rathnayake.
Differential Revision: http://reviews.llvm.org/D4922
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215716
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Rafael Espindola [Fri, 15 Aug 2014 14:24:41 +0000 (14:24 +0000)]
Make ForceExpAbs an static helper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215715
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Rafael Espindola [Fri, 15 Aug 2014 14:20:32 +0000 (14:20 +0000)]
Add a helper to MCExpr for when an expression is know to be absolute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215713
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Rafael Espindola [Fri, 15 Aug 2014 14:01:07 +0000 (14:01 +0000)]
Remove HasLEB128.
We already require CFI, so it should be safe to require .leb128 and .uleb128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215712
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Bill Schmidt [Fri, 15 Aug 2014 13:51:57 +0000 (13:51 +0000)]
[PPC64] Add test case for r215685.
I had deferred adding this test case until I could get it down to a
reasonable size. That's done now.
Thanks,
Bill
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215711
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Benjamin Kramer [Fri, 15 Aug 2014 11:05:45 +0000 (11:05 +0000)]
PPC: Clean up pointer casting, no functionality change.
Silences GCC's -Wcast-qual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215703
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Chandler Carruth [Fri, 15 Aug 2014 11:01:40 +0000 (11:01 +0000)]
[x86] Add the initial skeleton of type-based dispatch for AVX vectors in
the new shuffle lowering and an implementation for v4 shuffles.
This allows us to handle non-half-crossing shuffles directly for v4
shuffles, both integer and floating point. This currently misses places
where we could perform the blend via UNPCK instructions, but otherwise
generates equally good or better code for the test cases included to the
existing vector shuffle lowering. There are a few cases that are
entertainingly better. ;]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215702
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Chandler Carruth [Fri, 15 Aug 2014 11:01:37 +0000 (11:01 +0000)]
[x86] Teach the instruction printer to decode immediate operands to
BLENDPS, BLENDPD, and PBLENDW instructions into pretty shuffle comments.
These will be used in my next commit as part of test cases for AVX
shuffles which can directly use blend in more places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215701
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Tim Northover [Fri, 15 Aug 2014 10:47:12 +0000 (10:47 +0000)]
ARM: implement MRS/MSR (banked reg) system instructions.
These are system-only instructions for CPUs with virtualization
extensions, allowing a hypervisor easy access to all of the various
different AArch32 registers.
rdar://problem/
17861345
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215700
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Erik Verbruggen [Fri, 15 Aug 2014 10:33:03 +0000 (10:33 +0000)]
Remove testcase from README which we didn't get. We do get it now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215699
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Vladimir Medic [Fri, 15 Aug 2014 09:29:30 +0000 (09:29 +0000)]
Current implementation of c.cond.fmt instructions only accept default cc0 register. This patch enables the instruction to accept other fcc registers. The aliases with default fcc0 registers are also defined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215698
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Chandler Carruth [Fri, 15 Aug 2014 07:41:57 +0000 (07:41 +0000)]
[x86] Remove the duplicated code for testing whether we can widen the
elements of a shuffle mask and simplify how it works. No functionality
changed now that the bug that was here has been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215696
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