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Tom Stellard [Fri, 22 Apr 2016 14:43:50 +0000 (14:43 +0000)]
CodeGen: Add a stand-alone hazard recognizer pass
Summary:
This new pass allows targets to use the hazard recognizer without having
to also run one of the schedulers. This is useful when compiling with
optimizations disabled for targets that still need noop hazards
to be handled correctly.
Reviewers: hfinkel, atrick
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D18594
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267156
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David Majnemer [Fri, 22 Apr 2016 14:12:50 +0000 (14:12 +0000)]
[EarlyCSE] Don't add the overflow flags to the hash
We take the intersection of overflow flags while CSE'ing.
This permits us to consider two instructions with different overflow
behavior to be replaceable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267153
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Nirav Dave [Fri, 22 Apr 2016 13:36:11 +0000 (13:36 +0000)]
Emit code16 in assembly in 16-bit mode
Summary:
When generating assembly using -m16 we must explicitly mark it as
16-bit. Emit .code16 at beginning of file. Fixes wrong results when
using -fno-integrated-as.
Reviewers: dwmw2
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19392
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267152
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Simon Dardis [Fri, 22 Apr 2016 13:19:22 +0000 (13:19 +0000)]
[mips] Fix select patterns for MIPS64
When targetting MIPS64R6 some of the patterns for select were guarded by a
broken predicate. The predicate was supposed to test if a constant value
could fit in a 16 bit zero-extended field. Instead the value was tested to
fit in a 16 bit sign-extended field. For negative constants of native word
width this resulted in wrong code generation.
Reviewers: vkalintiris, dsanders
Differential Review: http://reviews.llvm.org/D19378
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267151
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Teresa Johnson [Fri, 22 Apr 2016 13:09:17 +0000 (13:09 +0000)]
Document source_filename in LangRef.
Summary: Add documentation for new LLVM IR source_filename identifier.
Reviewers: joker.eph, majnemer
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D18857
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267150
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Vasileios Kalintiris [Fri, 22 Apr 2016 13:05:51 +0000 (13:05 +0000)]
[mips] Fix a small typo that would leave BLTZC out of getAnalyzableBrOpc().'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267149
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Daniel Sanders [Fri, 22 Apr 2016 12:04:42 +0000 (12:04 +0000)]
Revert r267049, r26706[16789], r267071 - Refactor raw pdb dumper into library
r267049 broke multiple buildbots (e.g. clang-cmake-mips, and clang-x86_64-linux-selfhost-modules) which the follow-ups have not yet resolved and this is preventing subsequent committers from being notified about additional failures on the affected buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267148
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Nikolay Haustov [Fri, 22 Apr 2016 11:39:43 +0000 (11:39 +0000)]
AMDGPU/SI: Add test missed in rL266865
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267144
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Silviu Baranga [Fri, 22 Apr 2016 11:21:36 +0000 (11:21 +0000)]
[InstCombine] Preserve fast math flags when combining PHIs
Summary:
When optimizing PHIs which have inputs floating point binary
operators, we preserve all IR flags except the fast math
flags.
This change removes the logic which tracked some of the IR flags
(no wrap, exact) and replaces it by doing an and on the IR flags of
all inputs to the PHI - which will also handle the fast math
flags.
Reviewers: majnemer
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19370
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267139
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Hrvoje Varga [Fri, 22 Apr 2016 11:18:40 +0000 (11:18 +0000)]
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
Differential Revision: http://reviews.llvm.org/D19354
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267137
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Zoran Jovanovic [Fri, 22 Apr 2016 10:15:12 +0000 (10:15 +0000)]
[mips][microMIPS] Add R_MICROMIPS_PC18_S3 relocation
Differential Revision: http://reviews.llvm.org/D15026
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267130
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Eric Liu [Fri, 22 Apr 2016 09:50:31 +0000 (09:50 +0000)]
Fix -Wunused-variable in non-asserts build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267128
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Daniel Sanders [Fri, 22 Apr 2016 09:37:26 +0000 (09:37 +0000)]
Revert r267098 - [MachineCombiner] Support for floating-point FMA on ARM64
It introduced buildbot failures on clang-cmake-mips, clang-ppc64le-linux, among others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267127
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Ashutosh Nema [Fri, 22 Apr 2016 08:34:05 +0000 (08:34 +0000)]
[X86]: Changing cost for “TRUNCATE v16i32 to v16i8” in SSE4.1 mode.
Summary:
rL256194 transforms truncations between vectors of integers into PACKUS/PACKSS
operations during DAG combine. This generates better code for truncate, so cost
of truncate needs to be changed but looks like it got changed only in SSE2 table
Whereas this change is also applicable for SSE4.1, so the cost of truncate needs
to be changed for that as well. Cost of “TRUNCATE v16i32 to v16i8” & “TRUNCATE
v16i16 to v16i8” should be same in SSE4.1 & SSE2 table. Removing their cost from
SSE4.1, so it will fall back to SSE2.
Reviewers: Simon Pilgrim
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267123
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Chris Dewhurst [Fri, 22 Apr 2016 08:17:17 +0000 (08:17 +0000)]
[Sparc] This provides support for itineraries on Sparc.
Specifically, itineraries for LEON processors has been added, along with several LEON processor Subtargets. Although currently all these targets are pretty much identical, support for features that will differ among these processors will be added in the very near future.
The different Instruction Itinerary Classes (IICs) added are sufficient to differentiate between the instruction timings used by LEON and, quite probably, by generic Sparc processors too, but the focus of the exercise has been for LEON processors, as the requirement of my project. If the IICs are not sufficient for other Sparc processor types and you want to add a new itinerary for one of those, it should be relatively trivial to adapt this.
As none of the LEON processors has Quad Floats, or is a Version 9 processor, none of those instructions have itinerary classes defined and revert to the default "NoItinerary" instruction itinerary.
Phabricator Review: http://reviews.llvm.org/D19359
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267121
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Chris Dewhurst [Fri, 22 Apr 2016 08:13:47 +0000 (08:13 +0000)]
The following code would not work before this patch, due to the inability to take the address of a global object:
void func1() {
...
}
int main(int argc, char** argv) {
void (*pFunc)();
pFunc = &func1
pFunc();
...
}
Phabricator review: http://reviews.llvm.org/D19368
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267120
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Vedant Kumar [Fri, 22 Apr 2016 06:51:37 +0000 (06:51 +0000)]
Revert "Initial implementation of optimization bisect support."
This reverts commit r267022, due to an ASan failure:
http://lab.llvm.org:8080/green/job/clang-stage2-cmake-RgSan_check/1549
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267115
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Zlatko Buljan [Fri, 22 Apr 2016 06:44:34 +0000 (06:44 +0000)]
[mips][microMIPS] Implement DVP, EVP and JALRC.HB instructions
Differential Revision: http://reviews.llvm.org/D18687
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267114
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David Majnemer [Fri, 22 Apr 2016 06:37:51 +0000 (06:37 +0000)]
[GVN] Respect fast-math-flags on fcmps
We assumed that flags were only present on binary operators. This is
not true, they may also be present on calls and fcmps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267113
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David Majnemer [Fri, 22 Apr 2016 06:37:48 +0000 (06:37 +0000)]
Fix some spelling mistakes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267112
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David Majnemer [Fri, 22 Apr 2016 06:37:45 +0000 (06:37 +0000)]
[EarlyCSE] Take the intersection of flags on instructions
EarlyCSE had inconsistent behavior with regards to flag'd instructions:
- In some cases, it would pessimize if the available instruction had
different flags by not performing CSE.
- In other cases, it would miscompile if it replaced an instruction
which had no flags with an instruction which has flags.
Fix this by being more consistent with our flag handling by utilizing
andIRFlags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267111
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Sanjoy Das [Fri, 22 Apr 2016 05:38:54 +0000 (05:38 +0000)]
[SCEV] Extract out a `isSCEVExprNeverPoison` helper; NFCI
Summary:
Also adds a small comment blurb on control flow + no-wrap flags, since
that question came up a few days back on llvm-dev.
Reviewers: bjarke.roune, broune
Subscribers: sanjoy, mcrosier, llvm-commits, mzolotukhin
Differential Revision: http://reviews.llvm.org/D19209
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267110
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Craig Topper [Fri, 22 Apr 2016 05:29:58 +0000 (05:29 +0000)]
[SystemZ] Mark CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF as Expand instead of Custom since the custom logic just did what Expand does when CTTZ/CTLZ are Legal. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267109
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Craig Topper [Fri, 22 Apr 2016 05:13:01 +0000 (05:13 +0000)]
[Lanai] Set CTLZ_ZERO_UNDEF/CTTZ_ZERO_UNDEF to Expand instead of Legal so they will be converted to CTLZ/CTTZ by LegalizeDAG. Remove extra instructions that only existed to to contain patterns that match the zero_undef operations. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267108
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Craig Topper [Fri, 22 Apr 2016 05:12:57 +0000 (05:12 +0000)]
[Lanai] Remove unused methods declarations. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267107
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Mehdi Amini [Fri, 22 Apr 2016 04:58:12 +0000 (04:58 +0000)]
Clean the API for CollectAsmUndefinedRefs, taking a Triple and a String InlineAsm instead of a Module (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267106
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Mehdi Amini [Fri, 22 Apr 2016 04:49:46 +0000 (04:49 +0000)]
IRObjectFile, clang-format fixup for r267104
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267105
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Mehdi Amini [Fri, 22 Apr 2016 04:45:57 +0000 (04:45 +0000)]
Use std::move on the enum to insert it into the pair to please MSVC
(I have no idea why is it needed)
Fixup for r267103
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267104
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Mehdi Amini [Fri, 22 Apr 2016 04:28:05 +0000 (04:28 +0000)]
Refactor IRObjectFile, extract a static CollectAsmUndefinedRefs() method to parse inline assembly (NFC)
I plan to call this from ThinLTOCodeGenerator.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267103
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Nicolai Haehnle [Fri, 22 Apr 2016 04:04:08 +0000 (04:04 +0000)]
AMDGPU/SI: add llvm.amdgcn.ps.live intrinsic
Summary:
This intrinsic returns true if the current thread belongs to a live pixel
and false if it belongs to a pixel that we are executing only for derivative
computation. It will be used by Mesa to implement gl_HelperInvocation.
Note that for pixels that are killed during the shader, this implementation
also returns true, but it doesn't matter because those pixels are always
disabled in the EXEC mask.
This unearthed a corner case in the instruction verifier, which complained
about a v_cndmask 0, 1, exec, exec<imp-use> instruction. That's stupid but
correct code, so make the verifier accept it as such.
Reviewers: arsenm, tstellarAMD
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D19191
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267102
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Craig Topper [Fri, 22 Apr 2016 03:22:38 +0000 (03:22 +0000)]
[AVX512] Teach lowering to use vplzcntd/q to implement 128/256-bit CTTZ_ZERO_UNDEF even without VLX support. We can just extend to 512-bits and extract like we do for CTLZ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267100
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Duncan P. N. Exon Smith [Fri, 22 Apr 2016 02:33:06 +0000 (02:33 +0000)]
ValueMapper/Enumerator: Clean up code in post-order traversals, NFC
Re-layer the functions in the new (i.e., newly correct) post-order
traversals in ValueEnumerator (r266947) and ValueMapper (r266949).
Instead of adding a node to the worklist in a helper function and
returning a flag to say what happened, return the node itself. This
makes the code way cleaner: the worklist is local to the main function,
there is no flag for an early loop exit (since we can cleanly bury the
loop), and it's perfectly clear when pointers into the worklist might be
invalidated.
I'm fixing both algorithms in the same commit to avoid repeating the
commit message; if you take the time to understand one the other should
be easy. The diff itself isn't entirely obvious since the traversals
have some noise (i.e., things to do), but here's the high-level change:
auto helper = [&WL](T *Op) { auto helper = [](T **&I, T **E) {
=> while (I != E) {
if (shouldVisit(Op)) { T *Op = *I++;
WL.push(Op, Op->begin()); if (shouldVisit(Op)) {
return true; return Op;
} }
return false; return nullptr;
}; };
=>
WL.push(S, S->begin()); WL.push(S, S->begin());
while (!empty()) { while (!empty()) {
auto *N = WL.top().N; auto *N = WL.top().N;
auto *&I = WL.top().I; auto *&I = WL.top().I;
bool DidChange = false;
while (I != N->end())
if (helper(*I++)) { => if (T *Op = helper(I, N->end()) {
DidChange = true; WL.push(Op, Op->begin());
break; continue;
} }
if (DidChange)
continue;
POT.push(WL.pop()); => POT.push(WL.pop());
} }
Thanks to Mehdi for helping me find a better way to layer this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267099
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Gerolf Hoflehner [Fri, 22 Apr 2016 02:15:19 +0000 (02:15 +0000)]
[MachineCombiner] Support for floating-point FMA on ARM64
Evaluates fmul+fadd -> fmadd combines and similar code sequences in the
machine combiner. It adds support for float and double similar to the existing
integer implementation. The key features are:
- DAGCombiner checks whether it should combine greedily or let the machine
combiner do the evaluation. This is only supported on ARM64.
- It gives preference to throughput over latency: the heuristic used is
to combine always in loops. The targets decides whether the machine
combiner should optimize for throughput or latency.
- Supports for fmadd, f(n)msub, fmla, fmls patterns
- On by default at O3 ffast-math
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267098
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Teresa Johnson [Fri, 22 Apr 2016 01:52:00 +0000 (01:52 +0000)]
[ThinLTO] Remove unused/incomplete lazy summary reading support (NFC)
This removes the interfaces added (and not yet complete) to support
lazy reading of summaries. This support is not expected to be needed
since we are moving to a model where the full index is only being
traversed in the thin link step, instead of the back ends.
(The second part of this that I plan to do next is remove the
GlobalValueInfo from the ModuleSummaryIndex - it was mostly needed to
support lazy parsing of summaries. The index can instead reference the
summary structures directly.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267097
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NAKAMURA Takumi [Fri, 22 Apr 2016 01:33:50 +0000 (01:33 +0000)]
Untabify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267096
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Nico Weber [Fri, 22 Apr 2016 01:08:56 +0000 (01:08 +0000)]
Try to fix UNRESOLVED: LLVM :: CodeGen/AArch64/arm64-regress-opt-cmp.s on bots.
This test used to write a .s file until r266971 fixed that. But on most bots,
the .s file still exists. Add an rm statement to clean up the bots. In a few
days, this statement can go away again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267095
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Saleem Abdulrasool [Fri, 22 Apr 2016 01:03:38 +0000 (01:03 +0000)]
ARM: fix test for Windows division
This was meant to be part of SVN r267080. cbz cannot use a high register, which
would be silently truncated. This has now been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267092
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Dan Gohman [Thu, 21 Apr 2016 23:59:48 +0000 (23:59 +0000)]
[WebAssembly] Limit alignment hints to natural alignment.
This follows the current binary format rules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267082
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Saleem Abdulrasool [Thu, 21 Apr 2016 23:53:19 +0000 (23:53 +0000)]
ARM: restrict register class for WIN__DBZCHK
WIN__DBZCHK will insert a CBZ instruction into the stream. This instruction
reserves 3 bits for the condition register (rn). As such, we must ensure that
we restrict the register to a low register. Use the tGPR class instead of GPR
to ensure that this is properly constrained. In debug builds, we would attempt
to use lr as a condition register which would silently get truncated with no
hint that the register selection was incorrect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267080
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Mike Aizatsky [Thu, 21 Apr 2016 23:38:45 +0000 (23:38 +0000)]
[sancov] using normalized filenames for blacklist checks.
Differential Revision: http://reviews.llvm.org/D19395
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267078
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David Blaikie [Thu, 21 Apr 2016 23:24:09 +0000 (23:24 +0000)]
Fix more -Wunused-variable in non-asserts build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267077
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Tim Northover [Thu, 21 Apr 2016 23:00:17 +0000 (23:00 +0000)]
MachO: enable .data_region directives everywhere
We'd disabled them on x86 because back in the early days some host tools
couldn't handle the new load commands. This no longer holds: anyone capable of
deploying Clang should be able to deploy its copies of ar/ranlib/etc.
rdar://
25254790
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267075
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David Blaikie [Thu, 21 Apr 2016 22:53:33 +0000 (22:53 +0000)]
Fix some -Wunused-variable warnings in non-asserts builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267073
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Vedant Kumar [Thu, 21 Apr 2016 22:40:59 +0000 (22:40 +0000)]
[Support] Fix Wcast-qual warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267072
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Reid Kleckner [Thu, 21 Apr 2016 22:37:55 +0000 (22:37 +0000)]
Fix PDB warnings and test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267071
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Derek Schuff [Thu, 21 Apr 2016 22:19:24 +0000 (22:19 +0000)]
Improve error message reporting for MachineFunctionProperties
When printing the properties required by a pass, only print the
properties that are set, and not those that are clear (only properties
that are set are verified, clear properties are "don't-care").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267070
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Amaury Sechet [Thu, 21 Apr 2016 22:17:39 +0000 (22:17 +0000)]
Remove dead code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267069
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Zachary Turner [Thu, 21 Apr 2016 22:16:19 +0000 (22:16 +0000)]
Fix -Wreturn-type warning with HAVE_DIA_SDK is false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267068
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Zachary Turner [Thu, 21 Apr 2016 22:13:25 +0000 (22:13 +0000)]
Fix pdbdump-headers.test after guid format change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267067
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Zachary Turner [Thu, 21 Apr 2016 22:08:27 +0000 (22:08 +0000)]
Fix for case sensitive filename failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267066
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Mike Aizatsky [Thu, 21 Apr 2016 22:00:13 +0000 (22:00 +0000)]
Fixed flag description
Summary:
asan-use-after-return control feature we call use-after-return or
stack-use-after-return.
Reviewers: kcc, aizatsky, eugenis
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19284
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267064
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Amaury Sechet [Thu, 21 Apr 2016 21:36:11 +0000 (21:36 +0000)]
Remove various warnings. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267061
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Derek Bruening [Thu, 21 Apr 2016 21:30:22 +0000 (21:30 +0000)]
[esan] EfficiencySanitizer instrumentation pass
Summary:
Adds an instrumentation pass for the new EfficiencySanitizer ("esan")
performance tuning family of tools. Multiple tools will be supported
within the same framework. Preliminary support for a cache fragmentation
tool is included here.
The shared instrumentation includes:
+ Turn mem{set,cpy,move} instrinsics into library calls.
+ Slowpath instrumentation of loads and stores via callouts to
the runtime library.
+ Fastpath instrumentation will be per-tool.
+ Which memory accesses to ignore will be per-tool.
Reviewers: eugenis, vitalybuka, aizatsky, filcab
Subscribers: filcab, vkalintiris, pcc, silvas, llvm-commits, zhaoqin, kcc
Differential Revision: http://reviews.llvm.org/D19167
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267058
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Amaury Sechet [Thu, 21 Apr 2016 21:29:10 +0000 (21:29 +0000)]
Add utility function to manipulate attributes on CallSite. NFC
Summary: As per title. This will help work on the C API.
Reviewers: Wallbraker, whitequark, joker.eph, echristo, rafael
Subscribers: joker.eph, llvm-commits
Differential Revision: http://reviews.llvm.org/D19173
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267057
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Kevin Enderby [Thu, 21 Apr 2016 21:20:40 +0000 (21:20 +0000)]
Fix a typo in an error message. Caught by Sean Silva!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267056
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Vedant Kumar [Thu, 21 Apr 2016 21:07:25 +0000 (21:07 +0000)]
[ProfileData] Report errors from InstrProfSymtab::create
InstrProfSymtab::create can fail with instrprof_error::malformed, but
this error is silently dropped. Propagate the error up to the caller so
we fail early.
Eventually, I'd like to transition ProfileData over to the new Error
class so we can't ignore hard failures like this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267055
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Sanjay Patel [Thu, 21 Apr 2016 21:02:25 +0000 (21:02 +0000)]
add tests for disguised fabs/fneg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267053
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Quentin Colombet [Thu, 21 Apr 2016 21:01:13 +0000 (21:01 +0000)]
[MachineBasicBlock] Make the pass argument truly mandatory when
splitting edges.
MachineBasicBlock::SplitCriticalEdges will crash if a nullptr would have
been passed for the Pass argument. Do not allow that by turning this
argument into a reference.
The alternative would have been to make the Pass a truly optional
argument, but although this is easy to do, I was afraid users using it
like this would not be aware the livness information, dominator tree and
such would silently be broken.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267052
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Sanjay Patel [Thu, 21 Apr 2016 20:58:58 +0000 (20:58 +0000)]
use FileCheck; add test for disguised fabs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267051
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Zachary Turner [Thu, 21 Apr 2016 20:58:41 +0000 (20:58 +0000)]
Add natvis visualizers for endian types.
This allows ulittle* and ubig* types to be visualized properly
in VS.
Differential Revision: http://reviews.llvm.org/D19339
Reviewed By: Aaron Ballman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267050
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Zachary Turner [Thu, 21 Apr 2016 20:58:35 +0000 (20:58 +0000)]
Refactor raw pdb dumper into library
PDB parsing code was hand-rolled into llvm-pdbdump. This patch moves the
parsing of this code into DebugInfoPDB and makes the dumper use this.
This is achieved by implementing the skeleton of RawPdbSession, the
non-DIA counterpart to the existing PDB read interface. None of the type /
source file / etc information is accessible yet, so this implementation is
not yet close to achieving parity with the DIA counterpart, but the
RawSession class simply holds a reference to a PDBFile class which handles
parsing the file format. Additionally a PDBStream class is introduced
which allows accessing the bytes of a particular stream in a PDB file.
Differential Revision: http://reviews.llvm.org/D19343
Reviewed By: majnemer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267049
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Quentin Colombet [Thu, 21 Apr 2016 20:46:27 +0000 (20:46 +0000)]
[MachineBasicBlock] Refactor SplitCriticalEdge to expose a query API.
Introduce canSplitCriticalEdge, so that clients can now query whether or
not a critical edge can be split without actually needing to split it.
This may be useful when gathering information for cost models for
instance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267046
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Kevin Enderby [Thu, 21 Apr 2016 20:29:49 +0000 (20:29 +0000)]
hange the variable name big_size to BigSize. Caught by Rafael Espíndola!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267043
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Andrew Kaylor [Thu, 21 Apr 2016 20:09:35 +0000 (20:09 +0000)]
Zero-initialize members of the CpuHashInfoTy structure for AsmParser
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267042
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Lang Hames [Thu, 21 Apr 2016 20:08:06 +0000 (20:08 +0000)]
[RuntimeDyld] Fix conservative over-allocation of memory for common symbols.
The previous allocation code was over-estimating the amount of memory required.
No test case: we don't currently have a good way to detect conervative
over-allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267041
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JF Bastien [Thu, 21 Apr 2016 19:53:39 +0000 (19:53 +0000)]
NFC: fix copy / paste comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267039
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Krzysztof Parzyszek [Thu, 21 Apr 2016 19:49:53 +0000 (19:49 +0000)]
[Hexagon] Properly recognize register alt names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267038
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Kevin Enderby [Thu, 21 Apr 2016 19:49:29 +0000 (19:49 +0000)]
Fix crash in llvm-objdump with -macho -objc-meta-data that was trying dump a non-existent section.
Showed up in running on a large binary with the missing section. I could create a fake
test case if anyone really wants but the fix is pretty obvious.
rdar://
25837034
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267037
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JF Bastien [Thu, 21 Apr 2016 19:41:48 +0000 (19:41 +0000)]
NFC: fix nonsensical comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267036
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Sanjoy Das [Thu, 21 Apr 2016 19:26:45 +0000 (19:26 +0000)]
Folding compares with unescaped allocations
Summary:
If we know that the pointer allocated within a function does not escape,
we can fold away comparisons that are done with global pointers
Patch by Anna Thomas!
Reviewers: reames, majnemer, sanjoy
Subscribers: mgrang, mcrosier, majnemer, llvm-commits
Differential Revision: http://reviews.llvm.org/D19276
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267035
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Krzysztof Parzyszek [Thu, 21 Apr 2016 18:56:45 +0000 (18:56 +0000)]
[Hexagon] Expand handling of the small-data/bss section
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267034
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Quentin Colombet [Thu, 21 Apr 2016 18:34:43 +0000 (18:34 +0000)]
[RegisterBankInfo] Change the API for the verify methods.
Return bool instead of void so that it is natural to put the calls into
asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267033
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Matt Arsenault [Thu, 21 Apr 2016 18:21:54 +0000 (18:21 +0000)]
AMDGPU: Fix debug name of pass to better match
I get this wrong every time I try to debug this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267030
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Matt Arsenault [Thu, 21 Apr 2016 18:19:11 +0000 (18:19 +0000)]
LegalizeDAG: Move unaligned load/store expansion to TLI
When custom lowered, this is not called if the store is custom
lowered. Move it to be a utility function so targets can
easily expand unaligned accesses when custom lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267029
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Quentin Colombet [Thu, 21 Apr 2016 18:09:34 +0000 (18:09 +0000)]
[RegisterBankInfo] Change the representation of the partial mappings.
Instead of holding a mask, hold two value: the start index and the
length of the mapping. This is a more compact representation, although
less powerful. That being said, arbitrary masks would not have worked
for the generic so do not allow them in the first place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267025
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Matt Arsenault [Thu, 21 Apr 2016 18:03:06 +0000 (18:03 +0000)]
DAGCombiner: Reduce 64-bit BFE pattern to pattern on 32-bit component
If the extracted bits are restricted to the upper half or lower half,
this can be truncated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267024
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Philip Reames [Thu, 21 Apr 2016 17:59:40 +0000 (17:59 +0000)]
[instcombine][unordered] Extend load(select) transform to handle unordered loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267023
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Andrew Kaylor [Thu, 21 Apr 2016 17:58:54 +0000 (17:58 +0000)]
Initial implementation of optimization bisect support.
This patch implements a optimization bisect feature, which will allow optimizations to be selectively disabled at compile time in order to track down test failures that are caused by incorrect optimizations.
The bisection is enabled using a new command line option (-opt-bisect-limit). Individual passes that may be skipped call the OptBisect object (via an LLVMContext) to see if they should be skipped based on the bisect limit. A finer level of control (disabling individual transformations) can be managed through an addition OptBisect method, but this is not yet used.
The skip checking in this implementation is based on (and replaces) the skipOptnoneFunction check. Where that check was being called, a new call has been inserted in its place which checks the bisect limit and the optnone attribute. A new function call has been added for module and SCC passes that behaves in a similar way.
Differential Revision: http://reviews.llvm.org/D19172
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267022
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Nicolai Haehnle [Thu, 21 Apr 2016 17:48:02 +0000 (17:48 +0000)]
Split IntrReadArgMem into IntrReadMem and IntrArgMemOnly
Summary:
IntrReadWriteArgMem simply becomes IntrArgMemOnly.
So there are fewer intrinsic properties that express their orthogonality
better, and correspond more closely to the corresponding IR attributes.
Suggested by: Philip Reames
Reviewers: joker.eph, reames, tstellarAMD
Subscribers: jholewinski, arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D19291
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267021
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Philip Reames [Thu, 21 Apr 2016 17:45:05 +0000 (17:45 +0000)]
[unordered] unordered loads from null are still unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267019
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Marcin Koscielnicki [Thu, 21 Apr 2016 17:36:05 +0000 (17:36 +0000)]
[PowerPC] [SSP] Fix stack guard load for 32-bit.
r266809 incorrectly used LD to load the stack guard, it should be LWZ.
Differential Revision: http://reviews.llvm.org/D19358
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267017
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Adam Nemet [Thu, 21 Apr 2016 17:33:22 +0000 (17:33 +0000)]
[LoopUtils] Fix typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267016
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Adam Nemet [Thu, 21 Apr 2016 17:33:20 +0000 (17:33 +0000)]
[LoopUtils] Add asserts to findStringMetadataForLoop. NFC
These ensure that operand array has at least one element and it is the
self-reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267015
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Adam Nemet [Thu, 21 Apr 2016 17:33:17 +0000 (17:33 +0000)]
[LoopUtils] Move def of findStringMetadataForLoop to LoopUtils.cpp. NFC
The decl is in LoopUtils.h. I think that this was added to
LoopVersioningLICM.cpp by mistake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267014
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Adam Nemet [Thu, 21 Apr 2016 17:33:12 +0000 (17:33 +0000)]
[LoopUtils] Rename {check->find}StringMetadata{Into->For}Loop. NFC
"Into" was misleading. I am also planning to use this helper to look
for loop metadata and return the argument, so find seems like a better
name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267013
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Philip Reames [Thu, 21 Apr 2016 17:03:33 +0000 (17:03 +0000)]
[instcombine][unordered] Implement *-load forwarding for unordered atomics
This builds on 266999 which made FindAvailableValue do the right thing. Tests included show the newly enabled transforms and those which disabled either due to conservatism or correctness requirements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267006
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Amjad Aboud [Thu, 21 Apr 2016 16:58:49 +0000 (16:58 +0000)]
Fixed Dwarf debug info emission to skip DILexicalBlockFile entries.
Before this fix, DILexicalBlockFile entries were skipped only in some cases and were not in other cases.
Differential Revision: http://reviews.llvm.org/D18724
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267004
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Philip Reames [Thu, 21 Apr 2016 16:51:08 +0000 (16:51 +0000)]
[unordered] Add tests and conservative handling in support of future changes [NFCI]
This change adds a couple of test cases to make sure FindAvailableLoadedValue does the right thing. At the moment, the code added is dead, but separating it makes follow on changes far more obvious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266999
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Chad Rosier [Thu, 21 Apr 2016 16:18:02 +0000 (16:18 +0000)]
Address Philip's post-commit feedback for r266987. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266998
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Philip Reames [Thu, 21 Apr 2016 16:15:19 +0000 (16:15 +0000)]
Minor comment cleanup [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266997
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Rafael Espindola [Thu, 21 Apr 2016 14:56:33 +0000 (14:56 +0000)]
Fix recursive -only-needed.
We were assuming that only linkonce_odr GVs were lazy linked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266995
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Zoran Jovanovic [Thu, 21 Apr 2016 14:32:12 +0000 (14:32 +0000)]
[mips][microMIPS] Implement ldpc instruction
Differential Revision: http://reviews.llvm.org/D15009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266990
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Zoran Jovanovic [Thu, 21 Apr 2016 14:09:35 +0000 (14:09 +0000)]
[mips][microMIPS] Add R_MICROMIPS_PC19_S2 relocation
Differential Revision: http://reviews.llvm.org/D14915
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266988
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Chad Rosier [Thu, 21 Apr 2016 14:04:54 +0000 (14:04 +0000)]
Refactor implied condition logic from ValueTracking directly into CmpInst. NFC.
Differential Revision: http://reviews.llvm.org/D19330
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266987
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Zoran Jovanovic [Thu, 21 Apr 2016 13:43:26 +0000 (13:43 +0000)]
[mips][microMIPS] Add R_MICROMIPS_PC26_S1 relocation
Differential Revision: http://reviews.llvm.org/D14822
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266985
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Sam Kolton [Thu, 21 Apr 2016 13:14:24 +0000 (13:14 +0000)]
[AMDGPU] Assembler: prevent parseDPPCtrlOps from eating invalid tokens
Reviewers: nhaustov, tstellarAMD
Subscribers: arsenm
Differential Revision: http://reviews.llvm.org/D19317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266984
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Rafael Espindola [Thu, 21 Apr 2016 12:16:21 +0000 (12:16 +0000)]
Add a CachedHash structure.
A DenseMap doesn't store the hashes, so it needs to recompute them when
the table is resized.
In some applications the hashing cost is noticeable. That is the case
for example in lld for symbol names (StringRef).
This patch adds a templated structure that can wraps any value that can
go in a DenseMap and caches the hash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266981
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Zlatko Buljan [Thu, 21 Apr 2016 11:32:40 +0000 (11:32 +0000)]
[mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructions
Differential Revision: http://reviews.llvm.org/D18855
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266980
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Zlatko Buljan [Thu, 21 Apr 2016 11:01:51 +0000 (11:01 +0000)]
[mips][microMIPS] Implement LL, SC, MOVEP, ROTR, ROTRV and SYSCALL instructions and add tests for LWM32 and SWM32
Differential Revision: http://reviews.llvm.org/D19150
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266977
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Evgeny Astigeevich [Thu, 21 Apr 2016 09:36:49 +0000 (09:36 +0000)]
Updated a test not to produce an empty s-file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266971
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