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Tim Northover [Fri, 16 May 2014 09:41:48 +0000 (09:41 +0000)]
ARM64: disable printing of "fcmXY ..., #0" aliases
The canonical syntax is "fcmXY ..., #0.0".
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208968
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Tim Northover [Fri, 16 May 2014 09:41:43 +0000 (09:41 +0000)]
AArch64: disable printing of add/sub alias
This alias appears not to have an appropriate PrintMethod. Normally, I'd look
into it, but since AArch64 is disappearing soon it's probably not worth it.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208967
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Tim Northover [Fri, 16 May 2014 09:41:39 +0000 (09:41 +0000)]
Sparc: disable printing of jmp/call aliases (C++ does it)
These aliases are handled entirely in C++ and only having TableGen InstAliases
for some of them was confusing LLVM.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208966
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Tim Northover [Fri, 16 May 2014 09:41:35 +0000 (09:41 +0000)]
Sparc: disable printing on longer "brX,pt" aliases
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208965
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Tim Northover [Fri, 16 May 2014 09:41:30 +0000 (09:41 +0000)]
Mips: don't print subu alias for addiu
Certainly not without having a custom PrintMethod to invert the immediate
beforehand. But probably not at all.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208964
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Tim Northover [Fri, 16 May 2014 09:41:26 +0000 (09:41 +0000)]
X86: disable printing of bare "mov" aliases
In AT&T syntax, we should probably print the full "movl" or "movw". TableGen
used to ignore these aliases because it was miscounting the number of operands.
This fixes the issue.
This will be tested when the TableGen "should I print this Alias"
heuristic is fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208963
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Tim Northover [Fri, 16 May 2014 09:41:21 +0000 (09:41 +0000)]
AArch64: disable printing of MOV -> MOVZ aliases
Actually, MOV sometimes is canonical, but for now this is a better
approximation than what's there.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208962
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Tim Northover [Fri, 16 May 2014 09:41:16 +0000 (09:41 +0000)]
ARM64: disable printing of swapped compare-mask aliases
You can perform (say) an fcmle operation by swapping the operands on an fcmge,
but it shouldn't be printed like that.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208961
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Tim Northover [Fri, 16 May 2014 09:41:12 +0000 (09:41 +0000)]
ARM64: disable printing of LDUR -> LDR aliases
We accept "ldr w3, [x1, #-1]" as a convenience, but we should still print the
canonical "ldur" form.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208960
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Tim Northover [Fri, 16 May 2014 09:41:08 +0000 (09:41 +0000)]
ARM64: give TST aliases priority over ANDS.
If an ANDS instruction has Rd == ZR it should be printed as TST since
its only effect is on the flags register NZCV.
This will be tested when the TableGen "should I print this Alias"
heuristic is fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208959
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Tim Northover [Fri, 16 May 2014 09:41:03 +0000 (09:41 +0000)]
ARM64: give MOV priority over shorter ORR when printing aliases.
MOV is almost always the right thing to print if possile. People understand it.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208958
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Tim Northover [Fri, 16 May 2014 09:40:58 +0000 (09:40 +0000)]
ARM64: give NEG priority over SUB when printing aliases.
For example, the full instruction "sub w0, wzr, w1, uxtw" could print as either
"neg w0, w1" or "sub w0, wzr, w1". The former is better.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208957
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Tim Northover [Fri, 16 May 2014 09:40:52 +0000 (09:40 +0000)]
ARM64: disable printing of "lslv" type aliases
You can write "lslv w0, w1, w2" (probably for legacy reasons), but it should be
printed as simply "lsl".
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208956
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Hao Liu [Fri, 16 May 2014 09:39:02 +0000 (09:39 +0000)]
[ARM64]Implement NEON post-increment LD1(lane) and post-increment LD1R.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208955
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Stepan Dyatkovskiy [Fri, 16 May 2014 08:55:34 +0000 (08:55 +0000)]
MergeFunctions Pass, introduced total ordering among function attributes.
This patch belongs to patch series that improves MergeFunctions
performance time from O(N*N) to O(N*log(N)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208953
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Zoran Jovanovic [Fri, 16 May 2014 08:42:27 +0000 (08:42 +0000)]
[mips][mips64r6] Add Floating Point Fused Multiply Add Subtract
Differential Revision: http://reviews.llvm.org/D3727
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208952
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Saleem Abdulrasool [Fri, 16 May 2014 05:41:33 +0000 (05:41 +0000)]
ARM: add some integer/floating point conversion libcalls
Add some Windows on ARM specific library calls. These are provided by msvcrt,
and can be used to perform integer to floating-point conversions (and
vice-versa) mirroring similar functions in the RTABI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208949
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Juergen Ributzka [Fri, 16 May 2014 02:33:15 +0000 (02:33 +0000)]
Add C API for thread yielding callback.
Sometimes a LLVM compilation may take more time then a client would like to
wait for. The problem is that it is not possible to safely suspend the LLVM
thread from the outside. When the timing is bad it might be possible that the
LLVM thread holds a global mutex and this would block any progress in any other
thread.
This commit adds a new yield callback function that can be registered with a
context. LLVM will try to yield by calling this callback function, but there is
no guaranteed frequency. LLVM will only do so if it can guarantee that
suspending the thread won't block any forward progress in other LLVM contexts
in the same process.
Once the client receives the call back it can suspend the thread safely and
resume it at another time.
Related to <rdar://problem/
16728690>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208945
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Justin Bogner [Fri, 16 May 2014 00:38:00 +0000 (00:38 +0000)]
ProfileData: Allow multiple profiles in RawInstrProfReader
Allow multiple raw profiles to coexist in a single .profraw file,
given the following conditions:
- Zero padding at the end of or between profiles will be skipped.
- Each profile must start with a valid header.
- Mixing endianness or pointer sizes in concatenated profiles files is
not allowed.
This is needed to handle cases where a program's shared libraries are
profiled as well as the main executable itself, as we'll need to emit
each executable's counters. Combining the tables in the runtime would
be expensive for the instrumented program.
rdar://
16918688
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208938
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Eric Christopher [Fri, 16 May 2014 00:32:52 +0000 (00:32 +0000)]
Remove the Options query functions and just access our Options directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208937
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Reid Kleckner [Thu, 15 May 2014 23:58:57 +0000 (23:58 +0000)]
musttail: Fix the verification of alignment attributes
Previously this would fail with an assertion failure when trying to add
an alignment attribute without a value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208935
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Jiangning Liu [Thu, 15 May 2014 23:45:42 +0000 (23:45 +0000)]
Implement global merge optimization for global variables.
This commit implements two command line switches -global-merge-on-external
and -global-merge-aligned, and both of them are false by default, so this
optimization is disabled by default for all targets.
For ARM64, some back-end behaviors need to be tuned to get this optimization
further enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208934
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David Blaikie [Thu, 15 May 2014 23:29:53 +0000 (23:29 +0000)]
DebugInfo: Follow up to r208930, comment usage of 'using' to bring in base class overload.
Code review feedback from Eric Christopher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208933
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Eric Christopher [Thu, 15 May 2014 23:27:49 +0000 (23:27 +0000)]
Move more MC options into the MCTargetOptions structure.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208932
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Eric Christopher [Thu, 15 May 2014 23:27:44 +0000 (23:27 +0000)]
Remove unused llvm namespace bool variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208931
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David Blaikie [Thu, 15 May 2014 23:18:15 +0000 (23:18 +0000)]
DebugInfo: Don't put fission type units in comdat sections.
Since type units in the dwo file are handled by a debug aware tool, they
don't need to leverage the ELF comdat grouping to implement
deduplication. Avoid creating all the .group sections for these as a
space optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208930
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Eric Christopher [Thu, 15 May 2014 23:06:30 +0000 (23:06 +0000)]
Make the -L option for SaveTempLabels not be static. No functional change.
Note: This option name is terrible, we should fix this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208929
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Reed Kotler [Thu, 15 May 2014 21:54:15 +0000 (21:54 +0000)]
Finish materialize for ints
Summary: We add code to materialize all integer literals.
Test Plan: simplestorei.ll
Reviewers: dsanders
Reviewed By: dsanders
Differential Revision: http://reviews.llvm.org/D3596
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208923
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Matt Arsenault [Thu, 15 May 2014 21:44:05 +0000 (21:44 +0000)]
Use range for
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208922
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Alexey Samsonov [Thu, 15 May 2014 21:24:32 +0000 (21:24 +0000)]
[DWARF parser] Use enums instead of bitfields in DILineInfoSpecifier.
It is more appropriate than the current situation, when one flag
(AbsoluteFilePath) is relevant only if another flag is set.
This refactoring would also simplify fetching the short function name
(stored in DW_AT_name) instead of a linkage name returned currently.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208921
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Reid Kleckner [Thu, 15 May 2014 21:10:46 +0000 (21:10 +0000)]
Don't insert lifetime.end markers between a musttail call and ret
The allocas going out of scope are immediately killed by the return
instruction.
This is a resend of r208912, which was committed accidentally.
Reviewers: chandlerc
Differential Revision: http://reviews.llvm.org/D3792
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208920
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Reid Kleckner [Thu, 15 May 2014 20:41:05 +0000 (20:41 +0000)]
Revert "Don't insert lifetime.end markers between a musttail call and ret"
This reverts commit r208912.
It was committed accidentally without review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208914
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Reid Kleckner [Thu, 15 May 2014 20:39:42 +0000 (20:39 +0000)]
Remove unused variable in inliner
We have to iterate over all the calls that were inlined to find out if
any were musttail.
Sink another variable down to where its used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208913
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Reid Kleckner [Thu, 15 May 2014 20:39:13 +0000 (20:39 +0000)]
Don't insert lifetime.end markers between a musttail call and ret
The allocas going out of scope are immediately killed by the return
instruction.
Reviewers: chandlerc
Differential Revision: http://reviews.llvm.org/D3630
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208912
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David Blaikie [Thu, 15 May 2014 20:18:50 +0000 (20:18 +0000)]
DebugInfo: Simplify retrieving filename/directory name for line table entry building.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208911
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Reid Kleckner [Thu, 15 May 2014 20:11:28 +0000 (20:11 +0000)]
Teach the inliner how to preserve musttail invariants
The interesting case is what happens when you inline a musttail call
through a musttail call site. In this case, we can't break perfect
forwarding or allow any stack growth.
Instead of merging control flow from the inlined return instruction
after a musttail call into the body of the caller, leave the inlined
return instruction in the caller so that the musttail call stays in the
tail position.
More work is required in http://reviews.llvm.org/D3630 to handle the
case where the inlined function has dynamic allocas or byval arguments.
Reviewers: chandlerc
Differential Revision: http://reviews.llvm.org/D3491
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208910
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David Blaikie [Thu, 15 May 2014 20:09:55 +0000 (20:09 +0000)]
DebugInfo: Add FIXME regarding DILexicalBlock uniquing fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208909
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Tom Stellard [Thu, 15 May 2014 19:50:25 +0000 (19:50 +0000)]
autoconf: Fix libLLVM-Major-Minor-Patch.so symlink
The symlink needs to point to a relative path, so we don't break
building in a chroot.
Tested-by: Laurent Carlier <lordheavym@gmail.org>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208908
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Simon Atanasyan [Thu, 15 May 2014 18:04:09 +0000 (18:04 +0000)]
[obj2yaml][ELF] Print relocation's offset as a hex number. Use a proper
types to hold relocation's offset and addend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208906
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Simon Atanasyan [Thu, 15 May 2014 18:04:02 +0000 (18:04 +0000)]
[obj2yaml][ELF] Do not print empty Link and Info fields for ELF sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208905
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Juergen Ributzka [Thu, 15 May 2014 17:49:20 +0000 (17:49 +0000)]
Revert "[PM] Add pass run listeners to the pass manager."
Revert the current implementation and C API. New implementation and C APIs are
in the works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208904
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Bradley Smith [Thu, 15 May 2014 16:28:32 +0000 (16:28 +0000)]
[ARM64] Improve diagnostics for Cn operands in SYS instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208902
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Simon Atanasyan [Thu, 15 May 2014 16:14:02 +0000 (16:14 +0000)]
[yaml2obj] Add "-o" command line option to specify an output file name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208900
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NAKAMURA Takumi [Thu, 15 May 2014 15:45:31 +0000 (15:45 +0000)]
llvm/test/CodeGen/X86/combine-sse41-intrinsics.ll: Add explicit triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208897
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Andrea Di Biagio [Thu, 15 May 2014 15:18:15 +0000 (15:18 +0000)]
[X86] Teach the backend how to fold SSE4.1/AVX/AVX2 blend intrinsics.
Added target specific combine rules to fold blend intrinsics according
to the following rules:
1) fold(blend A, A, Mask) -> A;
2) fold(blend A, B, <allZeros>) -> A;
3) fold(blend A, B, <allOnes>) -> B.
Added two new tests to verify that the new folding rules work for all
the optimized blend intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208895
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Zoran Jovanovic [Thu, 15 May 2014 15:16:36 +0000 (15:16 +0000)]
[mips][mips64r6] Add CLASS.fmt instructions
Differential Revision: http://reviews.llvm.org/D3712
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208894
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Zoran Jovanovic [Thu, 15 May 2014 15:04:37 +0000 (15:04 +0000)]
[mips][mips64r6] Add RINT.fmt instructions
Differential Revision: http://reviews.llvm.org/D3711
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208892
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Zoran Jovanovic [Thu, 15 May 2014 14:58:42 +0000 (14:58 +0000)]
[mips][mips64r6] Add SELEQZ/SELNEZ.fmt instructions
Differential Revision: http://reviews.llvm.org/D3710
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208891
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Zoran Jovanovic [Thu, 15 May 2014 14:54:06 +0000 (14:54 +0000)]
[mips][mips64r6] Add MAX/MIN/MAXA/MINA.fmt instructions
Differential Revision: http://reviews.llvm.org/D3709
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208890
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Tom Stellard [Thu, 15 May 2014 14:41:57 +0000 (14:41 +0000)]
R600/SI: Stop using VSrc_* as the default register class for types.
We now use SReg_* for integer types and VReg_* for floating-point types.
This should help simplify the SIFixSGPRCopies pass and no longer causes
ISel to insert a COPY after termiator instuctions that output a value.
This change is covered by exisitng tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208888
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Tom Stellard [Thu, 15 May 2014 14:41:55 +0000 (14:41 +0000)]
R600/SI: Fix a bug with handling of INSERT_SUBREG in SIFixSGPRCopies
This prevents a future commit from regressing the load-i1.ll test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208887
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Tom Stellard [Thu, 15 May 2014 14:41:54 +0000 (14:41 +0000)]
R600/SI: Only use SALU instructions for 64-bit add in a block of CF depth 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208886
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Tom Stellard [Thu, 15 May 2014 14:41:50 +0000 (14:41 +0000)]
R600/SI: Use VALU instructions for i1 ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208885
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Tim Northover [Thu, 15 May 2014 13:36:01 +0000 (13:36 +0000)]
TableGen: use correct MIOperand when printing aliases
Previously, TableGen assumed that every aliased operand consumed precisely 1
MachineInstr slot (this was reasonable because until a couple of days ago,
nothing more complicated was eligible for printing).
This allows a couple more ARM64 aliases to print so we can remove the special
code.
On the X86 side, I've gone for explicit AT&T size specifiers as the default, so
turned off a few of the aliases that would have just started printing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208880
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Daniel Sanders [Thu, 15 May 2014 12:18:23 +0000 (12:18 +0000)]
[mips][mips64r6] Add bitswap, and dbitswap
Summary: Depends on D3728
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3729
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208877
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Jay Foad [Thu, 15 May 2014 12:12:55 +0000 (12:12 +0000)]
Instead of littering asserts throughout the code after every call to
computeKnownBits, consolidate them into one assert at the end of
computeKnownBits itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208876
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Tim Northover [Thu, 15 May 2014 12:11:02 +0000 (12:11 +0000)]
ARM64: print correct aliases for NEON mov & mvn instructions
In all cases, if a "mov" alias exists, it is the canonical form of the
instruction. Now that TableGen can support aliases containing syntax variants,
we can enable them and improve the quality of the asm output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208874
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Daniel Sanders [Thu, 15 May 2014 12:06:36 +0000 (12:06 +0000)]
[mips][mips64r6] Add align and dalign
Summary: Depends on D3689
Reviewers: vmedic, zoran.jovanovic, jkolek
Reviewed By: jkolek
Differential Revision: http://reviews.llvm.org/D3728
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208872
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Tim Northover [Thu, 15 May 2014 11:16:32 +0000 (11:16 +0000)]
TableGen/ARM64: print aliases even if they have syntax variants.
To get at least one use of the change (and some actual tests) in with its
commit, I've enabled the AArch64 & ARM64 NEON mov aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208867
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Tim Northover [Thu, 15 May 2014 11:16:19 +0000 (11:16 +0000)]
ARM64: add correct vector registers during asm parsing
Previously, we ignored the difference between V64 and V128 when parsing
assembly: they both got mapped to registers in the FPR128 class. This is
basically harmless at the moment because they both print and encode the same
way. However, it will affect the printing of aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208866
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Bradley Smith [Thu, 15 May 2014 11:08:30 +0000 (11:08 +0000)]
[ARM64] Improve load/store diagnostics and forbid 32-bit register addresses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208864
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Bradley Smith [Thu, 15 May 2014 11:07:57 +0000 (11:07 +0000)]
[ARM64] Parse fixed vector lanes properly so that diagnostics can be emitted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208863
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Bradley Smith [Thu, 15 May 2014 11:07:28 +0000 (11:07 +0000)]
[ARM64] Add/Fixup diagnostics for floating point immediates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208862
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Bradley Smith [Thu, 15 May 2014 11:06:51 +0000 (11:06 +0000)]
[ARM64] Add condition code operand type such that proper diagnostics can be emitted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208861
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Bradley Smith [Thu, 15 May 2014 11:06:16 +0000 (11:06 +0000)]
[ARM64] Add more simple diagnostics for immediate/shift ranges
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208860
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Daniel Sanders [Thu, 15 May 2014 10:45:58 +0000 (10:45 +0000)]
[mips][mips64r6] Add addiupc, aluipc, and auipc
Summary:
No support for symbols in place of the immediate yet since it requires new
relocations.
Depends on D3671
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3689
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208858
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Daniel Sanders [Thu, 15 May 2014 10:27:19 +0000 (10:27 +0000)]
[mips][mips64r6] Add aui, daui, dahi, and dati
Summary: Depends on D3671
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3759
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208857
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Chandler Carruth [Thu, 15 May 2014 09:56:28 +0000 (09:56 +0000)]
Teach the constant folder to look through bitcast constant expressions
much more effectively when trying to constant fold a load of a constant.
Previously, we only handled bitcasts by trying to find a totally generic
byte representation of the constant and use that. Now, we look through
the bitcast to see what constant we might fold the load into, and then
try to form a constant expression cast of the found value that would be
equivalent to loading the value.
You might wonder why on earth this actually matters. Well, turns out
that the Itanium ABI causes us to create a single array for a vtable
where the first elements are virtual base offsets, followed by the
virtual function pointers. Because the array is homogenous the element
type is consistently i8* and we inttoptr the virtual base offsets into
the initial elements.
Then constructors bitcast these pointers to i64 pointers prior to
loading them. Boom, no more constant folding of virtual base offsets.
This is the first fix to LLVM to address the *insane* performance Eric
Niebler discovered with Clang on his range comprehensions[1]. There is
more to come though, this doesn't *really* fix the problem fully.
[1]: http://ericniebler.com/2014/04/27/range-comprehensions/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208856
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Daniel Sanders [Thu, 15 May 2014 09:47:43 +0000 (09:47 +0000)]
[mips][mips64r6] Test that branch likelies are not accepted on MIPS64r6.
Summary:
They aren't implemented for any ISA at the moment.
Depends on D3670
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3671
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208855
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Dinesh Dwivedi [Thu, 15 May 2014 08:22:55 +0000 (08:22 +0000)]
Reverting r208848, reason: build failure: sanitizer-x86_64-linux-bootstrap/builds/3399
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208852
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Dinesh Dwivedi [Thu, 15 May 2014 06:13:40 +0000 (06:13 +0000)]
Added instcombine for 'MIN(MIN(A, 27), 93)' and 'MAX(MAX(A, 93), 27)'
MIN(MIN(A, 23), 97) -> MIN(A, 23)
MAX(MAX(A, 97), 23) -> MAX(A, 97)
Differential Revision: http://reviews.llvm.org/D3629
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208849
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Dinesh Dwivedi [Thu, 15 May 2014 06:01:33 +0000 (06:01 +0000)]
Added inst combine transforms for single bit tests from Chris's note
if ((x & C) == 0) x |= C becomes x |= C
if ((x & C) != 0) x ^= C becomes x &= ~C
if ((x & C) == 0) x ^= C becomes x |= C
if ((x & C) != 0) x &= ~C becomes x &= ~C
if ((x & C) == 0) x &= ~C becomes nothing
Z3 Verifications code for above transform
http://rise4fun.com/Z3/Pmsh
Differential Revision: http://reviews.llvm.org/D3717
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208848
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Jonathan Roelofs [Thu, 15 May 2014 02:24:50 +0000 (02:24 +0000)]
Fix some dyslexia in an assert message
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208842
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Alp Toker [Thu, 15 May 2014 01:52:21 +0000 (01:52 +0000)]
Fix typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208839
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Jiangning Liu [Thu, 15 May 2014 01:33:17 +0000 (01:33 +0000)]
[ARM64] Support aggressive fastcc/tailcallopt breaking ABI by popping out argument stack from callee.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208837
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Eric Christopher [Thu, 15 May 2014 01:25:04 +0000 (01:25 +0000)]
Remove unused functions setting MCOptions from TargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208835
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Eric Christopher [Thu, 15 May 2014 01:10:50 +0000 (01:10 +0000)]
Unify command line handling of MCTargetOptions and remove extra
options and code. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208833
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Eric Christopher [Thu, 15 May 2014 01:08:00 +0000 (01:08 +0000)]
Move the TargetMachine MC options to MCTargetOptions. No functional
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208832
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David Majnemer [Thu, 15 May 2014 00:02:20 +0000 (00:02 +0000)]
InstCombine: Optimize -x s< cst
Summary:
This gets rid of a sub instruction by moving the negation to the
constant when valid.
Reviewers: nicholas
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D3773
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208827
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David Blaikie [Wed, 14 May 2014 22:51:59 +0000 (22:51 +0000)]
DwarfDebug: Don't set frame index locations on abstract variables.
Abstract variables should never have/use locations. In this case the
data wasn't used, so no functional change intended here, just
simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208820
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David Blaikie [Wed, 14 May 2014 21:52:46 +0000 (21:52 +0000)]
DebugInfo: Sure up subprogram variable list handling with more assertions and fewer conditionals.
Many old tests using prior schemas still had some brokenness here (both
indirect arrays and arrays with single bogus elements). Fixed those up
so they don't hit the new assertions.
Also reduced nesting in some places, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208817
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David Blaikie [Wed, 14 May 2014 21:52:37 +0000 (21:52 +0000)]
DebugInfo: Assert that a CU's subprogram list contains only subprograms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208816
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Kevin Enderby [Wed, 14 May 2014 21:18:50 +0000 (21:18 +0000)]
Teach llvm-nm to know about fat archives (aka MachOUniversal files
containing archives). First step as other tools will be updated next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208812
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Jay Foad [Wed, 14 May 2014 21:14:37 +0000 (21:14 +0000)]
Rename ComputeMaskedBits to computeKnownBits. "Masked" has been
inappropriate since it lost its Mask parameter in r154011.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208811
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David Majnemer [Wed, 14 May 2014 20:16:28 +0000 (20:16 +0000)]
InstSimplify: Optimize signed icmp of -(zext V)
Summary:
We know that -(zext V) will always be <= zero, simplify signed icmps
that have these.
Uncovered using http://www.cs.utah.edu/~regehr/souper/
Reviewers: nicholas
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D3754
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208809
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David Blaikie [Wed, 14 May 2014 17:58:53 +0000 (17:58 +0000)]
DebugInfo: Do not delay attaching DW_AT_inline attribute to abstract definitions.
This is just unneccessary - we only create abstract definitions when
we're inlining anyway, so there's no reason to delay this to see if
we're going to inline anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208798
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Christian Pirker [Wed, 14 May 2014 16:59:44 +0000 (16:59 +0000)]
ARM-BE: test files for vector argument passing
Reviewed at http://reviews.llvm.org/D3766
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208793
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Christian Pirker [Wed, 14 May 2014 16:51:58 +0000 (16:51 +0000)]
[ARM64-BE] Fix byte order of CIE and FDE frames for exception handling
Reviewed at http://reviews.llvm.org/D3741
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208792
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Logan Chien [Wed, 14 May 2014 16:38:30 +0000 (16:38 +0000)]
Fix ARM EHABI when function has landingpad and nounwind.
If the function has the landingpad instruction, then the
handlerdata should be emitted even if the function has
nouwnind attribute. Otherwise, following code will not
work:
void test1() noexcept {
try {
throw_exception();
} catch (...) {
log_unexpected_exception();
}
}
Since the cantunwind was incorrectly emitted and the
LSDA is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208791
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Logan Chien [Wed, 14 May 2014 16:37:32 +0000 (16:37 +0000)]
More test case for r208715.
The commit r208166 will cause some regression on ARM EHABI.
This fix has been committed in r208715, and an assertion failure
test case has been committed in r208770.
This commit further extends the unittest so that the actual
value in the handlerdata will be checked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208790
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Benjamin Kramer [Wed, 14 May 2014 16:14:45 +0000 (16:14 +0000)]
X86: If we have an instruction that sets a flag and a zero test on the input of that instruction try to eliminate the test.
For example
tzcntl %edi, %ebx
testl %edi, %edi
je .label
can be rewritten into
tzcntl %edi, %ebx
jb .label
A minor complication is that tzcnt sets CF instead of ZF when the input
is zero, we have to rewrite users of the flags from ZF to CF. Currently
we recognize patterns using lzcnt, tzcnt and popcnt.
Differential Revision: http://reviews.llvm.org/D3454
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208788
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Daniel Sanders [Wed, 14 May 2014 15:35:03 +0000 (15:35 +0000)]
[mips] Test that IAS for -mcpu=mips5 does not accept MIPS64 insns and -mcpu=mips(5|64) does not accept MIPS64r2
Summary:
To limit the number of tests required, only one 64-bit ISA prior to MIPS64 are tested.
rdhwr has been deliberately left without an ISA annotation for now. This is
because the assembler and CodeGen disagree on when the instruction is
available. Strictly speaking, it is only available in MIPS32r2 and
MIPS64r2. However, it is emulated by a kernel trap on earlier ISA's and is
necessary for TLS so CodeGen should emit it on older ISA's too.
Depends on D3697
Reviewers: vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3698
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208785
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Daniel Sanders [Wed, 14 May 2014 15:29:44 +0000 (15:29 +0000)]
[mips][mips64r6] Add sel.s and sel.d
Summary:
Also use named constants for common opcode fields.
Depends on D3669
Reviewers: vmedic, zoran.jovanovic, jkolek
Reviewed By: jkolek
Differential Revision: http://reviews.llvm.org/D3670
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208784
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Tim Northover [Wed, 14 May 2014 14:44:18 +0000 (14:44 +0000)]
ARM64: remove unneeded InstPrinter hacks
Now that TableGen handles aliases, these are unneeded. Hopefully more will be
able to go soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208781
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Evgeniy Stepanov [Wed, 14 May 2014 11:13:31 +0000 (11:13 +0000)]
Regression test for ARM EHABI breakage in r208166.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208770
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Evgeniy Stepanov [Wed, 14 May 2014 10:56:19 +0000 (10:56 +0000)]
[asan] Fix compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208769
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Evgeniy Stepanov [Wed, 14 May 2014 10:30:15 +0000 (10:30 +0000)]
[asan] Set debug location in ASan function prologue.
Most importantly, it gives debug location info to the coverage callback.
This change also removes 2 cases of unnecessary setDebugLoc when IRBuilder
is created with the same debug location.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208767
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Sylvestre Ledru [Wed, 14 May 2014 09:22:15 +0000 (09:22 +0000)]
Update of the documentation: I think we are now happy with Phabricator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208764
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Serge Pavlov [Wed, 14 May 2014 09:05:09 +0000 (09:05 +0000)]
Fix the case when reordering shuffle and binop produces a constant.
This resolves PR19737.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208762
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Jay Foad [Wed, 14 May 2014 08:10:16 +0000 (08:10 +0000)]
Fix strange typo in markup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208759
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