SKL and BDW use the same PAK pipeline for H.264/MPEG-2 encoding

Still use different functions if using GPU to construct the batchbuffer
for PAK

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 9034de9ca1493cd7198b7c3d4717891f08597b88)

Add support for VEBOX on SKL (v2)

Use separate functions to setup VEBOX states

v2: SURFACE_STATE for VEBOX is also changed

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 6b6e071fa3cdece347250a9a69f0ece9b279f89a)

JPEG Encode: Added support for UYVY/YUY2/Y8 Input formats

Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
(cherry picked from commit 2eb9a2037a05d742ee63638f3400b772f9a311e1)

Add the override flag to assure that HEVC video command always uses BSD ring0 for SKL GT3 machine

The SKL GT3 machine has two BSD video rings,which can dispatch the video
command.But the HEVC command is an exception, which can't be handled by
the second BSD video ring. So we need to assure that the HEVC command always
uses the first BSD video ring.

Reviewed-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit b2a558b335e27d53436df3cc8562163c1baa8f76)

Allow the batchbuffer to be submitted with override flag

Some machines have two BSD video rings. Sometimes the user-space application
want to specify which BSD ring is to dispatch the video command. In such case
the override flag is needed so that the kernel can handle it.

Reviewed-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit a213c724a013412357c355bfb10e472ea4d89d73)

Allow the extensional ring flag to be passed when submitting the batchbuffer

This is to add the preparation that the overrride flag can be added to specify
which BSD ring is used to dispatch the video command when there exist two
BSD video rings.

Reviewed-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 9e5eee3e96b8f80cdbd840426b573dc64b1c9f9a)

HEVC: Submit HCP_WEIGHTOFFSET_STATE if required

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit a8b5f9f8f2a7409b46a88bb28ce69045e7703ce1)

HEVC: Submit HCP_TILE_STATE if required

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 725d5640001c8de6e81a63616a48108db6f3dd8f)

Advertise the support for HEVC on SKL

v2: Only support HEVC Main Profile

v3: Check profile against VAProfileHEVCMain in i965_BeginPicture()

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit f623373aab09ff1477532dd25bd0ffe5bdd5e7e2)

HEVC: Make sure the buffer store is allocated for the current render target

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 376a33043b7c305e773d0f081e19136c14aab65b)

HEVC: Verify HEVC parameters before deocoding.

Allocate the underlying surface buffer store for each
reference frame if necessary

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit f6fe9e1f54d0505d48ef5649c84470dbeabede1c)

HEVC: update frame store index

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 6f3f9d024a5b000ae86b2b85d35b6e3679903f5d)

HEVC: gen9_hcpd_bsd_object()

Issue HCP_BSD_OBJECT to start decoding

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit bb11760356acf67a620bec96ae4b1b9327eec53b)

HEVC: gen9_hcpd_slice_state()

Set slice parameters in HCP_SLICE_STATE

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 7351a70a39b46f8e2eb7cb0079f51606c2d28aeb)

HEVC: gen9_hcpd_weightoffset_state()

Set weight/offset in HCP_WEIGHTOFFSET_STATE

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 25db1b6e98abfbbbb4b78d02495dd36fd0afacc4)

HEVC: gen9_hcpd_ref_idx_state()

Set reference idx entries in HCP_REF_IDX_STATE

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 1ac96d7e3691ac02ce109cd72eda1353f8e43dc2)

HEVC: gen9_hcpd_tile_state()

Set tile parameters in HCP_TILE_STATE

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit cf97c82d84762ea9fe6ec0cdc4c3bc78f0827141)

HEVC: gen9_hcpd_pic_state()

Set picture parameters in HCP_PIC_STATE

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 7bb3c21ff8b2e0ad27b8170732a80e8ce7c29ed6)

HEVC: gen9_hcpd_hevc_qm_state()

Set the quantization tables in HCP_QM_STATE. The default flat
tables will be used if application doesn't pass the valid tables
to driver or scaling_list_enable_flag is set to 0

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 481c5bd2b1560c2b1a9193e29b7d1f44f7913011)

HEVC: Set the default flat IQ matrix

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit d76ba3c5d46878be134dcdf1c17bb1a4e7f276f2)

HEVC: gen9_hcpd_ind_obj_base_addr_state()

Set the base address for the input bitsteam data buffer in
HCP_IND_OBJ_BASE_ADDR_STATE.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit b8cab43f24168958416aa483fda1678e895caf20)

HEVC: gen9_hcpd_pipe_buf_addr_state()

Set memory base address for all internal buffers and output buffer
in HCP_PIPE_BUF_ADDR_STATE

v2: Fix the command length and payload

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 44a175a30e4e4d21781d90bad1138eeff3797ce0)

HEVC: gen9_hcpd_surface_state()

Set the frame buffer pitch and the offset to the chroma component in
HCP_SURFACE_STATE. Only surface id 0 is used for HEVC decoding

v2: Fix the command payload

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 657d5999179e70b290db08ea4ca4399d26f52c2c)

HEVC: gen9_hcpd_pipe_mode_select();

Set HCP_PIPE_MODE_SELECT for HEVC decoding

v2: Fix the command payload

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 7616e76fe14238d752b88768dffb132eba195908)

HEVC: Add the frame store array

The function to update the frame store index will be added later

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit e758dcb38b37773df7253bc2ea7910adaf31258d)

HEVC: All internal buffers used for HCP pipe on SKL

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit fb48bc409a187ad1bc8a4ef626d95c4ecfaff828)

HEVC: append a motion vector temporal buffer to a VA surface

It is the current motion vector temporal buffer to the decoded
current surface, and the collocated motion verctor temporal buffer
for reference surface

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 1b1019020ebe3064bd0320bcc1391cc73c9b596c)

HEVC: some variables used later

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 4c8834b73dbf3b996b30ad05b140e07e52dd7ab9)

Add the initial code for HEVC decoding on SKL into the driver

The hcp (HEVC codec pipeline) for decoding will be built later

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit f5de561ddbf6f70efbbd9a2663327cce4ba5f0fb)

HEVC Codec Pipeline (HCP) commands on SKL

v2: replace HCP_BSD_OBJECT_STATE with HCP_BSD_OBJECT (Yakui)

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao, Yakui <yakui.zhao@intel.com>
(cherry picked from commit cfd6e631cc1941cc442030281d1ab525c7b40f62)

Add support for JPEG encoding on SKL

We can re-use CHV JPEG encoding pipeline

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 85fe60453c674d1927c9e05df2d896c53cb0e401)

Fix SKL media pipeline for VPP

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 2433a174971266c092b8db59943557e000dcbb4e)

Conflicts:

src/gen8_post_processing.c

Use BDW rebuilt shaders for skl encoding

BDW rebuilt shaders can be used for SKL encoding as verification on
simulator. Further checking of DOCs is needed.

V2:follow haihao's suggestion to update comments and some declaration.

Signed-off-by: Zhong Li <zhong.li@intel.com>
Reviewed-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 3815273df04cce853d849cd55a32e100057c2a48)

Conflicts:

src/shaders/vme/Makefile.am

Add Makefile.am to build the shader code for VPP on SKL

We can reuse all of BDW assembly shader code. CSC between
I420/YV12/NV12 are verfied on Simulator, other shaders will be
verfied on HW.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 65c30b5eec1951694fc051a1a9574c0613c09e9a)

Add the initial support for VPP on SKL

There are only a few changes on media pipeline between BDW
and SKL, so we can reuse most BDW VPP code. I will follow the DOCs
to fix media pipeline states for SKL and add shaders for each
processing

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 31f09369d4f934e19909616b2a2e94bc54ef3e64)

Conflicts:

src/gen8_post_processing.c

SKL: The minimum URB start address for VS is 4

Otherwise it may result in GPU hang

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Acked-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit e4efb9ea03a975a3b47b321be3c069f6ecd409e2)

SKL: Set the 3DSTATE_VF/3DSTATE_VF_INSTANCING

To ensure the "Component Packing Enable" bit is set to 0

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Acked-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit d43fbfedfaf3d645c744b84de5d35be7bb3b7294)

Rendering/SKL: Add the rendering shaders

Rendering is used to display the decoded image. It will do the color-space
conversion from NV12 to RGB, which is implemented by using 3D pipeline.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 0a5df060ed3a1090172d55ee1e4066670f79e8b9)

SKL: update the native SEND instruction

The extdesc field in SEND instruction is changed on SKL.
The Gfx assembler has been updated for this change, however
the used shader in the driver still use the wrong format.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Acked-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 931d32091caada8f569fc5a87db2b31af40e0131)

SKL: The SEND with EOT message must use register 112-127 as source register

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Acked-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit a60ae225bc927f895d6778c1206fa5b9250d6c11)

Rendering/SKL: Update the 3DSTATE_SBE command for 3D pipeline

This is based on the hardware spec.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 31b7d4edeb23f467787d816cf2c5ea6b7aa9ecfb)

SKL: Add the Render_SURFACE_STATE for SKL

This is based on the hardware spec.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 1a5d7fa7c3a7a3c9a14ccf2adb1b7687adde6f96)

SKL: Add the MEDIA_SURFACE_STATE for SKL

This is the hardware requirement.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit fe78cc5797e4b47addf64be7ae3aa13dee9375f2)

Media/SKL: Follow the spec to add the media_sampler DOP gating for media pipeline

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit ec9858da186beedad0f9bec1e03973663f2c38f2)

Media/SKL: Follow the spec to add the FORCE_MEDIA_AWAKE for media pipeline

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 1927da361bd529405340ca042df3ff9d4e5bb3e7)

Media/SKL: Follow the spec to add the pipeline_selection mask for media pipeline

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 79f35e7cb2a98168cc50fcda1fb83fb18c25ee53)

Media/SKL: Follow the spec to update the STATE_BASE_ADDRESS command for media pipeline

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit b660c288f963dd2a2bb1951feeb8161483c2faf2)

Media/Skl: Add the gen9_gpe_pipeline_setup to configure the media pipeline

As some media commands related with media pipeline are updated for SKL,
one new function is used to config the media pipeline on SKL.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 4f895ea354ddc1717c1a6a9d905f5a02ac4287b7)

Rendering/SKL: Follow the spec to update the 3DSTATE_DS command

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Rendering/SKL: Follw the spec to add the PIPE_SELECTION mask for pipeline selection

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Rendering/Skl: Update the STATE_BASE_ADDRESS command

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Skl: Flush batch buffer like that on Gen8

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Skl: Export the surface attribute like that on Gen8

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Conflicts:

src/i965_drv_video.c

Skl: Add the initial support for media encoding

The separated file are added for the media encoding on SKL, which is copied
from that on Gen8 and the function name is changed from gen8_xxx to gen9_xxx.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit f6da8bbc29d7449a3bc9e586906496eab4011c25)

Cleanup packed header insertion for MVC encoding

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit dde2a653519f757a167d4a1a55c516b1ec8d716e)

Skl: Add the initial support for rendering on Skl

The seperated file of gen9_render.c is added for the rendering, which
is copied from gen8_render.c and the function name is changed from
gen8_XXX to gen9_XXX.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 9f9e5d144bd4131876371df0dfc00085a39049e8)

Skl: Add the PCIIDs and initial driver-codec info for Skl

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 7d3be309fed0330097426ffd5a055cb2db473236)

Conflicts:

src/intel_driver.h

decoder: Remove the dependency on the fixed length frame store array

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 8fcc7d106e62e0e16aee2dc917b15ab2c744b1a3)

decoder: Remove the dependency on H.264 picture parameter

Only POC is needed in the algorithm

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit a91fbfdda1529af65690e87b46706c9c45dd3754)

decoder: Add struct gen_codec_surface

It is the base of struct gen_avc_surface, and move frame_store_id
from gen_avc_surface to gen_codec_surface

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit fc7085d4930f0ceef8ced414af96a7c18cf4fe52)

Conflicts:

src/i965_decoder_utils.c

Remove the check against obj_config->profile

The profile has been validated when creating the corresponding config,
it fixes a JPEG decode regression on non-CHV as well.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Remove two fields from struct i965_render_state

They are useless now

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Remove the check against render_state->interleaved_uv in i965_sw_getimage()

The surface and image have the same fourcc now, it is unnecessary to check
it is interleaved.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

JPEG Encode: Added JPEG Encode feature support for gen8

(cherry picked from commit d2984892694e2da72059419667e8839cb9513854)

JPEG Encode: Bypass VME for JPEG Encode

(cherry picked from commit 2910b0ca5357d871d1d8d60b05aeab24218eb2e9)

JPEG Encode: Added support for JPEG Encode in the driver.

(cherry picked from commit 14efb88b0f421c543b56cd73ab425a943e46f88f)

encoder: h264: Fix skip_emul_byte_count while inserting SEI header

The skip_emul_byte_count should include the start code and nal_unit
type, which is equl to five when the driver insert SEI headers.

(cherry picked from commit 68600bfd73c9190091a79330ada7f7be3d58757b)

Rendering: Align the origin coordinate of internal buffer during AVS conversion to fix greenline

The video post-processing is based on 16x16 and will be called by vaPutsurface
under some scenario. But Sometimes the region of internal buffer is not
aligned during VPP AVS conversion. In such case the greenline will appear on
some regions.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Bump version to 1.4.2.pre1

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 0428d5285f2c4f3013ad7f1c007cca4122dac124)

Conflicts:
configure.ac

vpp: fix check for non-linear anamorphic scaling on Sandybridge.

Fix pp_nv12_avs_initialize() to disable non-linear anamorphic scaling
when not actually requested on Sandybridge. This is now the main entry
point for advanced video scaling there, so the actual scaling mode is
checked for beforehand.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vpp: enable advanced video scaling in VPP pipelines too.

Honour advanced video scaling. i.e. propagate vaPutSurface() scaling
flags, but also VPP filter flags. Also enable the sharp 8x8 filter for
high-quality scaling options, while adaptive video scaling is disabled
(bypassed) for now.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vpp: drop internal postprocessing (I965_PP_xxx) flags.

Exclusively use VA-API defined video processing flags, instead of yet
redefining another set with limited use. This means that we can use
scaling, colorspace and picture structure flags as is, without an extra
layer of conversion.

Drop I965_PP_FLAG_MCDI (motion compensated deinterlacing), which was
never set. Dropped the associated dead code, which was never used. And,
anyway, advanced deinterlacing modes shall go through the explcit VPP
interfaces.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vpp: cache calculation of AVS coefficients.

If scaling parameters don't change, i.e. if the same scaling algorithm
and factors are used, there is no point in calculating the filter
coefficients again. So, just cache them into the existing AVS context.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vpp: validate AVS filter coefficients for debugging purposes.

Make sure the newly calculated filter coefficients fall into the HW
accepted range of values. This normally should not be an issue with
the current configuration / scaling algorithms though.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vpp: add support for high-quality scaling.

Add support for high-quality scaling during video processing. This is
enabled with the VA_FILTER_SCALING_HQ filter flag. The algorithm used
for that is based on a Lanczos convolution kernel: 3 lobes on either
side for luma samples, and 2 lobes on either side for chroma samples.

v2: fixed rounding precision for normalized coefficients.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vpp: factor out calculation of AVS coefficients.

Split calculation of AVS coefficients into separate helper functions
in view to supporting alternate algorithms, but we stick to bilinear
interpolation for now.

Actually fix bilinear filtering coefficients if the sharp 8x8 filter
is used. This is still disabled by default though.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vpp: fix AVS coefficients for Broadwell.

Fix AVS filter coefficients for Broadwell. At least, we now address
the expected entry in the table but the actual value is still not
viable enough.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vpp: fix adaptive filter for all channels flag (< Haswell).

The "Adaptive filter for all channels" bit for AVS on Ironlake up to
including Ivybridge/Baytrail is not located in DW137, but rather in
the first table of coefficients for chroma samples.

Thus, split the SAMPLER_STATE_8x8 message DW137 into parts relevant
to Haswell and newer generations ("hsw"), and to the legacy platforms
down to Ironlake ("ilk").

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Add one hook list to disable encoding on some Ivybridge machines

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ram Mohan Satyanarayana <ram.mohanx.satyanarayana@intel.com>
(cherry picked from commit 71a431b04ea04b93ba8f32e95fa545b30726bf59)

Add one hook list to disable encoding on some Sandybridge machines

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ram Mohan Satyanarayana <ram.mohanx.satyanarayana@intel.com>
(cherry picked from commit 080784f57f48c517d7a672b23b6d07278b232660)

Add final header to fix 'make dist'

Add the autogenerated header wayland-drm-client-protocol.h to
noinst_HEADERS thus silence 'make distcheck' about about it being
left out.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

Use python2 to execute gpp.py

Under Archlinux python points to python3, which results in
assertion while generating the gen5-6 files.

make[5]: Entering directory

'/home/emil/development/intel-driver/src/shaders/post_processing/gen5_6'
    GEN      nv12_avs_nv12.g5s
  Traceback (most recent call last):
    File "../../../../src/shaders/gpp.py", line 200, in <module>
      writeblocks(outfile, blocks)
    File "../../../../src/shaders/gpp.py", line 168, in writeblocks
      do_writeblock(block, [])
    File "../../../../src/shaders/gpp.py", line 161, in do_writeblock
      while check_cond(block.param_op, for_curs[0], block.param_limit):
    File "../../../../src/shaders/gpp.py", line 139, in check_cond
      assert type(lim) == int
  AssertionError
    GEN      nv12_avs_nv12.g4b.gen5
  nv12_avs_nv12.g5s: 1: syntax error at ""
  Makefile:617: recipe for target 'nv12_avs_nv12.g4b.gen5' failed

Check at configure time for python2, and fall-back to python.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

Do not overlink i965_drv_video

The va backend does not use any of the libva functions.
As such there is no need to link against it.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

post-processing: fix out of tree builds

 - add missing prefix for gpp.py
 - include the source directories, rather than the build ones.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

shaders: fix out of tree builds

 - correctly set include dir
 - prefix the file 'list' - it's located in the source folder
 - add missing prefix for gpp.py

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

debian: cleanup control & changelog on 'make dist'

Move the files from maintainer~ to dist(cleanfiles)
The former is implicitly included by the latter. 'make dist' is not
fully working yet this brings us a step closer.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

configure: use ${libdir} over the hardcoded /usr/lib

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

configure: use top_builddir for wayland_scanner_rules

Autotools already copies the files appropriately, and using
top_srcdir causes the files to be generated in the source
tree rather than the build one.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

autogen.sh: fix out of tree invocation

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

Call preinit_hw_codec callback after successful initialization to avoid segment fault issue on unsupported platform

Reported-by: Nicholas Andrade <sdnick484@yahoo.com>
Tested-by: Nicholas Andrade <sdnick484@yahoo.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 12d1be8fee694f60698e2ce277afff89d029f836)

vebox: fix denoising when IECP is enabled.

If IECP is enabled, for instance when color conversion is performed
or ProcAmp adjustments are applied, the ultimate denoised output with
additional processing operations applied is the Current Output frame,
not the plain Current Denoised Output frame.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vebox: fix memory leak of VEBOX state tables.

This occurs after a while (~10-20 minutes) when video processing is
used, and deinterlacing in particular. At some point, GPU memory is
exhausted and we start error'ing out to upper layers.

https://bugzilla.gnome.org/show_bug.cgi?id=731460#c31

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vebox: use Y-tiling for internal VEBOX surfaces.

Always use Y-tiling in native surface format for performance reasons.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vebox: add support for advanced deinterlacing.

Reintegrate Motion Adaptive Deinterlacing (MADI) and Motion Compensated
Deinterlacing (MCDI) support. This is totally reworked so that to allow
for bob-deinterlacing if no previous frame was supplied, improve global
robustness, and ensure that the right surface storage are used, which
is the most important fix.

https://bugs.freedesktop.org/show_bug.cgi?id=79698
https://bugs.freedesktop.org/show_bug.cgi?id=79528

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vebox: factor out deinterlacing code, drop broken MADI/MCDI support.

Completely rework the VEBOX code to factor out and improve the various
deinterlacing algorithms in particular. Introduce temporary variables
that are going to be live for the current VPP processing call.

Drop MADI/MCDI support for now, as it never really worked.

Initial focus was to definitively fix first vs. second field detection
code, thus allowing for multiple VEBOX calls with an additional format
conversion away.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vebox: robustify frame store surface storage allocations.

Clean-up frame store surface storage allocation, rename the helper
function to gen75_vebox_ensure_surfaces_storage() and make it more
robust to allocation errors. i.e. propagate them up right away.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vebox: factor out initialization of pipeline parameters.

Factor out initialization and validation of pipeline parameters.
In particular, introduce a new gen75_vebox_init_pipe_params() helper
function that initializes the filters mask and ensures the supplied
filters are going to be supported.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vebox: clean-up frame store initialization.

Rename FRAME_STORE_SUM to FRAME_STORE_COUNT, use existing macros to
determine the number of elements in the frame store array, avoid
duplicate zero initializations.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vebox: fix invalid conversion and scaling params order.

The arguments to vpp_surface_convert() were mixed up. i.e. both input
and output surfaces were reversed. Changed the vpp_surface_scaling()
arguments order as well to have more consistent helper functions.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vebox: fix order of submitted commands.

For each frame, the Intel HD Graphics hardware specification mandates
that the following commands should be submitted, in-order: VEBOX_STATE,
VEBOX_SURFACE_STATE(input), VEBOX_SURFACE_STATE(output), VEB_DI_IECP.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vebox: fix indication of field ordering in sequence.

VEBOX_DNDI_STATE::dndi_top_first indicates whether the top field is
first in sequence (TFF), or if the bottom field comes first. This is
an indication of the temporal sequence for input frames, available
in the "history" buffer. As such, the correct flag to check against,
from a VA-API perspective, is VA_DEINTERLACING_BOTTOM_FIELD_FIRST.

https://bugs.freedesktop.org/show_bug.cgi?id=72518
https://bugs.freedesktop.org/show_bug.cgi?id=72522

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vebox: drop magic numbers in filters mask.

Use the existing VPP_{DNDI,IECP}_xxx flags instead of magic numbers.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vebox: silence compilation warning.

Silence the following compilation warning:
  CC     i965_drv_video_la-gen75_vpp_vebox.lo
gen75_vpp_vebox.c: In function 'bdw_veb_dndi_iecp_command':
gen75_vpp_vebox.c:1537:5: warning: suggest parentheses around arithmetic in operand of '|' [-Wparentheses]

Also simplify the calculation of the VEB_DI_IECP::endingX variable
with existing helper macros.

v2: renamed endingX to width64, which represents the width aligned
  on to 64 columns, dropped obsolete startingX [Yakui]

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>