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Zachary Turner [Fri, 16 Feb 2018 20:46:04 +0000 (20:46 +0000)]
Fix emission of PDB string table.
This was originally reported as a bug with the symptom being "cvdump
crashes when printing an LLD-linked PDB that has an S_FILESTATIC record
in it". After some additional investigation, I determined that this was
a symptom of a larger problem, and in fact the real problem was in the
way we emitted the global PDB string table. As evidence of this, you can
take any lld-generated PDB, run cvdump -stringtable on it, and it would
return no results.
My hypothesis was that cvdump could not *find* the string table to begin
with. Normally it would do this by looking in the "named stream map",
finding the string /names, and using its value as the stream index. If
this lookup fails, then cvdump would fail to load the string table.
To test this hypothesis, I looked at the name stream map generated by a
link.exe PDB, and I emitted exactly those bytes into an LLD-generated
PDB. Suddenly, cvdump could read our string table!
This code has always been hacky and we knew there was something we
didn't understand. After all, there were some comments to the effect of
"we have to emit strings in a specific order, otherwise things don't
work". The key to fixing this was finally understanding this.
The way it works is that it makes use of a generic serializable hash map
that maps integers to other integers. In this case, the "key" is the
offset into a buffer, and the value is the stream number. If you index
into the buffer at the offset specified by a given key, you find the
name. The underlying cause of all these problems is that we were using
the identity function for the hash. i.e. if a string's offset in the
buffer was 12, the hash value was 12. Instead, we need to hash the
string *at that offset*. There is an additional catch, in that we have
to compute the hash as a uint32 and then truncate it to uint16.
Making this work is a little bit annoying, because we use the same hash
table in other places as well, and normally just using the identity
function for the hash function is actually what's desired. I'm not
totally happy with the template goo I came up with, but it works in any
case.
The reason we never found this bug through our own testing is because we
were building a /parallel/ hash table (in the form of an
llvm::StringMap<>) and doing all of our lookups and "real" hash table
work against that. I deleted all of that code and now everything goes
through the real hash table. Then, to test it, I added a unit test which
adds 7 strings and queries the associated values. I test every possible
insertion order permutation of these 7 strings, to verify that it really
does work as expected.
Differential Revision: https://reviews.llvm.org/D43326
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325386
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Simon Pilgrim [Fri, 16 Feb 2018 20:41:06 +0000 (20:41 +0000)]
Remove useless comment - seems to be a copy+paste typo. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325385
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Evandro Menezes [Fri, 16 Feb 2018 20:00:57 +0000 (20:00 +0000)]
[AArch64] Fix BITCAST lowering crash
The data type is assumed to be a vector, but sometimes it is not, leading
to an assertion.
Add simple test-case to verify this.
Differential revision: https://reviews.llvm.org/D42599
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325378
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Changpeng Fang [Fri, 16 Feb 2018 19:14:17 +0000 (19:14 +0000)]
AMDGPU/SI: Extend promoting alloca to vector to arrays of up to 16 elements
Summary:
This patch extends the promotion of alloca to vector to the arrays of up to 16 elements. Also we introduce
an option, -disable-promote-alloca-to-vector, to switch promotion to vector off, if needed.
Reviewers:
arsenm
Differential Revision:
https://reviews.llvm.org/D33559
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325372
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Craig Topper [Fri, 16 Feb 2018 18:51:09 +0000 (18:51 +0000)]
[X86] Only reorder srl/and on last DAG combiner run
This seems to interfere with a target independent brcond combine that looks for the (srl (and X, C1), C2) pattern to enable TEST instructions. Once we flip, that combine doesn't fire and we end up exposing it to the X86 specific BT combine which causes us to emit a BT instruction. BT has lower throughput than TEST.
We could try to make the brcond combine aware of the alternate pattern, but since the flip was just a code size reduction and not likely to enable other combines, it seemed easier to just delay it until after lowering.
Differential Revision: https://reviews.llvm.org/D43201
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325371
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Craig Topper [Fri, 16 Feb 2018 18:34:46 +0000 (18:34 +0000)]
[X86] Remove call to ShrinkDemandedCosntant from the SHRUNKBLEND creation code.
We only run this code if know the condition isn't a constant vector. ShrinkDemandedConstant isn't going to find any different.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325368
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Sam Clegg [Fri, 16 Feb 2018 18:06:05 +0000 (18:06 +0000)]
[WebAssembly] MC: Make explicit our current lack of support for relocations against unnamed temporary symbols.
Add an explicit check before looking up symbol in SymbolIndices.
This was previously silently succeeding and returning zero for such
unnamed temporaries.
Differential Revision: https://reviews.llvm.org/D43365
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325367
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Sanjay Patel [Fri, 16 Feb 2018 17:52:32 +0000 (17:52 +0000)]
[InstCombine] clean up fdiv-with-fdiv folds; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325366
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Sanjay Patel [Fri, 16 Feb 2018 17:46:50 +0000 (17:46 +0000)]
[InstCombine] add FMF to better show current fdiv fold behavior; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325365
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Simon Pilgrim [Fri, 16 Feb 2018 17:26:59 +0000 (17:26 +0000)]
Fix signed/unsigned comparison warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325363
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Eugene Leviant [Fri, 16 Feb 2018 17:25:03 +0000 (17:25 +0000)]
[ThinLTO] Fix data race in test #2
Switched to the right option (-thinlto-threads)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325362
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Eugene Leviant [Fri, 16 Feb 2018 16:56:33 +0000 (16:56 +0000)]
[ThinLTO] Fix data race in test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325361
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Simon Pilgrim [Fri, 16 Feb 2018 16:52:50 +0000 (16:52 +0000)]
Fix signed/unsigned comparison warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325359
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Sanjay Patel [Fri, 16 Feb 2018 16:42:04 +0000 (16:42 +0000)]
[InstCombine] remove redundant debug info setting; NFC
The IRBuilder sets debuginfo in Insert(), so this was duplicating what already happened.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325358
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Brian M. Rzycki [Fri, 16 Feb 2018 16:35:17 +0000 (16:35 +0000)]
[JumpThreading] PR36133 enable/disable DominatorTree for LVI analysis
Summary:
The LazyValueInfo pass caches a copy of the DominatorTree when available.
Whenever there are pending DominatorTree updates within JumpThreading's
DeferredDominance object we cannot use the cached DT for LVI analysis.
This commit adds the new methods enableDT() and disableDT() to LVI.
JumpThreading also sets the appropriate usage model before calling LVI
analysis methods.
Fixes https://bugs.llvm.org/show_bug.cgi?id=36133
Reviewers: sebpop, dberlin, kuhar
Reviewed by: sebpop, kuhar
Subscribers: uabelho, llvm-commits, aprantl, hiraditya, a.elovikov
Differential Revision: https://reviews.llvm.org/D42717
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325356
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Changpeng Fang [Fri, 16 Feb 2018 16:31:30 +0000 (16:31 +0000)]
AMDGPU/SI: Turn off GPR Indexing Mode immediately after the interested instruction.
Summary:
In the current implementation of GPR Indexing Mode when the index is of non-uniform, the s_set_gpr_idx_off instruction
is incorrectly inserted after the loop. This will lead the instructions with vgpr operands (v_readfirstlane for example) to read incorrect
vgpr.
In this patch, we fix the issue by inserting s_set_gpr_idx_on/off immediately around the interested instruction.
Reviewers:
rampitec
Differential Revision:
https://reviews.llvm.org/D43297
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325355
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Simon Pilgrim [Fri, 16 Feb 2018 16:22:14 +0000 (16:22 +0000)]
[SelectionDAG] Enable SimplifyDemandedVectorElts support for simplifying shuffle masks
Based off the DemandedElts mask the and UNDEF elements returned from the SimplifyDemandedVectorElts calls to the shuffle operands, we can attempt to simplify the shuffle mask.
I had to be very conservative here as accepting post-legalized shuffle masks could cause problems for targets that legalize UNDEF mask elements back to inrange values (PowerPC), similarly combining to identity shuffle masks could cause too much UNDEF information to disappear for later combines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325354
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Sanjay Patel [Fri, 16 Feb 2018 16:13:20 +0000 (16:13 +0000)]
[InstCombine] reduce code duplication; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325353
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Simon Pilgrim [Fri, 16 Feb 2018 14:57:25 +0000 (14:57 +0000)]
[X86][SSE] Allow float domain crossing if we are merging 2 or more shuffles and the root started as a float domain shuffle
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325349
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Nemanja Ivanovic [Fri, 16 Feb 2018 14:49:01 +0000 (14:49 +0000)]
[PowerPC] Fix transform in table gen file causing UB
Running a bootstrap build with UBSan produces a number of instances where
we have signed integer overflow due to this transform. Change the type to
long to prevent this UB on 64-bit build machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325347
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Simon Dardis [Fri, 16 Feb 2018 13:34:23 +0000 (13:34 +0000)]
[mips] Remove codegen support from some 16 bit instructions
These instructions conflict with their full length variants
for the purposes of FastISel as they cannot be distingushed
based on the number and type of operands and predicates.
Reviewers: atanasyan
Differential Revision: https://reviews.llvm.org/D41285
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325341
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Simon Pilgrim [Fri, 16 Feb 2018 12:21:08 +0000 (12:21 +0000)]
[SelectionDAG] Add initial SimplifyDemandedVectorElts support for simplifying VSELECT operands
This just adds a basic pass through - we can add constant selection mask handling in a future patch to fully match InstCombine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325338
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Ivan A. Kosarev [Fri, 16 Feb 2018 10:10:29 +0000 (10:10 +0000)]
[Transforms] Propagate TBAA info in SROA
Now that we have the new TBAA metadata format that is capable of
representing accesses to aggregates, we can propagate TBAA access
tags from memory setting and transferring intrinsics to load and
store instructions and vice versa.
Since SROA produces lots of new loads and stores on optimized
builds, this change significantly decreases the share of
undecorated memory accesses on such builds.
Differential Revision: https://reviews.llvm.org/D41563
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325329
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Jonas Paulsson [Fri, 16 Feb 2018 09:51:01 +0000 (09:51 +0000)]
[ARM] Return true in enableMultipleCopyHints().
Enable multiple COPY hints to eliminate more COPYs during register allocation.
Note that this is something all targets should do, see
https://reviews.llvm.org/D38128.
Review: Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325327
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Mikhail Maltsev [Fri, 16 Feb 2018 09:35:16 +0000 (09:35 +0000)]
[LegalizeDAG] Fix legalization of SETCC
Summary:
Currently when expanding a SETCC node into a SELECT_CC, LLVM uses
an incorrect type for determining BooleanContent of the result. This
patch fixes the issue.
Fixes PR36079.
Reviewers: rogfer01, javed.absar, efriedma
Reviewed By: efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D43282
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325325
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Roger Ferrer Ibanez [Fri, 16 Feb 2018 09:23:59 +0000 (09:23 +0000)]
[ARM] Materialise some boolean values to avoid a branch
This patch combines some cases of ARMISD::CMOV for integers that arise in comparisons of the form
a != b ? x : 0
a == b ? 0 : x
and that currently (e.g. in Thumb1) are emitted as branches.
Differential Revision: https://reviews.llvm.org/D34515
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325323
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Eugene Leviant [Fri, 16 Feb 2018 08:11:04 +0000 (08:11 +0000)]
[ThinLTO] Import global variables
Differential revision: https://reviews.llvm.org/D43077
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325320
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Craig Topper [Fri, 16 Feb 2018 07:16:15 +0000 (07:16 +0000)]
[X86] Allow CMOVs of constants to be sign extended from i32.
Sign extending i32 constants only requires a REX prefix as does widening the CMOV. This is cheaper than the explicit sign extend op.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325318
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Craig Topper [Fri, 16 Feb 2018 06:52:43 +0000 (06:52 +0000)]
[X86] Don't zero_extend cmov up to i64, stop at i32.
Zero extend from i32 to i64 is free. So extend from i16 to i32, and then use a free zero extend to finish.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325317
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Tim Shen [Fri, 16 Feb 2018 01:44:36 +0000 (01:44 +0000)]
[APInt] Fix extractBits to correctly handle Result.isSingleWord() case.
Summary: extractBits assumes that `!this->isSingleWord() implies !Result.isSingleWord()`, which may not necessarily be true. Handle both cases.
Reviewers: RKSimon
Subscribers: sanjoy, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D43363
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325311
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Vedant Kumar [Fri, 16 Feb 2018 01:21:01 +0000 (01:21 +0000)]
Remove brittle check lines from a test, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325310
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Vedant Kumar [Fri, 16 Feb 2018 01:15:20 +0000 (01:15 +0000)]
[GVN] Partially revert debug info salvage change (r325063)
In r325063, we salvaged debug values from dying instructions in
GVN::processBlock() and GVN::performScalarPRE().
The change in performScalarPRE(), while correct, is unhelpful. It
introduced a call to salvageDebugInfo() which was immediately followed
by a RAUW, meaning it prevented the RAUW from efficiently updating
dbg.value intrinsics. This commit reverts the mistake and tightens up
the affected test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325308
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Craig Topper [Fri, 16 Feb 2018 00:39:05 +0000 (00:39 +0000)]
[X86] Add the test cases that were supposed to go with r325287.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325306
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Ekaterina Romanova [Thu, 15 Feb 2018 23:29:21 +0000 (23:29 +0000)]
Allow 0 to be a valid value pruning interval in C LTO API. Value 0 will cause garbage collector to run. This matches the behavior in C++ LTO API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325303
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Vedant Kumar [Thu, 15 Feb 2018 22:26:18 +0000 (22:26 +0000)]
[DCE] Salvage debug info from dead insts
This results in small increases in the size of the .debug_loc section
and the number of unique source variables in a stage2 build of opt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325301
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Stanislav Mekhanoshin [Thu, 15 Feb 2018 22:03:55 +0000 (22:03 +0000)]
[AMDGPU] Combine adjacent waitcounts in a single strongest wait
Differential Revision: https://reviews.llvm.org/D43350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325299
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Vedant Kumar [Thu, 15 Feb 2018 21:28:38 +0000 (21:28 +0000)]
[Debugify] Don't check functions which were skipped
If no debug info was applied to a function, its debug info shouldn't be
checked (it doesn't have any :).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325297
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Reid Kleckner [Thu, 15 Feb 2018 21:25:23 +0000 (21:25 +0000)]
Don't make PDBs by default in Release mode
Introduce the LLVM_ENABLE_PDB option so that users can request them
explicitly instead.
Add /OPT:REF and /OPT:ICF back, which /DEBUG disables by default.
Differential Revision: https://reviews.llvm.org/D43156
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325296
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Rafael Auler [Thu, 15 Feb 2018 21:20:31 +0000 (21:20 +0000)]
[X86][3DNOW] Teach decoder about AMD 3DNow! instrs
Summary:
This patch makes the decoder understand old AMD 3DNow!
instructions that have never been properly supported in the X86
disassembler, despite being supported in other subsystems. Hopefully
this should make the X86 decoder more complete with respect to binaries
containing legacy code.
Reviewers: craig.topper
Reviewed By: craig.topper
Subscribers: llvm-commits, maksfb, bruno
Differential Revision: https://reviews.llvm.org/D43311
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325295
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Vedant Kumar [Thu, 15 Feb 2018 21:14:36 +0000 (21:14 +0000)]
[opt] Port the debugify passes to the new pass manager
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325294
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Craig Topper [Thu, 15 Feb 2018 20:27:30 +0000 (20:27 +0000)]
[X86] Enable BT to be used in place of TEST for single bit checks under optsize
We already do this for 64-bit when it won't fit into a 64-bit AND/TEST's immediate field. This adds an additional qualifier to do it for any single bit constant larger than 8-bits under optsize
Differential Revision: https://reviews.llvm.org/D43346
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325290
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Craig Topper [Thu, 15 Feb 2018 20:20:32 +0000 (20:20 +0000)]
[DAGCombiner] Call ExtendUsesToFormExtLoad in (zext (and (load)))->(and (zextload)) even when the and does not have multiple uses
Same for the sign extend case.
Currently we check for multiple uses on the binop. Then we call ExtendUsesToFormExtLoad to capture SetCCs that use the load. So we only end up finding any setccs when the and has additional uses and the load is used by a setcc. I don't think the and having multiple uses is relevant here. I think we should only be checking for the load having multiple uses.
This changes an NVPTX test because we now find that the load has a second use by a truncate, but ExtendUsesToFormExtLoad only looks at setccs it can extend. All other operations just check isTruncateFree. Maybe we should allow widening of an existing truncate even if its not free?
Differential Revision: https://reviews.llvm.org/D43063
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325289
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Craig Topper [Thu, 15 Feb 2018 19:57:35 +0000 (19:57 +0000)]
[X86] Use btc/btr/bts to implement xor/and/or that affects a single bit in the upper 32-bits of a 64-bit operation.
We can't fold a large immediate into a 64-bit operation. But if we know we're only operating on a single bit we can use the bit instructions.
For now only do this for optsize.
Differential Revision: https://reviews.llvm.org/D37418
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325287
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Brian Gesiak [Thu, 15 Feb 2018 19:31:45 +0000 (19:31 +0000)]
[Coroutines] Don't move stores for allocator args
Summary:
The behavior described in Coroutines TS `[dcl.fct.def.coroutine]/7`
allows coroutine parameters to be passed into allocator functions.
The instructions to store values into the alloca'd parameters must not
be moved past the frame allocation, otherwise uninitialized values are
passed to the allocator.
Test Plan: `check-llvm`
Reviewers: rsmith, GorNishanov, eric_niebler
Reviewed By: GorNishanov
Subscribers: compnerd, EricWF, llvm-commits
Differential Revision: https://reviews.llvm.org/D43000
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325285
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Pablo Barrio [Thu, 15 Feb 2018 19:17:55 +0000 (19:17 +0000)]
[ARM] Fix redirect in inline assembly test
Summary: Fix silly mistake in a test
Reviewers: gkistanova, apilipenko
Subscribers: javed.absar, eraman, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D43342
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325283
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Vedant Kumar [Thu, 15 Feb 2018 19:13:04 +0000 (19:13 +0000)]
[SCCP] Test that constant propagation updates debug info, NFC
This extends an existing test to check that SCCP updates the operands of
relevant dbg.value instructions as it does its work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325281
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Vedant Kumar [Thu, 15 Feb 2018 19:13:03 +0000 (19:13 +0000)]
[Utils] salvageDI: Add a comment and move a call earlier, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325280
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Craig Topper [Thu, 15 Feb 2018 19:00:11 +0000 (19:00 +0000)]
[X86] Add test cases for opportunities for using BT instead of TEST under optsize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325277
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Zachary Turner [Thu, 15 Feb 2018 18:46:59 +0000 (18:46 +0000)]
Silence warning about unused private variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325275
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Zachary Turner [Thu, 15 Feb 2018 18:36:10 +0000 (18:36 +0000)]
Call FlushFileBuffers on output files.
There is a latent Windows kernel bug, the exact trigger
conditions are not well understood, which can cause a file
to be correctly written, but unable to be correctly read.
The workaround appears to be simply calling FlushFileBuffers.
Differential Revision: https://reviews.llvm.org/D42925
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325274
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Dan Gohman [Thu, 15 Feb 2018 18:05:16 +0000 (18:05 +0000)]
[WebAssembly] Restore "*-wasm" tests.
Even though "...-wasm" is now the default for wasm, it's still
desirable to test this form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325273
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Simon Pilgrim [Thu, 15 Feb 2018 17:48:34 +0000 (17:48 +0000)]
[X86][SSE] Add saturated truncation tests for storing illegal v8i8 types
Tests showing missing opportunities to use PACK instructions in cases where we need to truncate to illegal types for stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325270
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Krzysztof Parzyszek [Thu, 15 Feb 2018 17:20:07 +0000 (17:20 +0000)]
Recommit [Hexagon] Make the vararg handling a bit more robust
Use the FunctionType of the callee when it's available. It may not be
available for synthetic calls to functions specified by external symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325269
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Alexey Bataev [Thu, 15 Feb 2018 17:11:50 +0000 (17:11 +0000)]
[SLP] Fix the test for the reversed stores, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325268
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Yonghong Song [Thu, 15 Feb 2018 17:06:45 +0000 (17:06 +0000)]
bpf: fix a bug in dag2dag optimization for loads from readonly section
The reference '&' is missing in the function parameter. If there are
back-to-back optimizations in terms of dag node list like below:
t29: i64,ch = load<LD4[bitcast (%struct.test_t* @test.t to i8*)+12](dereferenceable), zext from i32> t3, t43, undef:i64
t34: i64,ch = load<LD4[bitcast (%struct.test_t* @test.t to i8*)](dereferenceable), zext from i32> t3, t41, undef:i64
The bug will trigger a segfault for the added test case remove_truncate_5.ll:
LLVMSymbolizer: error reading file: No such file or directory
#0 0x000000000241c4d9 (llc+0x241c4d9)
#1 0x000000000241c56a (llc+0x241c56a)
#2 0x000000000241aa50 (llc+0x241aa50)
...
#22 0x0000000000fd5edf (llc+0xfd5edf)
#23 0x00007f0fe03bec05 __libc_start_main (/lib64/libc.so.6+0x21c05)
#24 0x0000000000fd3e69 (llc+0xfd3e69)
...
Segmentation fault
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325267
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Krzysztof Parzyszek [Thu, 15 Feb 2018 16:57:44 +0000 (16:57 +0000)]
Revert "[Hexagon] Make the vararg handling a bit more robust"
This is breaking lit tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325266
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Alexey Bataev [Thu, 15 Feb 2018 16:56:49 +0000 (16:56 +0000)]
[SLP] Added test for reversed stores, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325265
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Sanjay Patel [Thu, 15 Feb 2018 16:30:10 +0000 (16:30 +0000)]
[InstCombine] use m_OneUse to reduce code; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325263
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Sanjay Patel [Thu, 15 Feb 2018 16:28:15 +0000 (16:28 +0000)]
[InstCombine] test fdiv folds better; NFC
We had redundant tests, but no tests for extra uses or vectors.
'fast' is an overly conservative requirement for these folds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325262
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Krzysztof Parzyszek [Thu, 15 Feb 2018 16:24:30 +0000 (16:24 +0000)]
[Hexagon] Make the vararg handling a bit more robust
The FunctionType of the callee is always available, even if the Function
of the callee is not. Use that to get the number of fixed parameters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325259
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Francis Visoiu Mistrih [Thu, 15 Feb 2018 16:23:59 +0000 (16:23 +0000)]
[CodeGen] Separate MBB metadata from instructions in -debug printing
Add an empty line after 'liveins:', 'successors:', or '; predecessors:',
the one that ends up to be the last one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325258
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Krzysztof Parzyszek [Thu, 15 Feb 2018 15:47:53 +0000 (15:47 +0000)]
[Hexagon] Fix lowering of formal arguments after r324737
Lowering of formal arguments needs to be aware of vararg functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325255
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Simon Pilgrim [Thu, 15 Feb 2018 15:31:00 +0000 (15:31 +0000)]
[SelectionDAG] Pull out repeated Op.getOpcode(). NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325253
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Francis Visoiu Mistrih [Thu, 15 Feb 2018 15:27:34 +0000 (15:27 +0000)]
[CodeGen] Print irreducible loop header weight as a MIR comment
Prefix it with '; ' to make it more MIR-compatible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325251
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Sanjay Patel [Thu, 15 Feb 2018 15:07:12 +0000 (15:07 +0000)]
[InstCombine] allow sin/cos transforms with 'reassoc'
The variable name 'AllowReassociate' is a lie at this point because
it's set to 'isFast()' which is more than the 'reassoc' FMF after
rL317488.
In D41286, we showed that this transform may be valid even with strict
math by brute force checking every 32-bit float result.
There's a potential problem here because we're replacing with a tan()
libcall rather than a hypothetical LLVM tan intrinsic. So we might
set errno when we should be guaranteed not to do that. But that's
independent of this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325247
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Pablo Barrio [Thu, 15 Feb 2018 14:44:22 +0000 (14:44 +0000)]
[ARM] Allow 64- and 128-bit types with 't' inline asm constraint
Summary:
In LLVM, 't' selects a floating-point/SIMD register and only supports
32-bit values. This is appropriately documented in the LLVM Language
Reference Manual. However, this behaviour diverges from that of GCC, where
't' selects the s0-s31 registers and its qX and dX variants depending on
additional operand modifiers (q/P).
For example, the following C code:
#include <arm_neon.h>
float32x4_t a, b, x;
asm("vadd.f32 %0, %1, %2" : "=t" (x) : "t" (a), "t" (b))
results in the following assembly if compiled with GCC:
vadd.f32 s0, s0, s1
whereas LLVM will show "error: couldn't allocate output register for
constraint 't'", since a, b, x are 128-bit variables, not 32-bit.
This patch extends the use of 't' to mean that of GCC, thus allowing
selection of the lower Q vector regs and their D/S variants. For example,
the earlier code will now compile as:
vadd.f32 q0, q0, q1
This behaviour still differs from that of GCC but I think it is actually
more correct, since LLVM picks up the right register type based on the
datatype of x, while GCC would need an extra operand modifier to achieve
the same result, as follows:
asm("vadd.f32 %q0, %q1, %q2" : "=t" (x) : "t" (a), "t" (b))
Since this is only an extension of functionality, existing code should not
be affected by this change. Note that operand modifiers q/P are already
supported by LLVM, so this patch should suffice to support inline
assembly with constraint 't' originally built for GCC.
Reviewers: grosbach, rengolin
Reviewed By: rengolin
Subscribers: rogfer01, efriedma, olista01, aemerson, javed.absar, eraman, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D42962
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325244
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Simon Pilgrim [Thu, 15 Feb 2018 14:37:59 +0000 (14:37 +0000)]
[X86][SSE] combineTruncateWithSat - use truncateVectorWithPACK to chain PACKUS vXi32-vXi8 saturated truncation
We can use PACKSS/PACKUS to saturate each stage of the chain: PACKSSDW down to [-32768,32767] and then PACKUSWB to [0,255].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325243
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Sanjay Patel [Thu, 15 Feb 2018 13:55:52 +0000 (13:55 +0000)]
[InstCombine] allow X / C -> X * (1.0/C) for vector splat FP constants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325237
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Simon Pilgrim [Thu, 15 Feb 2018 13:33:15 +0000 (13:33 +0000)]
[X86][SSE] combineTruncateWithSat - use truncateVectorWithPACK to chain PACKSS vXi32-vXi8 saturated truncation
We can use PACKSS to saturate each stage of the chain: PACKSSDW down to [-32768,32767] and then PACKSSWB to [-128,127].
PACKUS is a little trickier and will be handled in a separate patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325235
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Momchil Velikov [Thu, 15 Feb 2018 13:29:33 +0000 (13:29 +0000)]
[DebugInfo] Accept enumeration types without underlying integer type present in
debug info metadata
... when generating DWARF.
Differential Revision: https://reviews.llvm.org/D43304
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325234
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Simon Pilgrim [Thu, 15 Feb 2018 12:14:15 +0000 (12:14 +0000)]
[SelectionDAG] Add initial implementation of TargetLowering::SimplifyDemandedVectorElts
This is mainly a move of simplifyShuffleOperands from DAGCombiner::visitVECTOR_SHUFFLE to create a more general purpose TargetLowering::SimplifyDemandedVectorElts implementation.
Further features can be moved/added in future patches.
Differential Revision: https://reviews.llvm.org/D42896
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325232
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Sjoerd Meijer [Thu, 15 Feb 2018 10:33:07 +0000 (10:33 +0000)]
[ARM] f16 vcmp fixes
This adds f16 VCMP match rules and fixes the test cases.
Differential Revision: https://reviews.llvm.org/D43291
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325228
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Serge Pavlov [Thu, 15 Feb 2018 09:45:59 +0000 (09:45 +0000)]
Revert r325224 "Report fatal error in the case of out of memory"
It caused fails on some buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325227
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Serge Pavlov [Thu, 15 Feb 2018 09:35:36 +0000 (09:35 +0000)]
Specify namespace for realloc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325226
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Serge Pavlov [Thu, 15 Feb 2018 09:20:26 +0000 (09:20 +0000)]
Report fatal error in the case of out of memory
Analysis of fails in the case of out of memory errors can be tricky on
Windows. Such error emerges at the point where memory allocation function
fails, but manifests itself when null pointer is used. These two points
may be distant from each other. Besides, next runs may not exhibit
allocation error.
Usual programming practice does not require checking result of 'operator
new' because it throws 'std::bad_alloc' in the case of allocation error.
However, LLVM is usually built with exceptions turned off, so 'new' can
return null pointer. This change installs custom new handler, which causes
fatal error in the case of out of memory. The handler is installed
automatically prior to call to 'main' during construction of a static
object defined in 'lib/Support/ErrorHandling.cpp'. If the application does
not use this file, the handler may be installed manually by a call to
'llvm::install_out_of_memory_new_handler', declared in
'include/llvm/Support/ErrorHandling.h".
There are calls to C allocation functions, malloc, calloc and realloc.
They are used for interoperability with C code, when allocated object has
variable size and when it is necessary to avoid call of constructors. In
many calls the result is not checked against null pointer. To simplify
checks, new functions are defined in the namespace 'llvm' with the
same names as these C function. These functions produce fatal error if
allocation fails. User should use 'llvm::malloc' instead of 'std::malloc'
in order to use the safe variant. This change replaces 'std::malloc'
in the cases when the result of allocation function is not checked against
null pointer.
Finally, there are plain C code, that uses malloc and similar functions. If
the result is not checked, assert statements are added.
Differential Revision: https://reviews.llvm.org/D43010
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325224
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Andrew V. Tischenko [Thu, 15 Feb 2018 07:55:02 +0000 (07:55 +0000)]
(NFC)[MachineCombiner] Improve debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325217
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Max Kazantsev [Thu, 15 Feb 2018 07:47:17 +0000 (07:47 +0000)]
[NFC] Rename isKnownViaSimpleReasoning to isKnownViaNonRecursiveReasoning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325216
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Max Kazantsev [Thu, 15 Feb 2018 07:13:18 +0000 (07:13 +0000)]
[NFC] Fix metadata placement in test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325215
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Max Kazantsev [Thu, 15 Feb 2018 07:09:00 +0000 (07:09 +0000)]
[SCEV] Favor isKnownViaSimpleReasoning over constant ranges check
There is a more powerful but still simple function `isKnownViaSimpleReasoning ` that
does constant range check and few more additional checks. We use it some places (e.g.
when proving implications) and in some other places we only check constant ranges.
Currently, indvar simplifier fails to remove the check in following loop:
int inc = ...;
for (int i = inc, j = inc - 1; i < 200; ++i, ++j)
if (i > j) { ... }
This patch replaces all usages of `isKnownPredicateViaConstantRanges` with
`isKnownViaSimpleReasoning` to have smarter proofs. In particular, it fixes the
case above.
Reviewed-By: sanjoy
Differential Revision: https://reviews.llvm.org/D43175
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325214
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Craig Topper [Thu, 15 Feb 2018 02:14:20 +0000 (02:14 +0000)]
[X86] Regnerate test to show scheduling comments. NFC
These must have not been printing the last time the test was re-generated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325198
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Craig Topper [Thu, 15 Feb 2018 01:21:53 +0000 (01:21 +0000)]
[X86] Change 32 and 64 bit versions of LSL instruction have a 16-bit memory operand.
This matches the Intel and AMD documentation and is consistent with the LAR instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325197
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Craig Topper [Wed, 14 Feb 2018 23:53:26 +0000 (23:53 +0000)]
[X86] Dont' allow 'outs' and 'ins' in at&t syntax without suffixes.
The match would be ambiguous, but at&t asm parsing doesn't support ambiguous matches and will just return the first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325192
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Craig Topper [Wed, 14 Feb 2018 23:53:24 +0000 (23:53 +0000)]
[X86] Don't use 64 bit hex constants in a 32 bit assembler test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325191
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Craig Topper [Wed, 14 Feb 2018 23:53:21 +0000 (23:53 +0000)]
[X86] Reverse the operand order of invlpga in at&t syntax to match gas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325190
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Jake Ehrlich [Wed, 14 Feb 2018 23:31:33 +0000 (23:31 +0000)]
[llvm-objcopy] Fix handling of zero-size segments in llvm-objcopy
Some ELF files produced by lld may have zero-size segment placeholders as shown
below. Since GNU_STACK Offset is 0, the current code makes it the lowest used
offset, and relocates all the segments over the ELF header. The resulting
binary is total garbage.
This change fixes how llvm-objcopy handles PT_PHDR properlly by treating ELF
headers and the program header table as segments to allow the layout algorithm
decide where those should go.
Author: vit9696
Differential Revision: https://reviews.llvm.org/D42872
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325189
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Sanjay Patel [Wed, 14 Feb 2018 23:04:17 +0000 (23:04 +0000)]
[InstCombine] clean up fold for X / C -> X * (1.0/C); NFCI
This should work with vector constants too, but it's currently limited to scalar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325187
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Vitaly Buka [Wed, 14 Feb 2018 22:41:15 +0000 (22:41 +0000)]
[ThinLTO/CFI] Include TYPE_ID summaries into GLOBALVAL_SUMMARY_BLOCK
Summary:
TypeID summaries are used by CFI and need to be serialized by ThinLTO
indexing for later use by LTO Backend.
Reviewers: tejohnson, pcc
Subscribers: mehdi_amini, inglorion, eraman, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D42611
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325182
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Lang Hames [Wed, 14 Feb 2018 22:13:02 +0000 (22:13 +0000)]
[ORC] Consolidate RTDyldObjectLinkingLayer GetMemMgr and GetResolver into a
unified GetResources callback.
Having a single 'GetResources' callback will simplify adding new resources in
the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325180
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Lang Hames [Wed, 14 Feb 2018 22:12:56 +0000 (22:12 +0000)]
[ORC] Switch to shared_ptr ownership for AsynchronousSymbolQueries.
Queries need to stay alive until each owner has set the values they are
responsible for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325179
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Craig Topper [Wed, 14 Feb 2018 21:54:58 +0000 (21:54 +0000)]
[X86] Don't swap argument on BOUND instruction in at&t syntax.
The bound instruction does not have reversed operands in gas.
Fixes PR27653.
Patch by Maya Madhavan.
Differential Revision: https://reviews.llvm.org/D43243
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325178
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Rafael Espindola [Wed, 14 Feb 2018 21:44:34 +0000 (21:44 +0000)]
Change the BugDriver to store the current module with std::unique_ptr.
While there, change a bunch of helper functions to take references to
avoid adding calls to get().
This should conclude the bugpoint yak shaving.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325177
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Rafael Espindola [Wed, 14 Feb 2018 21:25:07 +0000 (21:25 +0000)]
Use std::uniue_ptr. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325176
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Rafael Espindola [Wed, 14 Feb 2018 21:17:36 +0000 (21:17 +0000)]
Use std::unique_ptr. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325174
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Rafael Espindola [Wed, 14 Feb 2018 21:10:29 +0000 (21:10 +0000)]
Use std::unique_ptr. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325173
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Rafael Espindola [Wed, 14 Feb 2018 20:59:39 +0000 (20:59 +0000)]
Use std::unique_ptr. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325172
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Rafael Espindola [Wed, 14 Feb 2018 20:53:38 +0000 (20:53 +0000)]
Use std::unique_ptr. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325170
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Krzysztof Parzyszek [Wed, 14 Feb 2018 20:46:06 +0000 (20:46 +0000)]
[Hexagon] Split HVX vector pair loads/stores, expand unaligned loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325169
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Simon Pilgrim [Wed, 14 Feb 2018 20:43:47 +0000 (20:43 +0000)]
Removed superfluous semicolon to fix -Wpedantic gcc warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325168
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Rafael Espindola [Wed, 14 Feb 2018 20:25:18 +0000 (20:25 +0000)]
Use std::unique_ptr. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325167
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Francis Visoiu Mistrih [Wed, 14 Feb 2018 20:23:05 +0000 (20:23 +0000)]
[CodeGen] Print predecessors, successors, then liveins in -debug printing
Reorder them to match MIR.
Predecessors are only comments, and they're not usually printed in MIR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325166
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