OSDN Git Service
Tim Northover [Tue, 21 Jan 2014 10:41:16 +0000 (10:41 +0000)]
MIPS: mark intrinsics IntrNoMem so all patterns using them are consistent.
This is apparently a bit of a white lie (they can affect DSPControl for
overflow etc) but similar to how we currently handle floating-point operations.
When it becomes relevant the whole lot can be reviewed properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199718
91177308-0d34-0410-b5e6-
96231b3b80d8
Renato Golin [Tue, 21 Jan 2014 10:24:35 +0000 (10:24 +0000)]
Checked return warning from coverity
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199716
91177308-0d34-0410-b5e6-
96231b3b80d8
Evgeniy Stepanov [Tue, 21 Jan 2014 09:00:30 +0000 (09:00 +0000)]
Fix libstdc++4.7 test on Android.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199714
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 21 Jan 2014 07:20:05 +0000 (07:20 +0000)]
Use ArrayRef to simplify some code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199712
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Tue, 21 Jan 2014 04:31:29 +0000 (04:31 +0000)]
tools: use 64-bit print specifier
Try to repair the ARM Cortex-A15 buildbot by using a more appropriate conversion
specifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199711
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Tue, 21 Jan 2014 02:33:15 +0000 (02:33 +0000)]
tools: support decoding ARM EHABI opcodes in readobj
Add support to llvm-readobj to decode the actual opcodes. The ARM EHABI opcodes
are a variable length instruction set that describe the operations required for
properly unwinding stack frames.
The primary motivation for this change is to ease the creation of tests for the
ARM EHABI object emission as well as the unwinding directive handling in the ARM
IAS.
Thanks to Logan Chien for an extra test case!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199708
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Tue, 21 Jan 2014 02:33:10 +0000 (02:33 +0000)]
ARM IAS: add support for .unwind_raw directive
This implements the unwind_raw directive for the ARM IAS. The unwind_raw
directive takes the form of a stack offset value followed by one or more bytes
representing the opcodes to be emitted. The opcode emitted will interpreted as
if it were assembled by the opcode assembler via the standard unwinding
directives.
Thanks to Logan Chien for an extra test!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199707
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Tue, 21 Jan 2014 02:33:02 +0000 (02:33 +0000)]
ARM IAS: support .personalityindex
The .personalityindex directive is equivalent to the .personality directive with
the ARM EABI personality with the specific index (0, 1, 2). Both of these
directives indicate personality routines, so enhance the personality directive
handling to take into account personalityindex.
Bonus fix: flush the UnwindContext at the beginning of a new function.
Thanks to Logan Chien for additional tests!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199706
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Qin [Tue, 21 Jan 2014 01:48:52 +0000 (01:48 +0000)]
[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.
It was commited as r199628 but reverted in r199628 as causing
regression test failed. It's because of old vervsion of patch
I used to commit. Sorry for mistake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199704
91177308-0d34-0410-b5e6-
96231b3b80d8
Nick Lewycky [Tue, 21 Jan 2014 01:29:37 +0000 (01:29 +0000)]
Add operator!= for FoldingSetNodeID and FoldingSetNodeIDRef. Implementation in
the header forwards to operator== which is not in the header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199702
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Tue, 21 Jan 2014 00:23:17 +0000 (00:23 +0000)]
Tweak the MCExternalSymbolizer to not use the SymbolLookUp() call back
to not guess at a symbol name in some cases.
The problem is that in object files assembled starting at address 0, when
trying to symbolicate something that starts like this:
% cat x.s
_t1:
vpshufd $0x0, %xmm1, %xmm0
the symbolic disassembly can end up like this:
% otool -tV x.o
x.o:
(__TEXT,__text) section
_t1:
0000000000000000 vpshufd $_t1, %xmm1, %xmm0
Which is in this case produced incorrect symbolication.
But it is useful in some cases to use the SymbolLookUp() call back
to guess at some immediate values. For example one like this
that does not have an external relocation entry:
% cat y.s
_t1:
movl $_d1, %eax
.data
_d1: .long 0
% clang -c -arch i386 y.s
% otool -tV y.o
y.o:
(__TEXT,__text) section
_t1:
0000000000000000 movl $_d1, %eax
% otool -rv y.o
y.o:
Relocation information (__TEXT,__text) 1 entries
address pcrel length extern type scattered symbolnum/value
00000001 False long False VANILLA False 2 (__DATA,__data)
So the change is based on it is not likely that an immediate Value
coming from an instruction field of a width of 1 byte, other than branches
and items with relocation, are not likely symbol addresses.
With the change the first case above simply becomes:
% otool -tV x.o
x.o:
(__TEXT,__text) section
_t1:
0000000000000000 vpshufd $0x0, %xmm1, %xmm0
and the second case continues to work as expected.
rdar://
14863405
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199698
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Tue, 21 Jan 2014 00:18:51 +0000 (00:18 +0000)]
To allow the X86 verbose assembly to print its informative comments
when used with symbolic disassembly, add a check that the operand
is an immediate and has not been symbolicated to MCExpr operand.
I’m trying to enable the ‘C’ disassembly API option
LLVMDisassembler_Option_SetInstrComments for darwin’s
otool(1) that uses the llvm disassembler API. The problem is
that the disassembler API can change an immediate operand to
an MCExpr operand if it symbolicates it with the call backs.
And if it does the code in llvm::EmitAnyX86InstComments()
will crash when it assumes these operands are immediates.
The fix for this is very straight forward to just protect the call
to getImm() with a check of isImm(). So if the immediate for
an instruction is symbolicated it simply doesn’t get the X86
verbose assembly comments:
% otool -tV test_asm.o
test_asm.o:
(__TEXT,__text) section
_t1:
0000000000000000 vpshufd $_t1, %xmm1, %xmm0
0000000000000005 retq
0000000000000006 nopw %cs:_t1(%rax,%rax)
_t2:
0000000000000010 vpshufd $-0x1, %xmm0, %xmm0 ## xmm0 = xmm0[3,3,3,3]
0000000000000015 retq
0000000000000016 nopw %cs:_t1(%rax,%rax)
_t3:
0000000000000020 vpshufd $_t1, %xmm1, %xmm0
0000000000000025 retq
0000000000000026 nopw %cs:_t1(%rax,%rax)
_t4:
0000000000000030 vpshufd $0x2d, %xmm0, %xmm0 ## xmm0 = xmm0[1,3,2,0]
0000000000000035 retq
The fact that the immediate $0x0 is being symbolicated at
all in this case is a different problem which my next patch
will address.
rdar://
10989286
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199697
91177308-0d34-0410-b5e6-
96231b3b80d8
Hal Finkel [Mon, 20 Jan 2014 19:49:14 +0000 (19:49 +0000)]
Update StackProtector when coloring merges stack slots
StackProtector keeps a ValueMap of alloca instructions to layout kind tags for
use by PEI and other later passes. When stack coloring replaces one alloca with
a bitcast to another one, the key replacement in this map does not work.
Instead, provide an interface to manage this updating directly. This seems like
an improvement over the old behavior, where the layout map would not get
updated at all when the stack slots were merged. In practice, however, there is
likely no observable difference because PEI only did anything special with
'large array' kinds, and if one large array is merged with another, than the
replacement should already have been a large array.
This is an attempt to unbreak the clang-x86_64-darwin11-RA builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199684
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrea Di Biagio [Mon, 20 Jan 2014 19:35:22 +0000 (19:35 +0000)]
[X86] Teach how to combine a vselect into a movss/movsd
Add target specific rules for combining vselect dag nodes into movss/movsd
when possible.
If the vector type of the vselect dag node in input is either MVT::v4i13 or
MVT::v4f32, then try to fold according to rules:
1) fold (vselect (build_vector (0, -1, -1, -1)), A, B) -> (movss A, B)
2) fold (vselect (build_vector (-1, 0, 0, 0)), A, B) -> (movss B, A)
If the vector type of the vselect dag node in input is either MVT::v2i64 or
MVT::v2f64 (and we have SSE2), then try to fold according to rules:
3) fold (vselect (build_vector (0, -1)), A, B) -> (movsd A, B)
4) fold (vselect (build_vector (-1, 0)), A, B) -> (movsd B, A)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199683
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Mon, 20 Jan 2014 19:15:59 +0000 (19:15 +0000)]
Debug info: On ARM ensure that all __TEXT sections come before the
optional DWARF sections, so compiling with -g does not result in
different code being generated for PC-relative loads.
This is reapplying a diet r197922 (__TEXT-only).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199681
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Mon, 20 Jan 2014 19:15:55 +0000 (19:15 +0000)]
Revert "Debug info: On ARM ensure that the data sections come before the"
Cut back on the cargo cult. The order of __DATA sections doesn't affect
generated code.
This reverts commit r197922.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199680
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Mon, 20 Jan 2014 18:41:34 +0000 (18:41 +0000)]
Allow SMUL_LOHI and UMUL_LOHI to be narrow to MUL on targets where MUL is Custom rather than Legal. Even if the target is doing some kind of expansion for MUL, it's pretty much guaranteed to be more efficent than whatever it does for SMUL_LOHI or UMUL_LOHI!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199678
91177308-0d34-0410-b5e6-
96231b3b80d8
James Molloy [Mon, 20 Jan 2014 17:14:48 +0000 (17:14 +0000)]
Remove the useless pseudo instructions VDUPfdf and VDUPfqf, replacing them with patterns to match VDUPLN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199675
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Mon, 20 Jan 2014 17:05:49 +0000 (17:05 +0000)]
[CMake] LLVMProcessSources.cmake: Add include(CMakeParseArguments).
I didn't realize that cmake_parse_arguments() would require explicit inclusion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199674
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Mon, 20 Jan 2014 15:47:15 +0000 (15:47 +0000)]
Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199667
91177308-0d34-0410-b5e6-
96231b3b80d8
Hal Finkel [Mon, 20 Jan 2014 14:15:28 +0000 (14:15 +0000)]
Fix misched-aa-colored.ll to require asserts (trying again)
Perhaps it needs to be in caps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199661
91177308-0d34-0410-b5e6-
96231b3b80d8
Hal Finkel [Mon, 20 Jan 2014 14:09:34 +0000 (14:09 +0000)]
Fix misched-aa-colored.ll to require asserts.
-misched=shuffle is NDEBUG only. Maybe we should change that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199659
91177308-0d34-0410-b5e6-
96231b3b80d8
Hal Finkel [Mon, 20 Jan 2014 14:03:16 +0000 (14:03 +0000)]
Update IR when merging slots in stack coloring
The way that stack coloring updated MMOs when merging stack slots, while
correct, is suboptimal, and is incompatible with the use of AA during
instruction scheduling. The solution, which involves the use of const_cast (and
more importantly, updating the IR from within an MI-level pass), obviously
requires some explanation:
When the stack coloring pass was originally committed, the code in
ScheduleDAGInstrs::buildSchedGraph tracked possible alias sets by using
GetUnderlyingObject, and all load/store and store/store memory control
dependencies where added between SUs at the object level (where only one
object, that returned by GetUnderlyingObject, was used to identify the object
associated with each MMO). When stack coloring merged stack slots, it would
replace MMOs derived from the remapped alloca with the alloca with which the
remapped alloca was being replaced. Because ScheduleDAGInstrs only used single
objects, and tracked alias sets at the object level, this was a fine solution.
In r169744, (Andy and) I updated the code in ScheduleDAGInstrs to use
GetUnderlyingObjects, and track alias sets using, potentially, multiple
underlying objects for each MMO. This was done, primarily, to provide the
ability to look through PHIs, and provide better scheduling for
induction-variable-dependent loads and stores inside loops. At this point, the
MMO-updating code in stack coloring became suboptimal, because it would clear
the MMOs for (i.e. completely pessimize) all instructions for which r169744
might help in scheduling. Updating the IR directly is the simplest fix for this
(and the one with, by far, the least compile-time impact), but others are
possible (we could give each MMO a small vector of potential values, or make
use of a remapping table, constructed from MFI, inside ScheduleDAGInstrs).
Unfortunately, replacing all MMO values derived from the remapped alloca with
the base replacement alloca fundamentally breaks our ability to use AA during
instruction scheduling (which is critical to performance on some targets). The
reason is that the original MMO might have had an offset (either constant or
dynamic) from the base remapped alloca, and that offset is not present in the
updated MMO. One possible way around this would be to use
GetPointerBaseWithConstantOffset, and update not only the MMO's value, but also
its offset based on the original offset. Unfortunately, this solution would
only handle constant offsets, and for safety (because AA is not completely
restricted to deducing relationships with constant offsets), we would need to
clear all MMOs without constant offsets over the entire function. This would be
an even worse pessimization than the current single-object restriction. Any
other solution would involve passing around a vector of remapped allocas, and
teaching AA to use it, introducing additional complexity and overhead into AA.
Instead, when remapping an alloca, we replace all IR uses of that alloca as
well (optionally inserting a bitcast as necessary). This is even more efficient
that the old MMO-updating code in the stack coloring pass (because it removes
the need to call GetUnderlyingObject on all MMO values), removes the
single-object pessimization in the default configuration, and enables the
correct use of AA during instruction scheduling (all without any additional
overhead).
LLVM now no longer miscompiles itself on x86_64 when using -enable-misched
-enable-aa-sched-mi -misched-bottomup=0 -misched-topdown=0 -misched=shuffle!
Fixed PR18497.
Because the alloca replacement is now done at the IR level, unless the MMO
directly refers to the remapped alloca, the change cannot be seen at the MI
level. As a result, there is no good way to fix test/CodeGen/X86/pr14090.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199658
91177308-0d34-0410-b5e6-
96231b3b80d8
Hal Finkel [Mon, 20 Jan 2014 14:03:02 +0000 (14:03 +0000)]
Track multiple stores per object when using AA in ScheduleDAGInstrs
When using AA to break false chain dependencies, we need to track multiple
stores per object in ScheduleDAGInstrs. Historically, we tracked potential alias
chains at the object level, and so all loads of an object would retain
dependencies on any store to that object. With AA, however, this is not
sufficient: non-overlapping stores and loads to the same object all need to be
tested for dependencies separately, we cannot only test all loads to an object
against only the last store (see PR18497 for an explicit example).
To mitigate any unwelcome compile-time impact when not using AA, only one store
is kept in the list per object when not using AA.
This, along with a stack coloring change to come shortly, will provide a test
case, fix PR18497 (and allow LLVM to compile itself using -enable-aa-sched-mi
on x86-64).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199657
91177308-0d34-0410-b5e6-
96231b3b80d8
David Woodhouse [Mon, 20 Jan 2014 12:02:53 +0000 (12:02 +0000)]
[x86] Fix disassembly of MOV16ao16 et al.
The addition of IC_OPSIZE_ADSIZE in r198759 wasn't quite complete. It
also turns out to have been unnecessary. The disassembler handles the
AdSize prefix for itself, and doesn't care about the difference between
(e.g.) MOV8ao8 and MOB8ao8_16 definitions. So just let them coexist and
don't worry about it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199654
91177308-0d34-0410-b5e6-
96231b3b80d8
David Woodhouse [Mon, 20 Jan 2014 12:02:48 +0000 (12:02 +0000)]
[x86] Fix 16-bit disassembly of JCXZ/JECXZ
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199653
91177308-0d34-0410-b5e6-
96231b3b80d8
David Woodhouse [Mon, 20 Jan 2014 12:02:44 +0000 (12:02 +0000)]
[x86] Rename MOVSD/STOSD/LODSD/OUTSD to MOVSL/STOSL/LODSL/OUTSL
The disassembler has a special case for 'L' vs. 'W' in its heuristic for
checking for 32-bit and 16-bit equivalents. We could expand the heuristic,
but better just to be consistent in using the 'L' suffix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199652
91177308-0d34-0410-b5e6-
96231b3b80d8
David Woodhouse [Mon, 20 Jan 2014 12:02:40 +0000 (12:02 +0000)]
[x86] Fix disassembly of callw instruction
Not quite sure why this was marked isAsmParserOnly, but it means that the
disassembler can't see it either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199651
91177308-0d34-0410-b5e6-
96231b3b80d8
David Woodhouse [Mon, 20 Jan 2014 12:02:35 +0000 (12:02 +0000)]
[x86] Fix 16-bit handling of OpSize bit
When disassembling in 16-bit mode the meaning of the OpSize bit is
inverted. Instructions found in the IC_OPSIZE context will actually
*not* have the 0x66 prefix, and instructions in the IC context will
have the 0x66 prefix. Make use of the existing special-case handling
for the 0x66 prefix being in the wrong place, to cope with this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199650
91177308-0d34-0410-b5e6-
96231b3b80d8
David Woodhouse [Mon, 20 Jan 2014 12:02:31 +0000 (12:02 +0000)]
[x86] Infer disassembler mode from SubtargetInfo feature bits
Aside from cleaning up the code, this also adds support for the -code16
environment and actually enables the MODE_16BIT mode that was previously
not accessible.
There is no point adding any testing for 16-bit yet though; basically
nothing will work because we aren't handling the OpSize prefix correctly
for 16-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199649
91177308-0d34-0410-b5e6-
96231b3b80d8
David Woodhouse [Mon, 20 Jan 2014 12:02:25 +0000 (12:02 +0000)]
[x86] Support i386-*-*-code16 triple for emitting 16-bit code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199648
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Mon, 20 Jan 2014 11:34:08 +0000 (11:34 +0000)]
[PM] Wire up the Verifier for the new pass manager and connect it to the
various opt verifier commandline options.
Mostly mechanical wiring of the verifier to the new pass manager.
Exercises one of the more unusual aspects of it -- a pass can be either
a module or function pass interchangably. If this is ever problematic,
we can make things more constrained, but for things like the verifier
where there is an "obvious" applicability at both levels, it seems
convenient.
This is the next-to-last piece of basic functionality left to make the
opt commandline driving of the new pass manager minimally functional for
testing and further development. There is still a lot to be done there
(notably the factoring into .def files to kill the current boilerplate
code) but it is relatively uninteresting. The only interesting bit left
for minimal functionality is supporting the registration of analyses.
I'm planning on doing that on top of the .def file switch mostly because
the boilerplate for the analyses would be significantly worse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199646
91177308-0d34-0410-b5e6-
96231b3b80d8
Kai Nacke [Mon, 20 Jan 2014 11:00:40 +0000 (11:00 +0000)]
ARM: add tlsldo relocation
Add support for the symbol(tlsldo) relocation. This is required in order to
solve PR18554.
Reviewed by R. Golin, A. Korobeynikov.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199644
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Mon, 20 Jan 2014 10:20:23 +0000 (10:20 +0000)]
[CMake] llvm_process_sources: Introduce a parameter, ADDITIONAL_HEADERS.
ADDITIONAL_HEADERS is intended to add header files for IDEs as hint.
For example:
add_llvm_library(LLVMSupport
Host.cpp
ADDITIONAL_HEADERS
Unix/Host.inc
Windows/Host.inc
)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199639
91177308-0d34-0410-b5e6-
96231b3b80d8
Artyom Skrobov [Mon, 20 Jan 2014 10:18:42 +0000 (10:18 +0000)]
[ARM] Do not generate Tag_DIV_use=AllowDIVExt when hardware div is non-optional: it should have the default value of AllowDIVIfExists
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199638
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Mon, 20 Jan 2014 10:15:32 +0000 (10:15 +0000)]
Revert my commit in r199620 that added sections about namespaces to the
coding standards, and instead fix the existing section.
Thanks to Daniel Jasper for pointing out we already had a section
devoted to this topic. Instead of adding sections, just hack on this
section some. Also fix the example in the anonymous namespace section
below it to agree with the new advice.
As a re-cap, this switches the LLVM preferred style to never indent
namespaces. Having two approaches just led to endless (and utterly
pointless) debates about what was "small enough". This wasn't helping
anyone. The no-indent rule is easy to understand and doesn't really make
anything harder to read. Moreover, with tools like clang-format it is
considerably nicer to have simple consistent rules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199637
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Mon, 20 Jan 2014 08:18:01 +0000 (08:18 +0000)]
Revert r199628: "[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT."
This test fails the newly added regression tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199631
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Mon, 20 Jan 2014 08:07:07 +0000 (08:07 +0000)]
Fix a DenseMap iterator invalidation bug causing lots of crashes when
type units were enabled. The crux of the issue is that the
addDwarfTypeUnitType routine can end up being indirectly recursive. In
this case, the reference into the dense map (TU) became invalid by the
time we popped all the way back and used it to add the DIE type
signature.
Instead, use early return in the case where we can bypass the recursive
step and creating a type unit. Then use the pointer to the new type unit
to set up the DIE type signature in the case where we have to.
I tried really hard to reduce a testcase for this, but it's really
annoying. You have to get this to be mid-recursion when the densemap
grows. Even if we got a test case for this today, it'd be very unlikely
to continue exercising this pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199630
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Mon, 20 Jan 2014 07:44:53 +0000 (07:44 +0000)]
Fix all the remaining lost-fast-math-flags bugs I've been able to find. The most important of these are cases in the generic logic for combining BinaryOperators.
This logic hadn't been updated to handle FastMathFlags, and it took me a while to detect it because it doesn't show up in a simple search for CreateFAdd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199629
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Qin [Mon, 20 Jan 2014 07:32:26 +0000 (07:32 +0000)]
[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199628
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Mon, 20 Jan 2014 04:10:11 +0000 (04:10 +0000)]
MC: whitespace
Remove hard tabs in favour of spaces. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199624
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Mon, 20 Jan 2014 02:32:02 +0000 (02:32 +0000)]
[PM] Fix a contradiction in the comments noticed by Anders.
Have I mentioned that functions returning true on error and false on
success are confusing? They're more confusing when their name is
"verify". Anyways...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199622
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Qin [Mon, 20 Jan 2014 02:14:05 +0000 (02:14 +0000)]
[AArch64 NEON] Accept both #0.0 and #0 for comparing with floating point zero in asm parser.
For FCMEQ, FCMGE, FCMGT, FCMLE and FCMLT, floating point zero will be
printed as #0.0 instead of #0. To support the history codes using #0,
we consider to let asm parser accept both #0.0 and #0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199621
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Mon, 20 Jan 2014 01:40:43 +0000 (01:40 +0000)]
Add some wording to the coding standards to say how to indent namespaces
(and to mention namespace ending comments). This is based on a quick
discussion on the developer mailing list where there was essentially no
objections to a simple and consistent rule. This should avoid future
debates about whether or not a namespace is "big enough" to indent. It
also matches clang-format's current behavior with LLVM source code which
hasn't really seen any opposition in code reviews that I spot checked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199620
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Sun, 19 Jan 2014 21:06:00 +0000 (21:06 +0000)]
Move the retrieval of VT after all of the early exits from PerformOrCombine that do not use VT. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199612
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Sun, 19 Jan 2014 20:33:48 +0000 (20:33 +0000)]
[APInt] Fix nearestLogBase2 to return correct answers for very large APInt and APInt with a bitwidth of 1.
I also improved the comments, added some more tests, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199610
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Sun, 19 Jan 2014 20:33:38 +0000 (20:33 +0000)]
[APInt] Fixed bug where APInt(UINT32_MAX, 0) would blow up when being constructed.
This was due to arithmetic overflow in the getNumBits() computation. Now we
cast BitWidth to a uint64_t so that does not occur during the computation. After
the computation is complete, the uint64_t is truncated when the function
returns.
I know that this is not something that is likely to happen, but it *IS* a valid
input and we should not blow up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199609
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sun, 19 Jan 2014 20:05:13 +0000 (20:05 +0000)]
InstCombine: Modernize a bunch of cast combines.
Also make them vector-aware.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199608
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sun, 19 Jan 2014 16:56:10 +0000 (16:56 +0000)]
InstCombine: Hoist 3 copies of AddOne/SubOne into a header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199605
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sun, 19 Jan 2014 16:48:41 +0000 (16:48 +0000)]
InstCombine: Replace a hand-rolled version of isKnownToBeAPowerOfTwo with the real thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199604
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sun, 19 Jan 2014 15:24:22 +0000 (15:24 +0000)]
InstCombine: Teach most integer add/sub/mul/div combines how to deal with vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199602
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sun, 19 Jan 2014 13:36:27 +0000 (13:36 +0000)]
InstCombine: Refactor fmul/fdiv combines to handle vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199598
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Sun, 19 Jan 2014 12:52:10 +0000 (12:52 +0000)]
[CMake] Introduce new scheme of LLVM_TOOLS_BINARY_DIR and LLVM_LIBRARY_DIR
In LLVM build tree, they points corresponding INTDIR.
In Clang standalone tree, they points external dir (llvm-config's --bindir and --libdir).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199595
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Sun, 19 Jan 2014 12:47:26 +0000 (12:47 +0000)]
[CMake] Add comments in llvm/CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199594
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Sun, 19 Jan 2014 12:47:22 +0000 (12:47 +0000)]
[CMake] Deprecate LLVM_TOOLS_BINARY_DIR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199593
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Sun, 19 Jan 2014 12:47:18 +0000 (12:47 +0000)]
[CMake] Prune deprecate usage of CMAKE_RUNTIME_OUTPUT_DIRECTORY.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199592
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Sun, 19 Jan 2014 12:16:54 +0000 (12:16 +0000)]
Fix a really nasty SROA bug with how we handled out-of-bounds memcpy
intrinsics.
Reported on the list by Evan with a couple of attempts to fix, but it
took a while to dig down to the root cause. There are two overlapping
bugs here, both centering around the circumstance of discovering
a memcpy operand which is known to be completely outside the bounds of
the alloca.
First, we need to kill the *other* side of the memcpy if it was added to
this alloca. Otherwise we'll factor it into our slicing and try to
rewrite it even though we know for a fact that it is dead. This is made
more tricky because we can visit the sides in either order. So we have
to both kill the other side and skip instructions marked as dead. The
latter really should be goodness in every case, but here is a matter of
correctness.
Second, we need to actually remove the *uses* of the alloca by the
memcpy when queuing it for later deletion. Otherwise it may still be
using the alloca when we go to promote it (if the rewrite re-uses the
existing alloca instruction). Do this by factoring out the
use-clobbering used when for nixing a Phi argument and re-using it
across the operands of a to-be-deleted instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199590
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Sun, 19 Jan 2014 08:25:41 +0000 (08:25 +0000)]
ARM ELF: ensure that the tag types are corrected
Ensure that the tag types are reflected on a replacement. This is particularly
important for the compatibility tag which has multiple representations where the
last definition wins.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199577
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Sun, 19 Jan 2014 08:25:35 +0000 (08:25 +0000)]
ARM: update build attributes for ABI r2.09
Update names for the names as per the current ABI errata. Mark deprecated tags
as such.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199576
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Sun, 19 Jan 2014 08:25:27 +0000 (08:25 +0000)]
Move ARM build attributes into Support
This moves the ARM build attributes definitions and support routines into the
Support library. The support routines simply permit the conversion of the value
to and from a string representation.
The movement is prompted in order to permit access to the constants and string
representations from readobj in order to facilitate decoding of the attributes
section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199575
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Sun, 19 Jan 2014 08:25:19 +0000 (08:25 +0000)]
ARM IAS: remove unnecessary special case
Tag_nodefaults is even and greater than 32 and thus does not need the special
check to fall into the correct category.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199574
91177308-0d34-0410-b5e6-
96231b3b80d8
Arnold Schwaighofer [Sun, 19 Jan 2014 03:18:31 +0000 (03:18 +0000)]
LoopVectorizer: A reduction that has multiple uses of the reduction value is not
a reduction.
Really. Under certain circumstances (the use list of an instruction has to be
set up right - hence the extra pass in the test case) we would not recognize
when a value in a potential reduction cycle was used multiple times by the
reduction cycle.
Fixes PR18526.
radar://
15851149
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199570
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Sun, 19 Jan 2014 02:22:18 +0000 (02:22 +0000)]
[PM] Make the verifier work independently of any pass manager.
This makes the 'verifyFunction' and 'verifyModule' functions totally
independent operations on the LLVM IR. It also cleans up their API a bit
by lifting the abort behavior into their clients and just using an
optional raw_ostream parameter to control printing.
The implementation of the verifier is now just an InstVisitor with no
multiple inheritance. It also is significantly more const-correct, and
hides the const violations internally. The two layers that force us to
break const correctness are building a DomTree and dispatching through
the InstVisitor.
A new VerifierPass is used to implement the legacy pass manager
interface in terms of the other pieces.
The error messages produced may be slightly different now, and we may
have slightly different short circuiting behavior with different usage
models of the verifier, but generally everything works equivalently and
this unblocks wiring the verifier up to the new pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199569
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Sun, 19 Jan 2014 02:13:50 +0000 (02:13 +0000)]
Add a const lookup routine to get a BlockAddress constant if there is
one, but not create one. This is useful in the verifier when we want to
query the constant if it exists but not create one. To be used in an
upcoming commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199568
91177308-0d34-0410-b5e6-
96231b3b80d8
Eli Bendersky [Sat, 18 Jan 2014 22:54:33 +0000 (22:54 +0000)]
Support AddrSpaceCast in ConstantExpr::getAsInstruction.
It's handled similarly to the other casts. CastInst::Create already knows how
to handle it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199565
91177308-0d34-0410-b5e6-
96231b3b80d8
Nick Lewycky [Sat, 18 Jan 2014 22:47:12 +0000 (22:47 +0000)]
Don't refuse to transform constexpr(call(arg, ...)) to call(constexpr(arg), ...)) just because the function has multiple return values even if their return types are the same. Patch by Eduard Burtescu!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199564
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sat, 18 Jan 2014 19:03:19 +0000 (19:03 +0000)]
ARM: Let the assembler reject v5 instructions in v4 mode.
PR18524.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199559
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Sat, 18 Jan 2014 19:01:08 +0000 (19:01 +0000)]
[CMake] Add llvm-tblgen to dependencies of check-llvm.
llvm-tblgen is not built when external LLVM_TABLEGEN is specified.
Even then, llvm-tblgen should be built for testing tblgen itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199558
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sat, 18 Jan 2014 16:43:14 +0000 (16:43 +0000)]
InstCombine: Make the (fmul X, -1.0) -> (fsub -0.0, X) transform handle vectors too.
PR18532.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199553
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sat, 18 Jan 2014 16:43:06 +0000 (16:43 +0000)]
Upgrade ConstantFP's negative zero and infinity getters to handle vector types.
Will be used soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199552
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Sat, 18 Jan 2014 02:12:10 +0000 (02:12 +0000)]
typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199537
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Sat, 18 Jan 2014 02:12:00 +0000 (02:12 +0000)]
Debug info (LTO): Move the creation of accessibility flags to
getOrCreateSubprogramDIE to avoid attributes being added twice when DIEs
are merged.
rdar://problem/
15842330.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199536
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Sat, 18 Jan 2014 00:48:14 +0000 (00:48 +0000)]
Fix more instances of dropped fast math flags when optimizing FADD instructions. All found by inspection (aka grep).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199528
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Fri, 17 Jan 2014 23:58:17 +0000 (23:58 +0000)]
Add an inalloca flag to allocas
Summary:
The only current use of this flag is to mark the alloca as dynamic, even
if its in the entry block. The stack adjustment for the alloca can
never be folded into the prologue because the call may clear it and it
has to be allocated at the top of the stack.
Reviewers: majnemer
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D2571
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199525
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Bogner [Fri, 17 Jan 2014 22:39:45 +0000 (22:39 +0000)]
MC: Add some missing include guards
Patch by Daniel Reynaud!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199523
91177308-0d34-0410-b5e6-
96231b3b80d8
Juergen Ributzka [Fri, 17 Jan 2014 22:24:35 +0000 (22:24 +0000)]
Update LangRef to emphasize the difference between "coldcc" and "preserve_mostcc".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199521
91177308-0d34-0410-b5e6-
96231b3b80d8
Rui Ueyama [Fri, 17 Jan 2014 22:11:27 +0000 (22:11 +0000)]
80-column.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199519
91177308-0d34-0410-b5e6-
96231b3b80d8
Rui Ueyama [Fri, 17 Jan 2014 22:02:24 +0000 (22:02 +0000)]
llvm-objdump/COFF: Print ordinal base number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199518
91177308-0d34-0410-b5e6-
96231b3b80d8
Juergen Ributzka [Fri, 17 Jan 2014 19:47:03 +0000 (19:47 +0000)]
Add two new calling conventions for runtime calls
This patch adds two new target-independent calling conventions for runtime
calls - PreserveMost and PreserveAll.
The target-specific implementation for X86-64 is defined as following:
- Arguments are passed as for the default C calling convention
- The same applies for the return value(s)
- PreserveMost preserves all GPRs - except R11
- PreserveAll preserves all GPRs and all XMMs/YMMs - except R11
Reviewed by Lang and Philip
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199508
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Fri, 17 Jan 2014 15:40:05 +0000 (15:40 +0000)]
[mips][msa] Correct pattern for LSA
Summary:
$rs and $rt were the wrong way round in the .td and the testcase wasn't
strict enough to detect the mistake.
Reviewers: matheusalmeida
Reviewed By: matheusalmeida
Differential Revision: http://llvm-reviews.chandlerc.com/D2554
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199498
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Fri, 17 Jan 2014 14:48:06 +0000 (14:48 +0000)]
[mips] Split IIIdiv int II_DIV, II_DIVU, II_DDIV, and II_DDIVU
No functional change since the InstrItinData's were duplicated
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199497
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Fri, 17 Jan 2014 14:32:41 +0000 (14:32 +0000)]
[mips][sched] Split IIImul and IIImult into subclasses.
IIImul -> II_MUL
IIImult -> II_MULT, II_MULTU, II_MADD, II_MADDU, II_MSUB, II_MSUBU, II_DMULT, II_DMULTU
No functional change since the InstrItinData's have been duplicated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199495
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Fri, 17 Jan 2014 14:17:34 +0000 (14:17 +0000)]
[mips][sched] Split IIHiLo into II_MFHI_MFLO and II_MTHI_MTLO
No functional change since the InstrItinData's have been duplicated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199493
91177308-0d34-0410-b5e6-
96231b3b80d8
Renato Golin [Fri, 17 Jan 2014 13:53:08 +0000 (13:53 +0000)]
Add MLA alias for ARMv4 support.
Fix MLA defs to use register class GPRnopc.
Add encoding tests for multiply instructions.
(Alias for MUL/SMLAL/UMLAL added by r199026.)
Patch by Zhaoshi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199491
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Fri, 17 Jan 2014 11:09:34 +0000 (11:09 +0000)]
[PM] [cleanup] Rename some of the Verifier's members, re-arrange them,
and tweak comments prior to more invasive surgery. Also clean up some
other non-doxygen comments, and run clang-format over the parts that are
going to change dramatically in subsequent commits so that those don't
get cluttered with formatting changes.
No functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199489
91177308-0d34-0410-b5e6-
96231b3b80d8
Kostya Serebryany [Fri, 17 Jan 2014 11:00:30 +0000 (11:00 +0000)]
[asan] extend asan-coverage (still experimental).
- add a mode for collecting per-block coverage (-asan-coverage=2).
So far the implementation is naive (all blocks are instrumented),
the performance overhead on top of asan could be as high as 30%.
- Make sure the one-time calls to __sanitizer_cov are moved to function buttom,
which in turn required to copy the original debug info into the call insn.
Here is the performance data on SPEC 2006
(train data, comparing asan with asan-coverage={0,1,2}):
asan+cov0 asan+cov1 diff 0-1 asan+cov2 diff 0-2 diff 1-2
400.perlbench, 65.60, 65.80, 1.00, 76.20, 1.16, 1.16
401.bzip2, 65.10, 65.50, 1.01, 75.90, 1.17, 1.16
403.gcc, 1.64, 1.69, 1.03, 2.04, 1.24, 1.21
429.mcf, 21.90, 22.60, 1.03, 23.20, 1.06, 1.03
445.gobmk, 166.00, 169.00, 1.02, 205.00, 1.23, 1.21
456.hmmer, 88.30, 87.90, 1.00, 91.00, 1.03, 1.04
458.sjeng, 210.00, 222.00, 1.06, 258.00, 1.23, 1.16
462.libquantum, 1.73, 1.75, 1.01, 2.11, 1.22, 1.21
464.h264ref, 147.00, 152.00, 1.03, 160.00, 1.09, 1.05
471.omnetpp, 115.00, 116.00, 1.01, 140.00, 1.22, 1.21
473.astar, 133.00, 131.00, 0.98, 142.00, 1.07, 1.08
483.xalancbmk, 118.00, 120.00, 1.02, 154.00, 1.31, 1.28
433.milc, 19.80, 20.00, 1.01, 20.10, 1.02, 1.01
444.namd, 16.20, 16.20, 1.00, 17.60, 1.09, 1.09
447.dealII, 41.80, 42.20, 1.01, 43.50, 1.04, 1.03
450.soplex, 7.51, 7.82, 1.04, 8.25, 1.10, 1.05
453.povray, 14.00, 14.40, 1.03, 15.80, 1.13, 1.10
470.lbm, 33.30, 34.10, 1.02, 34.10, 1.02, 1.00
482.sphinx3, 12.40, 12.30, 0.99, 13.00, 1.05, 1.06
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199488
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Fri, 17 Jan 2014 10:56:02 +0000 (10:56 +0000)]
[PM] Remove the preverifier and directly compute the DominatorTree for
the verifier after ensuring the CFG is at least usefully formed.
This fixes a number of problems:
1) The PreVerifier was missing the controls the Verifier provides over
*how* an invalid module is handled -- it just aborted the program!
Now it uses the same logic as the Verifier which is significantly
more library-friendly.
2) The DominatorTree used previously could have been cached and not
updated due to bugs in prior passes and we would silently use the
stale tree. This could cause dominance errors to not be as quickly
diagnosed.
3) We can now (in the next patch) pull the functionality of the verifier
apart from the pass infrastructure so that you can verify IR without
having any form of pass manager. This in turn frees the code to share
logic between old and new pass manager variants.
Along the way I fixed at least one annoying bug -- the state for
'Broken' wasn't being cleared from run to run causing all functions
visited after the first broken function to be marked as broken
regardless of whether *they* were a problem. Fortunately, I don't really
know much of a way to observe this peculiarity.
In case folks are worried about the runtime cost, its negligible.
I looked at running the entire regression test suite (which should be
a relatively good use of the verifier) before and after but was unable
to even measure the time spent on the verifier and there was no
regresion from before to after. I checked both with debug builds and
optimized builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199487
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Qin [Fri, 17 Jan 2014 09:54:30 +0000 (09:54 +0000)]
[AArch64 NEON] Expand vector for UDIV/SDIV/UREM/SREM/FREM as neon doesn't support these operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199485
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Fri, 17 Jan 2014 09:47:55 +0000 (09:47 +0000)]
Add the test for libstdc++ versions newer than 4.6 so we don't
accidentally pick that up while using Clang and run into subtle bugs
down the road related to C++11 features not fully implemented in that
version of the standard library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199484
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 17 Jan 2014 08:16:57 +0000 (08:16 +0000)]
Switch a few instructions to use RI instead I so they don't require REX_W to be explicitly specified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199479
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 17 Jan 2014 08:01:20 +0000 (08:01 +0000)]
Add OpSize16 flags to 32-bit CRC32 instructions so they can be encoded correctly in 16-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199478
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 17 Jan 2014 07:44:10 +0000 (07:44 +0000)]
Teach x86 asm parser to handle 'opaque ptr' in Intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199477
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 17 Jan 2014 07:37:39 +0000 (07:37 +0000)]
Teach X86 asm parser to understand 'ZMMWORD PTR' in Intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199476
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 17 Jan 2014 07:25:39 +0000 (07:25 +0000)]
Fix intel syntax for 64-bit version of FXSAVE/FXRSTOR to use '64' suffix instead of 'q'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199474
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 17 Jan 2014 07:11:45 +0000 (07:11 +0000)]
VEX_PREFIX_66 doesn't need to set the hasOpSize flag since VEX instructions don't use the size fields it controls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199470
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 17 Jan 2014 06:42:38 +0000 (06:42 +0000)]
Replace duplicated code with a existing helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199468
91177308-0d34-0410-b5e6-
96231b3b80d8
Hao Liu [Fri, 17 Jan 2014 06:23:30 +0000 (06:23 +0000)]
[AArch64]Fix the problem can't select f16_to_f32 and f32_to_f16.
Also add copy support for FPR16.
Also add a missing test case file belongs to commit r197361.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199463
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Qin [Fri, 17 Jan 2014 05:52:35 +0000 (05:52 +0000)]
[AArch64 NEON] Custom lower conversion between vector integer and vector floating point if element bit-width doesn't match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199462
91177308-0d34-0410-b5e6-
96231b3b80d8
Hao Liu [Fri, 17 Jan 2014 05:44:46 +0000 (05:44 +0000)]
[AArch64]Fix the problem can't select concat_vectors of two v1i32 types.
Also fix the problem can't select scalar_to_vector from f32 to v2f32/v4f32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199461
91177308-0d34-0410-b5e6-
96231b3b80d8
Bob Wilson [Fri, 17 Jan 2014 00:40:39 +0000 (00:40 +0000)]
Fix bad variable syntax in r199413
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199447
91177308-0d34-0410-b5e6-
96231b3b80d8