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1 /*

3 * Jesse Barnes <jesse.barnes@intel.com>

4 *

6 * 2004 Sylvain Meyer

7 *

8 * GPL/BSD dual license

9 */

10 #include "drmP.h"

11 #include "drm.h"

12 #include "drm_sarea.h"

13 #include "i915_drm.h"

14 #include "i915_drv.h"

15 #include "intel_bios.h"

16 #include "intel_drv.h"

18 /**

19 * i915_probe_agp - get AGP bootup configuration

20 * @pdev: PCI device

21 * @aperture_size: returns AGP aperture configured size

22 * @preallocated_size: returns size of BIOS preallocated AGP space

23 *

24 * Since Intel integrated graphics are UMA, the BIOS has to set aside

25 * some RAM for the framebuffer at early boot. This code figures out

26 * how much was set aside so we can use it for our own purposes.

27 */

28 int i915_probe_agp(struct pci_dev *pdev, unsigned long *aperture_size,

29 unsigned long *preallocated_size)

30 {

31 struct pci_dev *bridge_dev;

32 u16 tmp = 0;

33 unsigned long overhead;

35 bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));

36 if (!bridge_dev) {

37 DRM_ERROR("bridge device not found\n");

38 return -1;

39 }

41 /* Get the fb aperture size and "stolen" memory amount. */

42 pci_read_config_word(bridge_dev, INTEL_GMCH_CTRL, &tmp);

43 pci_dev_put(bridge_dev);

45 *aperture_size = 1024 * 1024;

46 *preallocated_size = 1024 * 1024;

48 switch (pdev->device) {

49 case PCI_DEVICE_ID_INTEL_82830_CGC:

50 case PCI_DEVICE_ID_INTEL_82845G_IG:

51 case PCI_DEVICE_ID_INTEL_82855GM_IG:

52 case PCI_DEVICE_ID_INTEL_82865_IG:

53 if ((tmp & INTEL_GMCH_MEM_MASK) == INTEL_GMCH_MEM_64M)

54 *aperture_size *= 64;

55 else

56 *aperture_size *= 128;

57 break;

58 default:

59 /* 9xx supports large sizes, just look at the length */

60 *aperture_size = pci_resource_len(pdev, 2);

61 break;

62 }

64 /*

65 * Some of the preallocated space is taken by the GTT

66 * and popup. GTT is 1K per MB of aperture size, and popup is 4K.

67 */

68 overhead = (*aperture_size / 1024) + 4096;

69 switch (tmp & INTEL_855_GMCH_GMS_MASK) {

70 case INTEL_855_GMCH_GMS_STOLEN_1M:

71 break; /* 1M already */

72 case INTEL_855_GMCH_GMS_STOLEN_4M:

73 *preallocated_size *= 4;

74 break;

75 case INTEL_855_GMCH_GMS_STOLEN_8M:

76 *preallocated_size *= 8;

77 break;

78 case INTEL_855_GMCH_GMS_STOLEN_16M:

79 *preallocated_size *= 16;

80 break;

81 case INTEL_855_GMCH_GMS_STOLEN_32M:

82 *preallocated_size *= 32;

83 break;

84 case INTEL_915G_GMCH_GMS_STOLEN_48M:

85 *preallocated_size *= 48;

86 break;

87 case INTEL_915G_GMCH_GMS_STOLEN_64M:

88 *preallocated_size *= 64;

89 break;

90 case INTEL_855_GMCH_GMS_DISABLED:

91 DRM_ERROR("video memory is disabled\n");

92 return -1;

93 default:

94 DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",

95 tmp & INTEL_855_GMCH_GMS_MASK);

96 return -1;

97 }

98 *preallocated_size -= overhead;

100 return 0;

101 }

102

103 static int

104 i915_init_hws_phys(struct drm_device *dev)

105 {

106 struct drm_i915_private *dev_priv = dev->dev_private;

107 int ret = 0;

108

109 dev_priv->status_page_dmah = drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE,

110 0xffffffff);

111

112 if (!dev_priv->status_page_dmah) {

113 DRM_ERROR("Can not allocate hardware status page\n");

114 ret = -ENOMEM;

115 goto out;

116 }

117 dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;

118 dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;

119

120 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);

121

122 I915_WRITE(HWS_PGA, dev_priv->dma_status_page);

123 DRM_DEBUG("hws kernel virt: 0x%p\n", dev_priv->hw_status_page);

124

125 out:

126 return ret;

127 }

128

129 static int i915_load_modeset_init(struct drm_device *dev)

130 {

131 struct drm_i915_private *dev_priv = dev->dev_private;

132 unsigned long agp_size, prealloc_size;

133 int ret = 0;

134

135 i915_probe_agp(dev->pdev, &agp_size, &prealloc_size);

136

137 /* Basic memrange allocator for stolen space (aka vram) */

138 drm_mm_init(&dev_priv->vram, 0, prealloc_size);

139 /* Let GEM Manage from end of prealloc space to end of aperture */

140 i915_gem_do_init(dev, prealloc_size, agp_size);

141

142 if (!I915_NEED_GFX_HWS(dev))

143 i915_init_hws_phys(dev);

144

145 ret = i915_gem_init_ringbuffer(dev);

146 if (ret)

147 goto out;

148

149 /* Allow hardware batchbuffers unless told otherwise.

150 */

151 dev_priv->allow_batchbuffer = 1;

152 dev_priv->max_validate_buffers = I915_MAX_VALIDATE_BUFFERS;

153 mutex_init(&dev_priv->cmdbuf_mutex);

154

155 dev_priv->wq = create_singlethread_workqueue("i915");

156 if (dev_priv->wq == 0) {

157 DRM_DEBUG("Error\n");

158 ret = -EINVAL;

159 goto destroy_ringbuffer;

160 }

161

162 ret = intel_init_bios(dev);

163 if (ret) {

164 DRM_ERROR("failed to find VBIOS tables\n");

165 ret = -ENODEV;

166 goto destroy_wq;

167 }

168

169 intel_modeset_init(dev);

170 drm_helper_initial_config(dev, false);

171

172 dev->devname = kstrdup(DRIVER_NAME, GFP_KERNEL);

173 if (!dev->devname) {

174 ret = -ENOMEM;

175 goto modeset_cleanup;

176 }

177

178 ret = drm_irq_install(dev);

179 if (ret) {

180 kfree(dev->devname);

181 goto modeset_cleanup;

182 }

183 return 0;

184

185 modeset_cleanup:

186 intel_modeset_cleanup(dev);

187 destroy_wq:

188 destroy_workqueue(dev_priv->wq);

189 destroy_ringbuffer:

190 i915_gem_cleanup_ringbuffer(dev);

191 out:

192 return ret;

193 }

194

195 /**

196 * i915_driver_load - setup chip and create an initial config

197 * @dev: DRM device

198 * @flags: startup flags

199 *

200 * The driver load routine has to do several things:

201 * - drive output discovery via intel_modeset_init()

202 * - initialize the memory manager

203 * - allocate initial config memory

204 * - setup the DRM framebuffer with the allocated memory

205 */

206 int i915_driver_load(struct drm_device *dev, unsigned long flags)

207 {

208 struct drm_i915_private *dev_priv;

209 int ret = 0, num_pipes = 2;

210 u32 tmp;

211

212 dev_priv = drm_alloc(sizeof(struct drm_i915_private), DRM_MEM_DRIVER);

213 if (dev_priv == NULL)

214 return -ENOMEM;

215

216 memset(dev_priv, 0, sizeof(struct drm_i915_private));

217 dev->dev_private = (void *)dev_priv;

218 dev_priv->dev = dev;

219

220 /* i915 has 4 more counters */

221 dev->counters += 4;

222 dev->types[6] = _DRM_STAT_IRQ;

223 dev->types[7] = _DRM_STAT_PRIMARY;

224 dev->types[8] = _DRM_STAT_SECONDARY;

225 dev->types[9] = _DRM_STAT_DMA;

226

227 if (IS_MOBILE(dev) || IS_I9XX(dev))

228 dev_priv->cursor_needs_physical = true;

229 else

230 dev_priv->cursor_needs_physical = false;

231

232 if (IS_I965G(dev) || IS_G33(dev))

233 dev_priv->cursor_needs_physical = false;

234

235 if (IS_I9XX(dev))

236 pci_read_config_dword(dev->pdev, 0x5C, &dev_priv->stolen_base);

237

238 if (IS_I9XX(dev)) {

239 dev_priv->mmiobase = drm_get_resource_start(dev, 0);

240 dev_priv->mmiolen = drm_get_resource_len(dev, 0);

241 dev->mode_config.fb_base =

242 drm_get_resource_start(dev, 2) & 0xff000000;

243 } else if (drm_get_resource_start(dev, 1)) {

244 dev_priv->mmiobase = drm_get_resource_start(dev, 1);

245 dev_priv->mmiolen = drm_get_resource_len(dev, 1);

246 dev->mode_config.fb_base =

247 drm_get_resource_start(dev, 0) & 0xff000000;

248 } else {

249 DRM_ERROR("Unable to find MMIO registers\n");

250 ret = -ENODEV;

251 goto free_priv;

252 }

253

254 DRM_DEBUG("fb_base: 0x%08lx\n", dev->mode_config.fb_base);

255

256 ret = drm_addmap(dev, dev_priv->mmiobase, dev_priv->mmiolen,

257 _DRM_REGISTERS, _DRM_KERNEL|_DRM_READ_ONLY|_DRM_DRIVER,

258 &dev_priv->mmio_map);

259 if (ret != 0) {

260 DRM_ERROR("Cannot add mapping for MMIO registers\n");

261 goto free_priv;

262 }

263

264 i915_gem_load(dev);

265

266 #ifdef __linux__

267 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)

268 intel_init_chipset_flush_compat(dev);

269 #endif

270 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)

271 intel_opregion_init(dev);

272 #endif

273 #endif

274

275 tmp = I915_READ(PIPEASTAT);

276 I915_WRITE(PIPEASTAT, tmp);

277 tmp = I915_READ(PIPEBSTAT);

278 I915_WRITE(PIPEBSTAT, tmp);

279

280 atomic_set(&dev_priv->irq_received, 0);

281 I915_WRITE(HWSTAM, 0xeffe);

282 I915_WRITE(IMR, 0x0);

283 I915_WRITE(IER, 0x0);

284

285 DRM_SPININIT(&dev_priv->swaps_lock, "swap");

286 INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);

287 dev_priv->swaps_pending = 0;

288

289 DRM_SPININIT(&dev_priv->user_irq_lock, "userirq");

290 dev_priv->user_irq_refcount = 0;

291 dev_priv->irq_mask_reg = ~0;

292

293 ret = drm_vblank_init(dev, num_pipes);

294 if (ret)

295 goto out_rmmap;

296

297 ret = drm_hotplug_init(dev);

298 if (ret)

299 goto out_rmmap;

300

301 dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;

302 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */

303

304 i915_enable_interrupt(dev);

305 DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);

306

307 /*

308 * Initialize the hardware status page IRQ location.

309 */

310

311 I915_WRITE(INSTPM, (1 << 5) | (1 << 21));

312

313 if (drm_core_check_feature(dev, DRIVER_MODESET)) {

314 ret = i915_load_modeset_init(dev);

315 if (ret < 0) {

316 DRM_ERROR("failed to init modeset\n");

317 goto out_rmmap;

318 }

319 }

320

321 return 0;

322

323 out_rmmap:

324 drm_rmmap(dev, dev_priv->mmio_map);

325 free_priv:

326 drm_free(dev_priv, sizeof(struct drm_i915_private), DRM_MEM_DRIVER);

327 return ret;

328 }

329

330 int i915_driver_unload(struct drm_device *dev)

331 {

332 struct drm_i915_private *dev_priv = dev->dev_private;

333

334 u32 temp;

335

336 dev_priv->vblank_pipe = 0;

337

338 dev_priv->irq_enabled = 0;

339

340 I915_WRITE(HWSTAM, 0xffffffff);

341 I915_WRITE(IMR, 0xffffffff);

342 I915_WRITE(IER, 0x0);

343

344 temp = I915_READ(PIPEASTAT);

345 I915_WRITE(PIPEASTAT, temp);

346 temp = I915_READ(PIPEBSTAT);

347 I915_WRITE(PIPEBSTAT, temp);

348 temp = I915_READ(IIR);

349 I915_WRITE(IIR, temp);

350

351 I915_WRITE(PRB0_CTL, 0);

352

353 if (drm_core_check_feature(dev, DRIVER_MODESET)) {

354 drm_irq_uninstall(dev);

355 intel_modeset_cleanup(dev);

356 destroy_workqueue(dev_priv->wq);

357 }

358

359 #if 0

360 if (dev_priv->ring.virtual_start) {

361 drm_core_ioremapfree(&dev_priv->ring.map, dev);

362 }

363 #endif

364

365 #ifdef DRI2

366 if (dev_priv->sarea_kmap.virtual) {

367 drm_bo_kunmap(&dev_priv->sarea_kmap);

368 dev_priv->sarea_kmap.virtual = NULL;

369 dev->sigdata.lock = NULL;

370 }

371

372 if (dev_priv->sarea_bo) {

373 mutex_lock(&dev->struct_mutex);

374 drm_bo_usage_deref_locked(&dev_priv->sarea_bo);

375 mutex_unlock(&dev->struct_mutex);

376 dev_priv->sarea_bo = NULL;

377 }

378 #endif

379

380 if (drm_core_check_feature(dev, DRIVER_MODESET)) {

381 mutex_lock(&dev->struct_mutex);

382 i915_gem_cleanup_ringbuffer(dev);

383 mutex_unlock(&dev->struct_mutex);

384 drm_mm_takedown(&dev_priv->vram);

385 i915_gem_lastclose(dev);

386 if (!I915_NEED_GFX_HWS(dev))

387 drm_pci_free(dev, dev_priv->status_page_dmah);

388 }

389

390 drm_rmmap(dev, dev_priv->mmio_map);

391

392 #ifdef __linux__

393 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)

394 intel_opregion_free(dev);

395 #endif

396 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)

397 intel_fini_chipset_flush_compat(dev);

398 #endif

399 #endif

400

401 drm_free(dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER);

402

403 dev->dev_private = NULL;

404 return 0;

405 }

406

407 int i915_master_create(struct drm_device *dev, struct drm_master *master)

408 {

409 struct drm_i915_master_private *master_priv;

410 unsigned long sareapage;

411 int ret;

412

413 master_priv = drm_calloc(1, sizeof(*master_priv), DRM_MEM_DRIVER);

414 if (!master_priv)

415 return -ENOMEM;

416

417 /* prebuild the SAREA */

418 sareapage = max(SAREA_MAX, PAGE_SIZE);

419 ret = drm_addmap(dev, 0, sareapage, _DRM_SHM, _DRM_CONTAINS_LOCK|_DRM_DRIVER,

420 &master_priv->sarea);

421 if (ret) {

422 DRM_ERROR("SAREA setup failed\n");

423 return ret;

424 }

425 master_priv->sarea_priv = master_priv->sarea->handle + sizeof(struct drm_sarea);

426 master_priv->sarea_priv->pf_current_page = 0;

427

428 master->driver_priv = master_priv;

429 return 0;

430 }

431

432 void i915_master_destroy(struct drm_device *dev, struct drm_master *master)

433 {

434 struct drm_i915_master_private *master_priv = master->driver_priv;

435

436 if (!master_priv)

437 return;

438

439 if (master_priv->sarea)

440 drm_rmmap_locked(dev, master_priv->sarea);

441

442 drm_free(master_priv, sizeof(*master_priv), DRM_MEM_DRIVER);

443

444 master->driver_priv = NULL;

445 }

446

447 int i915_driver_open(struct drm_device *dev, struct drm_file *file_priv)

448 {

449 struct drm_i915_file_private *i915_file_priv;

450

451 DRM_DEBUG("\n");

452 i915_file_priv = (struct drm_i915_file_private *)

453 drm_alloc(sizeof(*i915_file_priv), DRM_MEM_FILES);

454

455 if (!i915_file_priv)

456 return -ENOMEM;

457

458 file_priv->driver_priv = i915_file_priv;

459

460 i915_file_priv->mm.last_gem_seqno = 0;

461 i915_file_priv->mm.last_gem_throttle_seqno = 0;

462

463 return 0;

464 }

465

466 void i915_driver_postclose(struct drm_device *dev, struct drm_file *file_priv)

467 {

468 struct drm_i915_file_private *i915_file_priv = file_priv->driver_priv;

469

470 drm_free(i915_file_priv, sizeof(*i915_file_priv), DRM_MEM_FILES);

471 }

472

473 void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)

474 {

475 struct drm_i915_private *dev_priv = dev->dev_private;

476 if (!drm_core_check_feature(dev, DRIVER_MODESET))

477 i915_mem_release(dev, file_priv, dev_priv->agp_heap);

478 }

479

480 void i915_driver_lastclose(struct drm_device * dev)

481 {

482 struct drm_i915_private *dev_priv = dev->dev_private;

483

484 if (drm_core_check_feature(dev, DRIVER_MODESET))

485 return;

486

487 #ifdef I915_HAVE_BUFFER

488 if (dev_priv->val_bufs) {

489 vfree(dev_priv->val_bufs);

490 dev_priv->val_bufs = NULL;

491 }

492 #endif

493

494 i915_gem_lastclose(dev);

495

496 if (dev_priv->agp_heap)

497 i915_mem_takedown(&(dev_priv->agp_heap));

498

499 #if defined(DRI2)

500 if (dev_priv->sarea_kmap.virtual) {

501 drm_bo_kunmap(&dev_priv->sarea_kmap);

502 dev_priv->sarea_kmap.virtual = NULL;

503 dev->control->master->lock.hw_lock = NULL;

504 dev->sigdata.lock = NULL;

505 }

506

507 if (dev_priv->sarea_bo) {

508 mutex_lock(&dev->struct_mutex);

509 drm_bo_usage_deref_locked(&dev_priv->sarea_bo);

510 mutex_unlock(&dev->struct_mutex);

511 dev_priv->sarea_bo = NULL;

512 }

513 #endif

514

515 i915_dma_cleanup(dev);

516 }

517

518 int i915_driver_firstopen(struct drm_device *dev)

519 {

520 if (drm_core_check_feature(dev, DRIVER_MODESET))

521 return 0;

522 return 0;

523 }