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1 /*

3 * Jesse Barnes <jesse.barnes@intel.com>

4 *

6 * 2004 Sylvain Meyer

7 *

8 * GPL/BSD dual license

9 */

10 #include "drmP.h"

11 #include "drm.h"

12 #include "drm_sarea.h"

13 #include "i915_drm.h"

14 #include "i915_drv.h"

15 #include "intel_bios.h"

16 #include "intel_drv.h"

18 /**

19 * i915_probe_agp - get AGP bootup configuration

20 * @pdev: PCI device

21 * @aperture_size: returns AGP aperture configured size

22 * @preallocated_size: returns size of BIOS preallocated AGP space

23 *

24 * Since Intel integrated graphics are UMA, the BIOS has to set aside

25 * some RAM for the framebuffer at early boot. This code figures out

26 * how much was set aside so we can use it for our own purposes.

27 */

28 int i915_probe_agp(struct pci_dev *pdev, unsigned long *aperture_size,

29 unsigned long *preallocated_size)

30 {

31 struct pci_dev *bridge_dev;

32 u16 tmp = 0;

33 unsigned long overhead;

35 bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));

36 if (!bridge_dev) {

37 DRM_ERROR("bridge device not found\n");

38 return -1;

39 }

41 /* Get the fb aperture size and "stolen" memory amount. */

42 pci_read_config_word(bridge_dev, INTEL_GMCH_CTRL, &tmp);

43 pci_dev_put(bridge_dev);

45 *aperture_size = 1024 * 1024;

46 *preallocated_size = 1024 * 1024;

48 switch (pdev->device) {

49 case PCI_DEVICE_ID_INTEL_82830_CGC:

50 case PCI_DEVICE_ID_INTEL_82845G_IG:

51 case PCI_DEVICE_ID_INTEL_82855GM_IG:

52 case PCI_DEVICE_ID_INTEL_82865_IG:

53 if ((tmp & INTEL_GMCH_MEM_MASK) == INTEL_GMCH_MEM_64M)

54 *aperture_size *= 64;

55 else

56 *aperture_size *= 128;

57 break;

58 default:

59 /* 9xx supports large sizes, just look at the length */

60 *aperture_size = pci_resource_len(pdev, 2);

61 break;

62 }

64 /*

65 * Some of the preallocated space is taken by the GTT

66 * and popup. GTT is 1K per MB of aperture size, and popup is 4K.

67 */

68 overhead = (*aperture_size / 1024) + 4096;

69 switch (tmp & INTEL_855_GMCH_GMS_MASK) {

70 case INTEL_855_GMCH_GMS_STOLEN_1M:

71 break; /* 1M already */

72 case INTEL_855_GMCH_GMS_STOLEN_4M:

73 *preallocated_size *= 4;

74 break;

75 case INTEL_855_GMCH_GMS_STOLEN_8M:

76 *preallocated_size *= 8;

77 break;

78 case INTEL_855_GMCH_GMS_STOLEN_16M:

79 *preallocated_size *= 16;

80 break;

81 case INTEL_855_GMCH_GMS_STOLEN_32M:

82 *preallocated_size *= 32;

83 break;

84 case INTEL_915G_GMCH_GMS_STOLEN_48M:

85 *preallocated_size *= 48;

86 break;

87 case INTEL_915G_GMCH_GMS_STOLEN_64M:

88 *preallocated_size *= 64;

89 break;

90 case INTEL_855_GMCH_GMS_DISABLED:

91 DRM_ERROR("video memory is disabled\n");

92 return -1;

93 default:

94 DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",

95 tmp & INTEL_855_GMCH_GMS_MASK);

96 return -1;

97 }

98 *preallocated_size -= overhead;

100 return 0;

101 }

102

103 static int

104 i915_init_hardware_status(struct drm_device *dev)

105 {

106 struct drm_i915_private *dev_priv = dev->dev_private;

107 drm_dma_handle_t *dmah;

108 int ret = 0;

109

110 #ifdef __FreeBSD__

111 DRM_UNLOCK();

112 #endif

113 dmah = drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE,

114 0xffffffff);

115 #ifdef __FreeBSD__

116 DRM_LOCK();

117 #endif

118 if (!dmah) {

119 DRM_ERROR("Can not allocate hardware status page\n");

120 ret = -ENOMEM;

121 goto out;

122 }

123 dev_priv->status_page_dmah = dmah;

124 dev_priv->hw_status_page = dmah->vaddr;

125 dev_priv->dma_status_page = dmah->busaddr;

126

127 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);

128

129 I915_WRITE(HWS_PGA, dev_priv->dma_status_page);

130 DRM_DEBUG("hws kernel virt: 0x%p\n", dev_priv->hw_status_page);

131

132 out:

133 return ret;

134 }

135

136 void i915_free_hardware_status(struct drm_device *dev)

137 {

138 struct drm_i915_private *dev_priv = dev->dev_private;

139 if (dev_priv->status_page_dmah) {

140 drm_pci_free(dev, dev_priv->status_page_dmah);

141 dev_priv->status_page_dmah = NULL;

142 /* Need to rewrite hardware status page */

143 I915_WRITE(0x02080, 0x1ffff000);

144 }

145

146 if (dev_priv->status_gfx_addr) {

147 dev_priv->status_gfx_addr = 0;

148 drm_core_ioremapfree(&dev_priv->hws_map, dev);

149 I915_WRITE(0x02080, 0x1ffff000);

150 }

151 }

152

153 static int i915_load_modeset_init(struct drm_device *dev)

154 {

155 struct drm_i915_private *dev_priv = dev->dev_private;

156 unsigned long agp_size, prealloc_size;

157 int ret = 0;

158

159 i915_probe_agp(dev->pdev, &agp_size, &prealloc_size);

160

161 /* Basic memrange allocator for stolen space (aka vram) */

162 drm_mm_init(&dev_priv->vram, 0, prealloc_size);

163 /* Let GEM Manage from end of prealloc space to end of aperture */

164 i915_gem_do_init(dev, prealloc_size, agp_size);

165

166 ret = i915_gem_init_ringbuffer(dev);

167 if (ret)

168 goto out;

169

170 /* Allow hardware batchbuffers unless told otherwise.

171 */

172 dev_priv->allow_batchbuffer = 1;

173 dev_priv->max_validate_buffers = I915_MAX_VALIDATE_BUFFERS;

174 mutex_init(&dev_priv->cmdbuf_mutex);

175

176 dev_priv->wq = create_singlethread_workqueue("i915");

177 if (dev_priv->wq == 0) {

178 DRM_DEBUG("Error\n");

179 ret = -EINVAL;

180 goto destroy_ringbuffer;

181 }

182

183 ret = intel_init_bios(dev);

184 if (ret) {

185 DRM_ERROR("failed to find VBIOS tables\n");

186 ret = -ENODEV;

187 goto destroy_wq;

188 }

189

190 intel_modeset_init(dev);

191 drm_helper_initial_config(dev, false);

192

193 dev->devname = kstrdup(DRIVER_NAME, GFP_KERNEL);

194 if (!dev->devname) {

195 ret = -ENOMEM;

196 goto modeset_cleanup;

197 }

198

199 ret = drm_irq_install(dev);

200 if (ret) {

201 kfree(dev->devname);

202 goto modeset_cleanup;

203 }

204 return 0;

205

206 modeset_cleanup:

207 intel_modeset_cleanup(dev);

208 destroy_wq:

209 destroy_workqueue(dev_priv->wq);

210 destroy_ringbuffer:

211 i915_gem_cleanup_ringbuffer(dev);

212 out:

213 return ret;

214 }

215

216 /**

217 * i915_driver_load - setup chip and create an initial config

218 * @dev: DRM device

219 * @flags: startup flags

220 *

221 * The driver load routine has to do several things:

222 * - drive output discovery via intel_modeset_init()

223 * - initialize the memory manager

224 * - allocate initial config memory

225 * - setup the DRM framebuffer with the allocated memory

226 */

227 int i915_driver_load(struct drm_device *dev, unsigned long flags)

228 {

229 struct drm_i915_private *dev_priv;

230 int ret = 0, num_pipes = 2;

231 u32 tmp;

232

233 dev_priv = drm_alloc(sizeof(struct drm_i915_private), DRM_MEM_DRIVER);

234 if (dev_priv == NULL)

235 return -ENOMEM;

236

237 memset(dev_priv, 0, sizeof(struct drm_i915_private));

238 dev->dev_private = (void *)dev_priv;

239 dev_priv->dev = dev;

240

241 /* i915 has 4 more counters */

242 dev->counters += 4;

243 dev->types[6] = _DRM_STAT_IRQ;

244 dev->types[7] = _DRM_STAT_PRIMARY;

245 dev->types[8] = _DRM_STAT_SECONDARY;

246 dev->types[9] = _DRM_STAT_DMA;

247

248 if (IS_MOBILE(dev) || IS_I9XX(dev))

249 dev_priv->cursor_needs_physical = true;

250 else

251 dev_priv->cursor_needs_physical = false;

252

253 if (IS_I965G(dev) || IS_G33(dev))

254 dev_priv->cursor_needs_physical = false;

255

256 if (IS_I9XX(dev))

257 pci_read_config_dword(dev->pdev, 0x5C, &dev_priv->stolen_base);

258

259 if (IS_I9XX(dev)) {

260 dev_priv->mmiobase = drm_get_resource_start(dev, 0);

261 dev_priv->mmiolen = drm_get_resource_len(dev, 0);

262 dev->mode_config.fb_base =

263 drm_get_resource_start(dev, 2) & 0xff000000;

264 } else if (drm_get_resource_start(dev, 1)) {

265 dev_priv->mmiobase = drm_get_resource_start(dev, 1);

266 dev_priv->mmiolen = drm_get_resource_len(dev, 1);

267 dev->mode_config.fb_base =

268 drm_get_resource_start(dev, 0) & 0xff000000;

269 } else {

270 DRM_ERROR("Unable to find MMIO registers\n");

271 ret = -ENODEV;

272 goto free_priv;

273 }

274

275 DRM_DEBUG("fb_base: 0x%08lx\n", dev->mode_config.fb_base);

276

277 ret = drm_addmap(dev, dev_priv->mmiobase, dev_priv->mmiolen,

278 _DRM_REGISTERS, _DRM_KERNEL|_DRM_READ_ONLY|_DRM_DRIVER,

279 &dev_priv->mmio_map);

280 if (ret != 0) {

281 DRM_ERROR("Cannot add mapping for MMIO registers\n");

282 goto free_priv;

283 }

284

285 i915_gem_load(dev);

286

287 #ifdef __linux__

288 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)

289 intel_init_chipset_flush_compat(dev);

290 #endif

291 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)

292 intel_opregion_init(dev);

293 #endif

294 #endif

295

296 tmp = I915_READ(PIPEASTAT);

297 I915_WRITE(PIPEASTAT, tmp);

298 tmp = I915_READ(PIPEBSTAT);

299 I915_WRITE(PIPEBSTAT, tmp);

300

301 atomic_set(&dev_priv->irq_received, 0);

302 I915_WRITE(HWSTAM, 0xeffe);

303 I915_WRITE(IMR, 0x0);

304 I915_WRITE(IER, 0x0);

305

306 DRM_SPININIT(&dev_priv->swaps_lock, "swap");

307 INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);

308 dev_priv->swaps_pending = 0;

309

310 DRM_SPININIT(&dev_priv->user_irq_lock, "userirq");

311 dev_priv->user_irq_refcount = 0;

312 dev_priv->irq_mask_reg = ~0;

313

314 ret = drm_vblank_init(dev, num_pipes);

315 if (ret)

316 goto out_rmmap;

317

318 ret = drm_hotplug_init(dev);

319 if (ret)

320 goto out_rmmap;

321

322 dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;

323 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */

324

325 i915_enable_interrupt(dev);

326 DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);

327

328 /*

329 * Initialize the hardware status page IRQ location.

330 */

331

332 I915_WRITE(INSTPM, (1 << 5) | (1 << 21));

333

334 if (!I915_NEED_GFX_HWS(dev)) {

335 ret = i915_init_hardware_status(dev);

336 if (ret)

337 return ret;

338 }

339

340 if (drm_core_check_feature(dev, DRIVER_MODESET)) {

341 ret = i915_load_modeset_init(dev);

342 if (ret < 0) {

343 DRM_ERROR("failed to init modeset\n");

344 goto out_rmmap;

345 }

346 }

347

348 return 0;

349

350 out_rmmap:

351 drm_rmmap(dev, dev_priv->mmio_map);

352 free_priv:

353 drm_free(dev_priv, sizeof(struct drm_i915_private), DRM_MEM_DRIVER);

354 return ret;

355 }

356

357 int i915_driver_unload(struct drm_device *dev)

358 {

359 struct drm_i915_private *dev_priv = dev->dev_private;

360

361 u32 temp;

362

363 i915_free_hardware_status(dev);

364

365 dev_priv->vblank_pipe = 0;

366

367 dev_priv->irq_enabled = 0;

368

369 I915_WRITE(HWSTAM, 0xffffffff);

370 I915_WRITE(IMR, 0xffffffff);

371 I915_WRITE(IER, 0x0);

372

373 temp = I915_READ(PIPEASTAT);

374 I915_WRITE(PIPEASTAT, temp);

375 temp = I915_READ(PIPEBSTAT);

376 I915_WRITE(PIPEBSTAT, temp);

377 temp = I915_READ(IIR);

378 I915_WRITE(IIR, temp);

379

380 I915_WRITE(PRB0_CTL, 0);

381

382 if (drm_core_check_feature(dev, DRIVER_MODESET)) {

383 drm_irq_uninstall(dev);

384 intel_modeset_cleanup(dev);

385 destroy_workqueue(dev_priv->wq);

386 }

387

388 #if 0

389 if (dev_priv->ring.virtual_start) {

390 drm_core_ioremapfree(&dev_priv->ring.map, dev);

391 }

392 #endif

393

394 #ifdef DRI2

395 if (dev_priv->sarea_kmap.virtual) {

396 drm_bo_kunmap(&dev_priv->sarea_kmap);

397 dev_priv->sarea_kmap.virtual = NULL;

398 dev->sigdata.lock = NULL;

399 }

400

401 if (dev_priv->sarea_bo) {

402 mutex_lock(&dev->struct_mutex);

403 drm_bo_usage_deref_locked(&dev_priv->sarea_bo);

404 mutex_unlock(&dev->struct_mutex);

405 dev_priv->sarea_bo = NULL;

406 }

407 #endif

408

409 if (drm_core_check_feature(dev, DRIVER_MODESET)) {

410 mutex_lock(&dev->struct_mutex);

411 i915_gem_cleanup_ringbuffer(dev);

412 mutex_unlock(&dev->struct_mutex);

413 drm_mm_takedown(&dev_priv->vram);

414 i915_gem_lastclose(dev);

415 if (!I915_NEED_GFX_HWS(dev))

416 drm_pci_free(dev, dev_priv->status_page_dmah);

417 }

418

419 drm_rmmap(dev, dev_priv->mmio_map);

420

421 #ifdef __linux__

422 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)

423 intel_opregion_free(dev);

424 #endif

425 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)

426 intel_fini_chipset_flush_compat(dev);

427 #endif

428 #endif

429

430 drm_free(dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER);

431

432 dev->dev_private = NULL;

433 return 0;

434 }

435

436 int i915_master_create(struct drm_device *dev, struct drm_master *master)

437 {

438 struct drm_i915_master_private *master_priv;

439 unsigned long sareapage;

440 int ret;

441

442 master_priv = drm_calloc(1, sizeof(*master_priv), DRM_MEM_DRIVER);

443 if (!master_priv)

444 return -ENOMEM;

445

446 /* prebuild the SAREA */

447 sareapage = max(SAREA_MAX, PAGE_SIZE);

448 ret = drm_addmap(dev, 0, sareapage, _DRM_SHM, _DRM_CONTAINS_LOCK|_DRM_DRIVER,

449 &master_priv->sarea);

450 if (ret) {

451 DRM_ERROR("SAREA setup failed\n");

452 return ret;

453 }

454 master_priv->sarea_priv = master_priv->sarea->handle + sizeof(struct drm_sarea);

455 master_priv->sarea_priv->pf_current_page = 0;

456

457 master->driver_priv = master_priv;

458 return 0;

459 }

460

461 void i915_master_destroy(struct drm_device *dev, struct drm_master *master)

462 {

463 struct drm_i915_master_private *master_priv = master->driver_priv;

464

465 if (!master_priv)

466 return;

467

468 if (master_priv->sarea)

469 drm_rmmap_locked(dev, master_priv->sarea);

470

471 drm_free(master_priv, sizeof(*master_priv), DRM_MEM_DRIVER);

472

473 master->driver_priv = NULL;

474 }

475

476 int i915_driver_open(struct drm_device *dev, struct drm_file *file_priv)

477 {

478 struct drm_i915_file_private *i915_file_priv;

479

480 DRM_DEBUG("\n");

481 i915_file_priv = (struct drm_i915_file_private *)

482 drm_alloc(sizeof(*i915_file_priv), DRM_MEM_FILES);

483

484 if (!i915_file_priv)

485 return -ENOMEM;

486

487 file_priv->driver_priv = i915_file_priv;

488

489 i915_file_priv->mm.last_gem_seqno = 0;

490 i915_file_priv->mm.last_gem_throttle_seqno = 0;

491

492 return 0;

493 }

494

495 void i915_driver_postclose(struct drm_device *dev, struct drm_file *file_priv)

496 {

497 struct drm_i915_file_private *i915_file_priv = file_priv->driver_priv;

498

499 drm_free(i915_file_priv, sizeof(*i915_file_priv), DRM_MEM_FILES);

500 }

501

502 void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)

503 {

504 struct drm_i915_private *dev_priv = dev->dev_private;

505 if (!drm_core_check_feature(dev, DRIVER_MODESET))

506 i915_mem_release(dev, file_priv, dev_priv->agp_heap);

507 }

508

509 void i915_driver_lastclose(struct drm_device * dev)

510 {

511 struct drm_i915_private *dev_priv = dev->dev_private;

512

513 if (drm_core_check_feature(dev, DRIVER_MODESET))

514 return;

515

516 #ifdef I915_HAVE_BUFFER

517 if (dev_priv->val_bufs) {

518 vfree(dev_priv->val_bufs);

519 dev_priv->val_bufs = NULL;

520 }

521 #endif

522

523 i915_gem_lastclose(dev);

524

525 if (dev_priv->agp_heap)

526 i915_mem_takedown(&(dev_priv->agp_heap));

527

528 #if defined(DRI2)

529 if (dev_priv->sarea_kmap.virtual) {

530 drm_bo_kunmap(&dev_priv->sarea_kmap);

531 dev_priv->sarea_kmap.virtual = NULL;

532 dev->control->master->lock.hw_lock = NULL;

533 dev->sigdata.lock = NULL;

534 }

535

536 if (dev_priv->sarea_bo) {

537 mutex_lock(&dev->struct_mutex);

538 drm_bo_usage_deref_locked(&dev_priv->sarea_bo);

539 mutex_unlock(&dev->struct_mutex);

540 dev_priv->sarea_bo = NULL;

541 }

542 #endif

543

544 i915_dma_cleanup(dev);

545 }

546

547 int i915_driver_firstopen(struct drm_device *dev)

548 {

549 if (drm_core_check_feature(dev, DRIVER_MODESET))

550 return 0;

551 return 0;

552 }