1 /* mach64_irq.c -- IRQ handling for ATI Mach64 -*- linux-c -*-
2 * Created: Tue Feb 25, 2003 by Leif Delgass, based on radeon_irq.c/r128_irq.c
5 * Copyright (C) The Weather Channel, Inc. 2002.
6 * Copyright 2003 Leif Delgass
9 * The Weather Channel (TM) funded Tungsten Graphics to develop the
10 * initial release of the Radeon 8500 driver under the XFree86 license.
11 * This notice must be preserved.
13 * Permission is hereby granted, free of charge, to any person obtaining a
14 * copy of this software and associated documentation files (the "Software"),
15 * to deal in the Software without restriction, including without limitation
16 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
17 * and/or sell copies of the Software, and to permit persons to whom the
18 * Software is furnished to do so, subject to the following conditions:
20 * The above copyright notice and this permission notice (including the next
21 * paragraph) shall be included in all copies or substantial portions of the
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
25 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
26 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
27 * THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
28 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
29 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
30 * DEALINGS IN THE SOFTWARE.
33 * Keith Whitwell <keith@tungstengraphics.com>
34 * Eric Anholt <anholt@FreeBSD.org>
35 * Leif Delgass <ldelgass@retinalburn.net>
40 #include "mach64_drm.h"
41 #include "mach64_drv.h"
43 irqreturn_t mach64_driver_irq_handler(DRM_IRQ_ARGS)
45 struct drm_device *dev = (struct drm_device *) arg;
46 drm_mach64_private_t *dev_priv =
47 (drm_mach64_private_t *) dev->dev_private;
50 status = MACH64_READ(MACH64_CRTC_INT_CNTL);
52 /* VBLANK interrupt */
53 if (status & MACH64_CRTC_VBLANK_INT) {
54 /* Mask off all interrupt ack bits before setting the ack bit, since
55 * there may be other handlers outside the DRM.
57 * NOTE: On mach64, you need to keep the enable bits set when doing
58 * the ack, despite what the docs say about not acking and enabling
61 MACH64_WRITE(MACH64_CRTC_INT_CNTL,
62 (status & ~MACH64_CRTC_INT_ACKS)
63 | MACH64_CRTC_VBLANK_INT);
65 atomic_inc(&dev->vbl_received);
66 DRM_WAKEUP(&dev->vbl_queue);
67 drm_vbl_send_signals(dev);
73 int mach64_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence)
75 unsigned int cur_vblank;
78 /* Assume that the user has missed the current sequence number
79 * by about a day rather than she wants to wait for years
80 * using vertical blanks...
82 DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
83 (((cur_vblank = atomic_read(&dev->vbl_received))
84 - *sequence) <= (1 << 23)));
86 *sequence = cur_vblank;
93 void mach64_driver_irq_preinstall(struct drm_device * dev)
95 drm_mach64_private_t *dev_priv =
96 (drm_mach64_private_t *) dev->dev_private;
98 u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL);
100 DRM_DEBUG("before install CRTC_INT_CTNL: 0x%08x\n", status);
102 /* Disable and clear VBLANK interrupt */
103 MACH64_WRITE(MACH64_CRTC_INT_CNTL, (status & ~MACH64_CRTC_VBLANK_INT_EN)
104 | MACH64_CRTC_VBLANK_INT);
107 void mach64_driver_irq_postinstall(struct drm_device * dev)
109 drm_mach64_private_t *dev_priv =
110 (drm_mach64_private_t *) dev->dev_private;
112 /* Turn on VBLANK interrupt */
113 MACH64_WRITE(MACH64_CRTC_INT_CNTL, MACH64_READ(MACH64_CRTC_INT_CNTL)
114 | MACH64_CRTC_VBLANK_INT_EN);
116 DRM_DEBUG("after install CRTC_INT_CTNL: 0x%08x\n",
117 MACH64_READ(MACH64_CRTC_INT_CNTL));
121 void mach64_driver_irq_uninstall(struct drm_device * dev)
123 drm_mach64_private_t *dev_priv =
124 (drm_mach64_private_t *) dev->dev_private;
128 /* Disable and clear VBLANK interrupt */
129 MACH64_WRITE(MACH64_CRTC_INT_CNTL,
130 (MACH64_READ(MACH64_CRTC_INT_CNTL) &
131 ~MACH64_CRTC_VBLANK_INT_EN)
132 | MACH64_CRTC_VBLANK_INT);
134 DRM_DEBUG("after uninstall CRTC_INT_CTNL: 0x%08x\n",
135 MACH64_READ(MACH64_CRTC_INT_CNTL));