git.osdn.net Git - android-x86/external-libdrm.git/blob

1 /*

4 *

5 * Permission is hereby granted, free of charge, to any person obtaining a

6 * copy of this software and associated documentation files (the "Software"),

7 * to deal in the Software without restriction, including without limitation

8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

9 * and/or sell copies of the Software, and to permit persons to whom the

10 * Software is furnished to do so, subject to the following conditions:

11 *

12 * The above copyright notice and this permission notice (including the next

13 * paragraph) shall be included in all copies or substantial portions of the

14 * Software.

15 *

16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL

19 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR

20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

22 * DEALINGS IN THE SOFTWARE.

23 */

25 #include "drmP.h"

26 #include "drm.h"

27 #include "nouveau_drm.h"

28 #include "nouveau_drv.h"

31 static void nv10_praph_pipe(drm_device_t *dev) {

32 drm_nouveau_private_t *dev_priv = dev->dev_private;

33 int i;

35 nouveau_wait_for_idle(dev);

36 /* XXX check haiku comments */

37 NV_WRITE(NV10_PGRAPH_XFMODE0, 0x10000000);

38 NV_WRITE(NV10_PGRAPH_XFMODE1, 0x00000000);

39 NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x000064c0);

40 for (i = 0; i < 4; i++)

41 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000);

42 for (i = 0; i < 4; i++)

43 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

45 NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006ab0);

47 for (i = 0; i < 3; i++)

48 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000);

50 NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006a80);

51 for (i = 0; i < 3; i++)

52 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

54 NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00000040);

55 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000008);

57 NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00000200);

58 for (i = 0; i < 48; i++)

59 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

61 nouveau_wait_for_idle(dev);

63 NV_WRITE(NV10_PGRAPH_XFMODE0, 0x00000000);

64 NV_WRITE(NV10_PGRAPH_XFMODE1, 0x00000000);

65 NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006400);

66 for (i = 0; i < 211; i++)

67 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

69 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000);

70 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x40000000);

71 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x40000000);

72 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x40000000);

73 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x40000000);

74 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

75 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

76 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000);

77 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

78 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f000000);

79 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f000000);

80 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

81 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

82 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

83 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

84 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000);

85 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

86 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

87 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

88 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

89 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

90 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000);

91 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000);

92 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000);

93 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000);

95 NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006800);

96 for (i = 0; i < 162; i++)

97 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

98 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000);

99 for (i = 0; i < 25; i++)

100 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

101

102 NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006c00);

103 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

104 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

105 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

106 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

107 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0xbf800000);

108 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

109 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

110 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

111 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

112 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

113 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

114 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

115 NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00007000);

116 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

117 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

118 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

119 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

120 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

121 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

122 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

123 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

124 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

125 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

126 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

127 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

128 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca);

129 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

130 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

131 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

132 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca);

133 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

134 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

135 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

136 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca);

137 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

138 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

139 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

140 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca);

141 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

142 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

143 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

144 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca);

145 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

146 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

147 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

148 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca);

149 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

150 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

151 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

152 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca);

153 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

154 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

155 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

156 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x7149f2ca);

157 for (i = 0; i < 35; i++)

158 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

159

160

161 NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00007400);

162 for (i = 0; i < 48; i++)

163 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

164

165 NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00007800);

166 for (i = 0; i < 48; i++)

167 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

168

169 NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00004400);

170 for (i = 0; i < 32; i++)

171 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

172

173 NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00000000);

174 for (i = 0; i < 16; i++)

175 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

176

177 NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00000040);

178 for (i = 0; i < 4; i++)

179 NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000);

180

181 nouveau_wait_for_idle(dev);

182 }

183

184 /* TODO replace address with name

185 use loops */

186 static int nv10_graph_ctx_regs [] = {

187 NV03_PGRAPH_XY_LOGIC_MISC0,

188

189 //NV10_PGRAPH_CTX_SWITCH1, make ctx switch crash

190 NV10_PGRAPH_CTX_SWITCH2,

191 NV10_PGRAPH_CTX_SWITCH3,

192 NV10_PGRAPH_CTX_SWITCH4,

193 NV10_PGRAPH_CTX_SWITCH5,

194 NV10_PGRAPH_CTX_CACHE1, /* 8 values from 0x400160 to 0x40017c */

195 NV10_PGRAPH_CTX_CACHE2, /* 8 values from 0x400180 to 0x40019c */

196 NV10_PGRAPH_CTX_CACHE3, /* 8 values from 0x4001a0 to 0x4001bc */

197 NV10_PGRAPH_CTX_CACHE4, /* 8 values from 0x4001c0 to 0x4001dc */

198 NV10_PGRAPH_CTX_CACHE5, /* 8 values from 0x4001e0 to 0x4001fc */

199 0x00400164,

200 0x00400184,

201 0x004001a4,

202 0x004001c4,

203 0x004001e4,

204 0x00400168,

205 0x00400188,

206 0x004001a8,

207 0x004001c8,

208 0x004001e8,

209 0x0040016c,

210 0x0040018c,

211 0x004001ac,

212 0x004001cc,

213 0x004001ec,

214 0x00400170,

215 0x00400190,

216 0x004001b0,

217 0x004001d0,

218 0x004001f0,

219 0x00400174,

220 0x00400194,

221 0x004001b4,

222 0x004001d4,

223 0x004001f4,

224 0x00400178,

225 0x00400198,

226 0x004001b8,

227 0x004001d8,

228 0x004001f8,

229 0x0040017c,

230 0x0040019c,

231 0x004001bc,

232 0x004001dc,

233 0x004001fc,

234 NV10_PGRAPH_CTX_USER,

235 NV04_PGRAPH_DMA_START_0,

236 NV04_PGRAPH_DMA_START_1,

237 NV04_PGRAPH_DMA_LENGTH,

238 NV04_PGRAPH_DMA_MISC,

239 NV10_PGRAPH_DMA_PITCH,

240 NV04_PGRAPH_BOFFSET0,

241 NV04_PGRAPH_BBASE0,

242 NV04_PGRAPH_BLIMIT0,

243 NV04_PGRAPH_BOFFSET1,

244 NV04_PGRAPH_BBASE1,

245 NV04_PGRAPH_BLIMIT1,

246 NV04_PGRAPH_BOFFSET2,

247 NV04_PGRAPH_BBASE2,

248 NV04_PGRAPH_BLIMIT2,

249 NV04_PGRAPH_BOFFSET3,

250 NV04_PGRAPH_BBASE3,

251 NV04_PGRAPH_BLIMIT3,

252 NV04_PGRAPH_BOFFSET4,

253 NV04_PGRAPH_BBASE4,

254 NV04_PGRAPH_BLIMIT4,

255 NV04_PGRAPH_BOFFSET5,

256 NV04_PGRAPH_BBASE5,

257 NV04_PGRAPH_BLIMIT5,

258 NV04_PGRAPH_BPITCH0,

259 NV04_PGRAPH_BPITCH1,

260 NV04_PGRAPH_BPITCH2,

261 NV04_PGRAPH_BPITCH3,

262 NV04_PGRAPH_BPITCH4,

263 NV10_PGRAPH_SURFACE,

264 NV10_PGRAPH_STATE,

265 NV04_PGRAPH_BSWIZZLE2,

266 NV04_PGRAPH_BSWIZZLE5,

267 NV04_PGRAPH_BPIXEL,

268 NV10_PGRAPH_NOTIFY,

269 NV04_PGRAPH_PATT_COLOR0,

270 NV04_PGRAPH_PATT_COLOR1,

271 NV04_PGRAPH_PATT_COLORRAM, /* 64 values from 0x400900 to 0x4009fc */

272 0x00400904,

273 0x00400908,

274 0x0040090c,

275 0x00400910,

276 0x00400914,

277 0x00400918,

278 0x0040091c,

279 0x00400920,

280 0x00400924,

281 0x00400928,

282 0x0040092c,

283 0x00400930,

284 0x00400934,

285 0x00400938,

286 0x0040093c,

287 0x00400940,

288 0x00400944,

289 0x00400948,

290 0x0040094c,

291 0x00400950,

292 0x00400954,

293 0x00400958,

294 0x0040095c,

295 0x00400960,

296 0x00400964,

297 0x00400968,

298 0x0040096c,

299 0x00400970,

300 0x00400974,

301 0x00400978,

302 0x0040097c,

303 0x00400980,

304 0x00400984,

305 0x00400988,

306 0x0040098c,

307 0x00400990,

308 0x00400994,

309 0x00400998,

310 0x0040099c,

311 0x004009a0,

312 0x004009a4,

313 0x004009a8,

314 0x004009ac,

315 0x004009b0,

316 0x004009b4,

317 0x004009b8,

318 0x004009bc,

319 0x004009c0,

320 0x004009c4,

321 0x004009c8,

322 0x004009cc,

323 0x004009d0,

324 0x004009d4,

325 0x004009d8,

326 0x004009dc,

327 0x004009e0,

328 0x004009e4,

329 0x004009e8,

330 0x004009ec,

331 0x004009f0,

332 0x004009f4,

333 0x004009f8,

334 0x004009fc,

335 NV04_PGRAPH_PATTERN, /* 2 values from 0x400808 to 0x40080c */

336 0x0040080c,

337 NV04_PGRAPH_PATTERN_SHAPE,

338 NV03_PGRAPH_MONO_COLOR0,

339 NV04_PGRAPH_ROP3,

340 NV04_PGRAPH_CHROMA,

341 NV04_PGRAPH_BETA_AND,

342 NV04_PGRAPH_BETA_PREMULT,

343 0x00400e70,

344 0x00400e74,

345 0x00400e78,

346 0x00400e7c,

347 0x00400e80,

348 0x00400e84,

349 0x00400e88,

350 0x00400e8c,

351 0x00400ea0,

352 0x00400ea4,

353 0x00400ea8,

354 0x00400e90,

355 0x00400e94,

356 0x00400e98,

357 0x00400e9c,

358 NV10_PGRAPH_WINDOWCLIP_HORIZONTAL, /* 8 values from 0x400f00 to 0x400f1c */

359 NV10_PGRAPH_WINDOWCLIP_VERTICAL, /* 8 values from 0x400f20 to 0x400f3c */

360 0x00400f04,

361 0x00400f24,

362 0x00400f08,

363 0x00400f28,

364 0x00400f0c,

365 0x00400f2c,

366 0x00400f10,

367 0x00400f30,

368 0x00400f14,

369 0x00400f34,

370 0x00400f18,

371 0x00400f38,

372 0x00400f1c,

373 0x00400f3c,

374 NV10_PGRAPH_XFMODE0,

375 NV10_PGRAPH_XFMODE1,

376 NV10_PGRAPH_GLOBALSTATE0,

377 NV10_PGRAPH_GLOBALSTATE1,

378 NV04_PGRAPH_STORED_FMT,

379 NV04_PGRAPH_SOURCE_COLOR,

380 NV03_PGRAPH_ABS_X_RAM, /* 32 values from 0x400400 to 0x40047c */

381 NV03_PGRAPH_ABS_Y_RAM, /* 32 values from 0x400480 to 0x4004fc */

382 0x00400404,

383 0x00400484,

384 0x00400408,

385 0x00400488,

386 0x0040040c,

387 0x0040048c,

388 0x00400410,

389 0x00400490,

390 0x00400414,

391 0x00400494,

392 0x00400418,

393 0x00400498,

394 0x0040041c,

395 0x0040049c,

396 0x00400420,

397 0x004004a0,

398 0x00400424,

399 0x004004a4,

400 0x00400428,

401 0x004004a8,

402 0x0040042c,

403 0x004004ac,

404 0x00400430,

405 0x004004b0,

406 0x00400434,

407 0x004004b4,

408 0x00400438,

409 0x004004b8,

410 0x0040043c,

411 0x004004bc,

412 0x00400440,

413 0x004004c0,

414 0x00400444,

415 0x004004c4,

416 0x00400448,

417 0x004004c8,

418 0x0040044c,

419 0x004004cc,

420 0x00400450,

421 0x004004d0,

422 0x00400454,

423 0x004004d4,

424 0x00400458,

425 0x004004d8,

426 0x0040045c,

427 0x004004dc,

428 0x00400460,

429 0x004004e0,

430 0x00400464,

431 0x004004e4,

432 0x00400468,

433 0x004004e8,

434 0x0040046c,

435 0x004004ec,

436 0x00400470,

437 0x004004f0,

438 0x00400474,

439 0x004004f4,

440 0x00400478,

441 0x004004f8,

442 0x0040047c,

443 0x004004fc,

444 NV03_PGRAPH_ABS_UCLIP_XMIN,

445 NV03_PGRAPH_ABS_UCLIP_XMAX,

446 NV03_PGRAPH_ABS_UCLIP_YMIN,

447 NV03_PGRAPH_ABS_UCLIP_YMAX,

448 0x00400550,

449 0x00400558,

450 0x00400554,

451 0x0040055c,

452 NV03_PGRAPH_ABS_UCLIPA_XMIN,

453 NV03_PGRAPH_ABS_UCLIPA_XMAX,

454 NV03_PGRAPH_ABS_UCLIPA_YMIN,

455 NV03_PGRAPH_ABS_UCLIPA_YMAX,

456 NV03_PGRAPH_ABS_ICLIP_XMAX,

457 NV03_PGRAPH_ABS_ICLIP_YMAX,

458 NV03_PGRAPH_XY_LOGIC_MISC1,

459 NV03_PGRAPH_XY_LOGIC_MISC2,

460 NV03_PGRAPH_XY_LOGIC_MISC3,

461 NV03_PGRAPH_CLIPX_0,

462 NV03_PGRAPH_CLIPX_1,

463 NV03_PGRAPH_CLIPY_0,

464 NV03_PGRAPH_CLIPY_1,

465 0x00400e40,

466 0x00400e44,

467 0x00400e48,

468 0x00400e4c,

469 0x00400e50,

470 0x00400e54,

471 0x00400e58,

472 0x00400e5c,

473 0x00400e60,

474 0x00400e64,

475 0x00400e68,

476 0x00400e6c,

477 0x00400e00,

478 0x00400e04,

479 0x00400e08,

480 0x00400e0c,

481 0x00400e10,

482 0x00400e14,

483 0x00400e18,

484 0x00400e1c,

485 0x00400e20,

486 0x00400e24,

487 0x00400e28,

488 0x00400e2c,

489 0x00400e30,

490 0x00400e34,

491 0x00400e38,

492 0x00400e3c,

493 NV04_PGRAPH_PASSTHRU_0,

494 NV04_PGRAPH_PASSTHRU_1,

495 NV04_PGRAPH_PASSTHRU_2,

496 NV10_PGRAPH_DIMX_TEXTURE,

497 NV10_PGRAPH_WDIMX_TEXTURE,

498 NV10_PGRAPH_DVD_COLORFMT,

499 NV10_PGRAPH_SCALED_FORMAT,

500 NV04_PGRAPH_MISC24_0,

501 NV04_PGRAPH_MISC24_1,

502 NV04_PGRAPH_MISC24_2,

503 NV03_PGRAPH_X_MISC,

504 NV03_PGRAPH_Y_MISC,

505 NV04_PGRAPH_VALID1,

506 NV04_PGRAPH_VALID2,

507 };

508

509 static int nv17_graph_ctx_regs [] = {

510 NV10_PGRAPH_DEBUG_4,

511 0x004006b0,

512 0x00400eac,

513 0x00400eb0,

514 0x00400eb4,

515 0x00400eb8,

516 0x00400ebc,

517 0x00400ec0,

518 0x00400ec4,

519 0x00400ec8,

520 0x00400ecc,

521 0x00400ed0,

522 0x00400ed4,

523 0x00400ed8,

524 0x00400edc,

525 0x00400ee0,

526 0x00400a00,

527 0x00400a04,

528 };

529

530 void nouveau_nv10_context_switch(drm_device_t *dev)

531 {

532 drm_nouveau_private_t *dev_priv = dev->dev_private;

533 int channel, channel_old, i, j;

534

535 channel=NV_READ(NV03_PFIFO_CACHE1_PUSH1)&(nouveau_fifo_number(dev)-1);

536 channel_old = (NV_READ(NV10_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1);

537

538 DRM_INFO("NV: PGRAPH context switch interrupt channel %x -> %x\n",channel_old, channel);

539

540 NV_WRITE(NV04_PGRAPH_FIFO,0x0);

541 #if 0

542 NV_WRITE(NV_PFIFO_CACH1_PUL0, 0x00000000);

543 NV_WRITE(NV_PFIFO_CACH1_PUL1, 0x00000000);

544 NV_WRITE(NV_PFIFO_CACHES, 0x00000000);

545 #endif

546

547 // save PGRAPH context

548 for (i = 0; i < sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0]); i++)

549 dev_priv->fifos[channel_old].pgraph_ctx[i] = NV_READ(nv10_graph_ctx_regs[i]);

550 if (dev_priv->chipset>=0x17) {

551 for (j = 0; j < sizeof(nv17_graph_ctx_regs)/sizeof(nv17_graph_ctx_regs[0]); i++,j++)

552 dev_priv->fifos[channel_old].pgraph_ctx[i] = NV_READ(nv17_graph_ctx_regs[j]);

553 }

554

555 nouveau_wait_for_idle(dev);

556

557 NV_WRITE(NV03_PGRAPH_CTX_CONTROL, 0x10000000);

558 NV_WRITE(NV10_PGRAPH_CTX_USER, (NV_READ(NV10_PGRAPH_CTX_USER) & 0xffffff) | (0x1f << 24));

559

560 nouveau_wait_for_idle(dev);

561 // restore PGRAPH context

562 //XXX not working yet

563 #if 1

564 for (i = 0; i < sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0]); i++)

565 NV_WRITE(nv10_graph_ctx_regs[i], dev_priv->fifos[channel].pgraph_ctx[i]);

566 if (dev_priv->chipset>=0x17) {

567 for (j = 0; j < sizeof(nv17_graph_ctx_regs)/sizeof(nv17_graph_ctx_regs[0]); i++,j++)

568 NV_WRITE(nv17_graph_ctx_regs[j], dev_priv->fifos[channel].pgraph_ctx[i]);

569 }

570 nouveau_wait_for_idle(dev);

571 #endif

572

573 NV_WRITE(NV03_PGRAPH_CTX_CONTROL, 0x10010100);

574 NV_WRITE(NV10_PGRAPH_CTX_USER, channel << 24);

575 NV_WRITE(NV10_PGRAPH_FFINTFC_ST2, NV_READ(NV10_PGRAPH_FFINTFC_ST2)&0xCFFFFFFF);

576

577 #if 0

578 NV_WRITE(NV_PFIFO_CACH1_PUL0, 0x00000001);

579 NV_WRITE(NV_PFIFO_CACH1_PUL1, 0x00000001);

580 NV_WRITE(NV_PFIFO_CACHES, 0x00000001);

581 #endif

582 NV_WRITE(NV04_PGRAPH_FIFO,0x1);

583 }

584

585 int nv10_graph_context_create(drm_device_t *dev, int channel) {

586 drm_nouveau_private_t *dev_priv = dev->dev_private;

587 DRM_DEBUG("nv10_graph_context_create %d\n", channel);

588

589 memset(dev_priv->fifos[channel].pgraph_ctx, 0, sizeof(dev_priv->fifos[channel].pgraph_ctx));

590

591 //dev_priv->fifos[channel].pgraph_ctx_user = channel << 24;

592 dev_priv->fifos[channel].pgraph_ctx[0] = 0x0001ffff;

593 /* is it really needed ??? */

594 if (dev_priv->chipset>=0x17) {

595 dev_priv->fifos[channel].pgraph_ctx[sizeof(nv10_graph_ctx_regs) + 0] = NV_READ(NV10_PGRAPH_DEBUG_4);

596 dev_priv->fifos[channel].pgraph_ctx[sizeof(nv10_graph_ctx_regs) + 1] = NV_READ(0x004006b0);

597 }

598

599

600 //XXX should be saved/restored for each fifo

601 //we supposed here we have X fifo and only one 3D fifo.

602 nv10_praph_pipe(dev);

603 return 0;

604 }

605

606

607 int nv10_graph_init(drm_device_t *dev) {

608 return 0;

609 }