3 * Copyright 2004 BEAM Ltd.
4 * Copyright 2002 Tungsten Graphics, Inc.
5 * Copyright 2005 Thomas Hellstrom.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * BEAM LTD, TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26 * DEALINGS IN THE SOFTWARE.
29 * Terry Barnaby <terry1@beam.ltd.uk>
30 * Keith Whitwell <keith@tungstengraphics.com>
31 * Thomas Hellstrom <unichrome@shipmail.org>
33 * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank
34 * interrupt, as well as an infrastructure to handle other interrupts of the chip.
35 * The refresh rate is also calculated for video playback sync purposes.
43 #define VIA_REG_INTERRUPT 0x200
45 /* VIA_REG_INTERRUPT */
46 #define VIA_IRQ_GLOBAL (1 << 31)
47 #define VIA_IRQ_VBLANK_ENABLE (1 << 19)
48 #define VIA_IRQ_VBLANK_PENDING (1 << 3)
49 #define VIA_IRQ_HQV0_ENABLE (1 << 11)
50 #define VIA_IRQ_HQV1_ENABLE (1 << 25)
51 #define VIA_IRQ_HQV0_PENDING (1 << 9)
52 #define VIA_IRQ_HQV1_PENDING (1 << 10)
53 #define VIA_IRQ_DMA0_DD_ENABLE (1 << 20)
54 #define VIA_IRQ_DMA0_TD_ENABLE (1 << 21)
55 #define VIA_IRQ_DMA1_DD_ENABLE (1 << 22)
56 #define VIA_IRQ_DMA1_TD_ENABLE (1 << 23)
57 #define VIA_IRQ_DMA0_DD_PENDING (1 << 4)
58 #define VIA_IRQ_DMA0_TD_PENDING (1 << 5)
59 #define VIA_IRQ_DMA1_DD_PENDING (1 << 6)
60 #define VIA_IRQ_DMA1_TD_PENDING (1 << 7)
64 * Device-specific IRQs go here. This type might need to be extended with
65 * the register if there are multiple IRQ control registers.
66 * Currently we activate the HQV interrupts of Unichrome Pro group A.
69 static maskarray_t via_pro_group_a_irqs[] = {
70 {VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010,
72 {VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010,
74 {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0,
75 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
76 {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
77 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
79 static int via_num_pro_group_a =
80 sizeof(via_pro_group_a_irqs)/sizeof(maskarray_t);
81 static int via_irqmap_pro_group_a[] = {0, 1, -1, 2, -1, 3};
83 static maskarray_t via_unichrome_irqs[] = {
84 {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0,
85 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
86 {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
87 VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}
89 static int via_num_unichrome = sizeof(via_unichrome_irqs)/sizeof(maskarray_t);
90 static int via_irqmap_unichrome[] = {-1, -1, -1, 0, -1, 1};
93 static unsigned time_diff(struct timeval *now,struct timeval *then)
95 return (now->tv_usec >= then->tv_usec) ?
96 now->tv_usec - then->tv_usec :
97 1000000 - (then->tv_usec - now->tv_usec);
100 irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
102 struct drm_device *dev = (struct drm_device *) arg;
103 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
106 struct timeval cur_vblank;
107 drm_via_irq_t *cur_irq = dev_priv->via_irqs;
110 status = VIA_READ(VIA_REG_INTERRUPT);
111 if (status & VIA_IRQ_VBLANK_PENDING) {
112 atomic_inc(&dev->vbl_received);
113 if (!(atomic_read(&dev->vbl_received) & 0x0F)) {
115 do_gettimeofday(&cur_vblank);
117 microtime(&cur_vblank);
119 if (dev_priv->last_vblank_valid) {
120 dev_priv->usec_per_vblank =
121 time_diff(&cur_vblank,
122 &dev_priv->last_vblank) >> 4;
124 dev_priv->last_vblank = cur_vblank;
125 dev_priv->last_vblank_valid = 1;
127 if (!(atomic_read(&dev->vbl_received) & 0xFF)) {
128 DRM_DEBUG("US per vblank is: %u\n",
129 dev_priv->usec_per_vblank);
131 DRM_WAKEUP(&dev->vbl_queue);
132 drm_vbl_send_signals(dev);
136 for (i=0; i<dev_priv->num_irqs; ++i) {
137 if (status & cur_irq->pending_mask) {
138 atomic_inc( &cur_irq->irq_received );
139 DRM_WAKEUP( &cur_irq->irq_queue );
141 #ifdef VIA_HAVE_DMABLIT
142 if (dev_priv->irq_map[drm_via_irq_dma0_td] == i) {
143 via_dmablit_handler(dev, 0, 1);
144 } else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i) {
145 via_dmablit_handler(dev, 1, 1);
152 /* Acknowlege interrupts */
153 VIA_WRITE(VIA_REG_INTERRUPT, status);
162 static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv)
167 /* Acknowlege interrupts */
168 status = VIA_READ(VIA_REG_INTERRUPT);
169 VIA_WRITE(VIA_REG_INTERRUPT, status |
170 dev_priv->irq_pending_mask);
174 int via_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence)
176 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
177 unsigned int cur_vblank;
180 DRM_DEBUG("viadrv_vblank_wait\n");
182 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
186 viadrv_acknowledge_irqs(dev_priv);
188 /* Assume that the user has missed the current sequence number
189 * by about a day rather than she wants to wait for years
190 * using vertical blanks...
193 DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
194 (((cur_vblank = atomic_read(&dev->vbl_received)) -
195 *sequence) <= (1 << 23)));
197 *sequence = cur_vblank;
202 via_driver_irq_wait(struct drm_device * dev, unsigned int irq, int force_sequence,
203 unsigned int *sequence)
205 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
206 unsigned int cur_irq_sequence;
207 drm_via_irq_t *cur_irq;
212 DRM_DEBUG("%s\n", __FUNCTION__);
215 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
219 if (irq >= drm_via_irq_num ) {
220 DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__,
225 real_irq = dev_priv->irq_map[irq];
228 DRM_ERROR("%s Video IRQ %d not available on this hardware.\n",
233 masks = dev_priv->irq_masks;
234 cur_irq = dev_priv->via_irqs + real_irq;
236 if (masks[real_irq][2] && !force_sequence) {
237 DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
238 ((VIA_READ(masks[irq][2]) & masks[irq][3]) ==
240 cur_irq_sequence = atomic_read(&cur_irq->irq_received);
242 DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
243 (((cur_irq_sequence =
244 atomic_read(&cur_irq->irq_received)) -
245 *sequence) <= (1 << 23)));
247 *sequence = cur_irq_sequence;
256 void via_driver_irq_preinstall(struct drm_device * dev)
258 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
260 drm_via_irq_t *cur_irq;
263 DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv);
265 cur_irq = dev_priv->via_irqs;
267 dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE;
268 dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING;
270 if (dev_priv->chipset == VIA_PRO_GROUP_A ||
271 dev_priv->chipset == VIA_DX9_0) {
272 dev_priv->irq_masks = via_pro_group_a_irqs;
273 dev_priv->num_irqs = via_num_pro_group_a;
274 dev_priv->irq_map = via_irqmap_pro_group_a;
276 dev_priv->irq_masks = via_unichrome_irqs;
277 dev_priv->num_irqs = via_num_unichrome;
278 dev_priv->irq_map = via_irqmap_unichrome;
281 for(i=0; i < dev_priv->num_irqs; ++i) {
282 atomic_set(&cur_irq->irq_received, 0);
283 cur_irq->enable_mask = dev_priv->irq_masks[i][0];
284 cur_irq->pending_mask = dev_priv->irq_masks[i][1];
285 DRM_INIT_WAITQUEUE( &cur_irq->irq_queue );
286 dev_priv->irq_enable_mask |= cur_irq->enable_mask;
287 dev_priv->irq_pending_mask |= cur_irq->pending_mask;
290 DRM_DEBUG("Initializing IRQ %d\n", i);
293 dev_priv->last_vblank_valid = 0;
295 /* Clear VSync interrupt regs */
296 status = VIA_READ(VIA_REG_INTERRUPT);
297 VIA_WRITE(VIA_REG_INTERRUPT, status &
298 ~(dev_priv->irq_enable_mask));
300 /* Clear bits if they're already high */
301 viadrv_acknowledge_irqs(dev_priv);
305 void via_driver_irq_postinstall(struct drm_device * dev)
307 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
310 DRM_DEBUG("via_driver_irq_postinstall\n");
312 status = VIA_READ(VIA_REG_INTERRUPT);
313 VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL
314 | dev_priv->irq_enable_mask);
316 /* Some magic, oh for some data sheets ! */
318 VIA_WRITE8(0x83d4, 0x11);
319 VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);
324 void via_driver_irq_uninstall(struct drm_device * dev)
326 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
329 DRM_DEBUG("driver_irq_uninstall)\n");
332 /* Some more magic, oh for some data sheets ! */
334 VIA_WRITE8(0x83d4, 0x11);
335 VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
337 status = VIA_READ(VIA_REG_INTERRUPT);
338 VIA_WRITE(VIA_REG_INTERRUPT, status &
339 ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask));
343 int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv)
345 drm_via_irqwait_t *irqwait = data;
348 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
349 drm_via_irq_t *cur_irq = dev_priv->via_irqs;
355 if (irqwait->request.irq >= dev_priv->num_irqs) {
356 DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__,
357 irqwait->request.irq);
361 cur_irq += irqwait->request.irq;
363 switch (irqwait->request.type & ~VIA_IRQ_FLAGS_MASK) {
364 case VIA_IRQ_RELATIVE:
365 irqwait->request.sequence +=
366 atomic_read(&cur_irq->irq_received);
367 irqwait->request.type &= ~_DRM_VBLANK_RELATIVE;
368 case VIA_IRQ_ABSOLUTE:
374 if (irqwait->request.type & VIA_IRQ_SIGNAL) {
375 DRM_ERROR("%s Signals on Via IRQs not implemented yet.\n",
380 force_sequence = (irqwait->request.type & VIA_IRQ_FORCE_SEQUENCE);
382 ret = via_driver_irq_wait(dev, irqwait->request.irq, force_sequence,
383 &irqwait->request.sequence);
385 do_gettimeofday(&now);
389 irqwait->reply.tval_sec = now.tv_sec;
390 irqwait->reply.tval_usec = now.tv_usec;