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PCI: cadence: Use AXI region 0 to signal interrupts from EP
authorAlan Douglas <adouglas@cadence.com>
Thu, 11 Oct 2018 16:15:43 +0000 (17:15 +0100)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Fri, 12 Oct 2018 11:09:04 +0000 (12:09 +0100)
commit0652d4b6b56f73c81abbdbc7e26f772cb2dfe370
tree5d3abbaab28f17e1d3dd656789591386a1c67395
parentaa77e55d48124d0d78456eabf872fffb5decdbe1
PCI: cadence: Use AXI region 0 to signal interrupts from EP

The IRQ physical address is allocated from region 0, rather than
the highest region. Update the driver to reserve this region in
the bitmap and to use region 0 for all types of interrupt.

This corrects a problem which prevents the interrupt being
signalled correctly if using the first address in the AXI region,
since an offset of zero will always be mapped to region 0.

Fixes: 37dddf14f1ae ("PCI: cadence: Add EndPoint Controller driver for Cadence PCIe controller")
Signed-off-by: Alan Douglas <adouglas@cadence.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
drivers/pci/controller/pcie-cadence-ep.c