bus: ti-sysc: Enable all clocks directly during init to read revision

bus: ti-sysc: Enable all clocks directly during init to read revision

The first thing we want to do is just read the module revision register to
be able to configure the module specific quirks and configure the module
registers.

As the interconnect target module may not yet be properly configured and
may need a reset first, we don't want to use pm_runtime_get() at this
point.

To read the revision register, let's just enable the all the clocks for
the interconnect target module during init even if the optional clocks
are not needed. That way we can read the revision register to configure
the quirks needed for PM runtime.

Signed-off-by: Tony Lindgren <tony@atomide.com>