git.osdn.net Git - qmiga/qemu.git/commit

author	Rui Wang <wangrui@loongson.cn>
	Fri, 4 Nov 2022 04:05:17 +0000 (12:05 +0800)
committer	Song Gao <gaosong@loongson.cn>
	Fri, 4 Nov 2022 09:10:53 +0000 (17:10 +0800)
commit	2419978cb09e11bc53a07d4de5621424d2a6a86d
tree	4eb072b4509af7c1f61b8aa57188c61d42441324	tree \| snapshot
parent	b4bda2006f482f778d9dbf86038ff115fe89db92	commit \| diff

target/loongarch: Fix emulation of float-point disable exception

We need to emulate it to generate a floating point disable exception
when CSR.EUEN.FPE is zero.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Rui Wang <wangrui@loongson.cn>
Message-Id: <20221104040517.222059-3-wangrui@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>

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target/loongarch/cpu.c		diff \| blob \| history
target/loongarch/cpu.h		diff \| blob \| history
target/loongarch/insn_trans/trans_farith.c.inc		diff \| blob \| history
target/loongarch/insn_trans/trans_fcmp.c.inc		diff \| blob \| history
target/loongarch/insn_trans/trans_fmemory.c.inc		diff \| blob \| history
target/loongarch/insn_trans/trans_fmov.c.inc		diff \| blob \| history