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cxl/pci: Add (hopeful) error handling support
authorDan Williams <dan.j.williams@intel.com>
Tue, 29 Nov 2022 17:48:59 +0000 (10:48 -0700)
committerDan Williams <dan.j.williams@intel.com>
Sat, 3 Dec 2022 21:40:17 +0000 (13:40 -0800)
commit2905cb5236cba63a5dc8a83752dcc31f3cc819f9
tree7b5cd1bb0118b896d04813feef85e2f8692438ff
parent2f6e9c305127f8dea4e2d697b4bdd33e126ccbf7
cxl/pci: Add (hopeful) error handling support

Add nominal error handling that tears down CXL.mem in response to error
notifications that imply a device reset. Given some CXL.mem may be
operating as System RAM, there is a high likelihood that these error
events are fatal. However, if the system survives the notification the
expectation is that the driver behavior is equivalent to a hot-unplug
and re-plug of an endpoint.

Note that this does not change the mask values from the default. That
awaits CXL _OSC support to determine whether platform firmware is in
control of the mask registers.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/166974413966.1608150.15522782911404473932.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/core/memdev.c
drivers/cxl/cxl.h
drivers/cxl/cxlmem.h
drivers/cxl/pci.c