OSDN Git Service

x86/entry: Add kernel IBRS implementation
authorPeter Zijlstra <peterz@infradead.org>
Tue, 14 Jun 2022 21:15:53 +0000 (23:15 +0200)
committerBorislav Petkov <bp@suse.de>
Mon, 27 Jun 2022 08:33:59 +0000 (10:33 +0200)
commit2dbb887e875b1de3ca8f40ddf26bcfe55798c609
tree1f56e999ec2820a42d3020e89ebf0b489d34fdf8
parentcaa0ff24d5d0e02abce5e65c3d2b7f20a6617be5
x86/entry: Add kernel IBRS implementation

Implement Kernel IBRS - currently the only known option to mitigate RSB
underflow speculation issues on Skylake hardware.

Note: since IBRS_ENTER requires fuller context established than
UNTRAIN_RET, it must be placed after it. However, since UNTRAIN_RET
itself implies a RET, it must come after IBRS_ENTER. This means
IBRS_ENTER needs to also move UNTRAIN_RET.

Note 2: KERNEL_IBRS is sub-optimal for XenPV.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
arch/x86/entry/calling.h
arch/x86/entry/entry_64.S
arch/x86/entry/entry_64_compat.S
arch/x86/include/asm/cpufeatures.h