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(parent: bda921f) | patch
clk: mediatek: add clock support for MT7622 SoC
authorSean Wang <sean.wang@mediatek.com>
Thu, 5 Oct 2017 03:50:24 +0000 (11:50 +0800)
committerStephen Boyd <sboyd@codeaurora.org>
Thu, 2 Nov 2017 08:10:12 +0000 (01:10 -0700)
commit2fc0a509e4ee858a450f28a4efb430835004dd70
tree2030b145fe76a8684ba701fc449ddae56844113ctree | snapshot
parentbda921fad518b4d5d2249d41432025ce5b368173commit | diff
clk: mediatek: add clock support for MT7622 SoC

Add all supported clocks exported from every susbystem found on MT7622 SoC
such as topckgen, apmixedsys, infracfg, pericfg , pciessys, ssusbsys,
ethsys and audsys.

Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/mediatek/Kconfig diff | blob | history
drivers/clk/mediatek/Makefile diff | blob | history
drivers/clk/mediatek/clk-mt7622-aud.c [new file with mode: 0644] blob
drivers/clk/mediatek/clk-mt7622-eth.c [new file with mode: 0644] blob
drivers/clk/mediatek/clk-mt7622-hif.c [new file with mode: 0644] blob
drivers/clk/mediatek/clk-mt7622.c [new file with mode: 0644] blob
kernel
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