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cxl: Add support for POWER9 DD2
authorChristophe Lombard <clombard@linux.vnet.ibm.com>
Fri, 8 Sep 2017 13:52:11 +0000 (15:52 +0200)
committerMichael Ellerman <mpe@ellerman.id.au>
Fri, 6 Oct 2017 09:52:43 +0000 (20:52 +1100)
commit5632874311dbf432c698fcbe0cf7a49e01ebf324
tree96c7cc161ab97e3c4ffca3ab7df108291ab85487
parent4ca360f3dbf2036d964cdf3a6c4a45a81fdf8e18
cxl: Add support for POWER9 DD2

The PSL initialization sequence has been updated to DD2.
This patch adapts to the changes, retaining compatibility with DD1.
The patch includes some changes to DD1 fix-ups as well.

Tests performed on some of the old/new hardware.

The function is_page_fault(), for POWER9, lists the Translation Checkout
Responses where the page fault will be handled by copro_handle_mm_fault().
This list is too restrictive and not necessary.

This patches removes this restriction and all page faults, whatever the
reason, will be handled. In this case, the interruption is always
acknowledged.

The following features will be added soon:
- phb reset when switching to capi mode.
- cxllib update to support new functions.

Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Reviewed-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
drivers/misc/cxl/cxl.h
drivers/misc/cxl/fault.c
drivers/misc/cxl/pci.c