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drm/i915/gen11: Wa_1408615072/Wa_1407596294 should be on GT list
authorMatt Roper <matthew.d.roper@intel.com>
Wed, 1 Feb 2023 22:28:29 +0000 (14:28 -0800)
committerMatt Roper <matthew.d.roper@intel.com>
Wed, 8 Feb 2023 17:40:59 +0000 (09:40 -0800)
commit5f21dc07b52eb54a908e66f5d6e05a87bcb5b049
treef481a2bc969427899217211ed10702eb734c2712
parent4039e44237e8ebb06f0e4af549fbedf7c41df9db
drm/i915/gen11: Wa_1408615072/Wa_1407596294 should be on GT list

The UNSLICE_UNIT_LEVEL_CLKGATE register programmed by this workaround
has 'BUS' style reset, indicating that it does not lose its value on
engine resets.  Furthermore, this register is part of the GT forcewake
domain rather than the RENDER domain, so it should not be impacted by
RCS engine resets.  As such, we should implement this on the GT
workaround list rather than an engine list.

Bspec: 19219
Fixes: 3551ff928744 ("drm/i915/gen11: Moving WAs to rcs_engine_wa_init()")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230201222831.608281-2-matthew.d.roper@intel.com
drivers/gpu/drm/i915/gt/intel_workarounds.c