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MIPS: Loongson: Add CFUCFG&CSR support
authorHuacai Chen <chenhc@lemote.com>
Sat, 21 Sep 2019 13:50:26 +0000 (21:50 +0800)
committerPaul Burton <paul.burton@mips.com>
Mon, 7 Oct 2019 16:45:19 +0000 (09:45 -0700)
commit6a6f9b7dafd50efc1b243fb25c3766ebc78adc7b
tree6819d792d24b17ba5ed25850e7aa041664cb4aa2
parent397dc00e249ec64e106374565575dd0eb7e25998
MIPS: Loongson: Add CFUCFG&CSR support

Loongson-3A R4+ (Loongson-3A4000 and newer) has CPUCFG (CPU config) and
CSR (Control and Status Register) extensions. This patch add read/write
functionalities for them.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-mips@linux-mips.org
Cc: linux-mips@vger.kernel.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: Huacai Chen <chenhuacai@gmail.com>
arch/mips/include/asm/mach-loongson64/loongson_regs.h [new file with mode: 0644]