AArch64 SVE register infos and core file support

AArch64 SVE register infos and core file support

Summary:
This patch adds support for AArch64 SVE register infos description and
core file register access.

AArch64 SVE is a an optional extension of Arm v8.3-a architecture. It
has introduced 32 new vector registers Z, 16 predicate P registers and FFR
predicate register. These registers have fixed names but can dynamically
be configured to different size based on underlying OS configuration.

This patch adds register info struct that describes SVE register infos and
also provides RegisterContextPOSIXCore_arm64 routines to access SVE registers.

This patch also introduces a mechanism to configure SVE register sizes and
offsets at startup before exchanging register information across gdb-remote.

TestLinuxCore.py has been updated to include testing of SVE core files.

Reviewers: labath, clayborg, jankratochvil, jasonmolenda, rengolin

Reviewed By: labath

Subscribers: tschuett, kristof.beyls, danielkiss, lldb-commits

Differential Revision: https://reviews.llvm.org/D77047