OSDN Git Service

target/riscv/cpu.c: remove cfg setup from riscv_cpu_init()
authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>
Wed, 17 May 2023 13:57:13 +0000 (10:57 -0300)
committerAlistair Francis <alistair.francis@wdc.com>
Tue, 13 Jun 2023 07:04:44 +0000 (17:04 +1000)
commit7f0bdfb5bfc2b6f1199f8b09e3b6dc9015b7b9c3
tree661a4c7b13bd8f71a71a882b61931c5d69677a14
parente2fa85f42f0bddcfcb2249b1757a9e1a209ae4e3
target/riscv/cpu.c: remove cfg setup from riscv_cpu_init()

We have 4 config settings being done in riscv_cpu_init(): ext_ifencei,
ext_icsr, mmu and pmp. This is also the constructor of the "riscv-cpu"
device, which happens to be the parent device of every RISC-V cpu.

The result is that these 4 configs are being set every time, and every
other CPU should always account for them. CPUs such as sifive_e need to
disable settings that aren't enabled simply because the parent class
happens to be enabling it.

Moving all configurations from the parent class to each CPU will
centralize the config of each CPU into its own init(), which is clearer
than having to account to whatever happens to be set in the parent
device. These settings are also being set in register_cpu_props() when
no 'misa_ext' is set, so for these CPUs we don't need changes. Named
CPUs will receive all cfgs that the parent were setting into their
init().

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230517135714.211809-11-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c