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drm/i915/xehp: Define multicast register ranges
authorMatt Roper <matthew.d.roper@intel.com>
Wed, 14 Jul 2021 03:15:00 +0000 (20:15 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Fri, 23 Jul 2021 17:28:16 +0000 (10:28 -0700)
commitd8905ba705ab526a0979541e39e971173c31de1b
tree1f77ac89f2862c73bc3ad2dd66d4ff598e2d6c72
parent0b03d93fde21d030faf9c4b6c888ad80cfcd0d4b
drm/i915/xehp: Define multicast register ranges

Since we can't steer multicast register reads during ring-based
workaround verification, we need to define the multicast ranges where
failure to steer could potentially cause us to read back from a
fused-off register instance.

As with gen12, we can ignore the multicast ranges that the bspec
describes as 'SQIDI' since all instances of those registers will always
be present and we'll always be able to read back a workaround value that
was written with multicast.

Bspec: 66534
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210714031540.3539704-11-matthew.d.roper@intel.com
drivers/gpu/drm/i915/gt/intel_workarounds.c