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1 /* SPDX-License-Identifier: GPL-2.0 */

4 #ifndef _ICE_H_

5 #define _ICE_H_

7 #include <linux/types.h>

8 #include <linux/errno.h>

9 #include <linux/kernel.h>

10 #include <linux/module.h>

11 #include <linux/firmware.h>

12 #include <linux/netdevice.h>

13 #include <linux/compiler.h>

14 #include <linux/etherdevice.h>

15 #include <linux/skbuff.h>

16 #include <linux/cpumask.h>

17 #include <linux/rtnetlink.h>

18 #include <linux/if_vlan.h>

19 #include <linux/dma-mapping.h>

20 #include <linux/pci.h>

21 #include <linux/workqueue.h>

22 #include <linux/wait.h>

23 #include <linux/aer.h>

24 #include <linux/interrupt.h>

25 #include <linux/ethtool.h>

26 #include <linux/timer.h>

27 #include <linux/delay.h>

28 #include <linux/bitmap.h>

29 #include <linux/log2.h>

30 #include <linux/ip.h>

31 #include <linux/sctp.h>

32 #include <linux/ipv6.h>

33 #include <linux/pkt_sched.h>

34 #include <linux/if_bridge.h>

35 #include <linux/ctype.h>

36 #include <linux/bpf.h>

37 #include <linux/btf.h>

38 #include <linux/auxiliary_bus.h>

39 #include <linux/avf/virtchnl.h>

40 #include <linux/cpu_rmap.h>

41 #include <linux/dim.h>

42 #include <net/pkt_cls.h>

43 #include <net/tc_act/tc_mirred.h>

44 #include <net/tc_act/tc_gact.h>

45 #include <net/ip.h>

46 #include <net/devlink.h>

47 #include <net/ipv6.h>

48 #include <net/xdp_sock.h>

49 #include <net/xdp_sock_drv.h>

50 #include <net/geneve.h>

51 #include <net/gre.h>

52 #include <net/udp_tunnel.h>

53 #include <net/vxlan.h>

54 #if IS_ENABLED(CONFIG_DCB)

55 #include <scsi/iscsi_proto.h>

56 #endif /* CONFIG_DCB */

57 #include "ice_devids.h"

58 #include "ice_type.h"

59 #include "ice_txrx.h"

60 #include "ice_dcb.h"

61 #include "ice_switch.h"

62 #include "ice_common.h"

63 #include "ice_flow.h"

64 #include "ice_sched.h"

65 #include "ice_idc_int.h"

66 #include "ice_virtchnl_pf.h"

67 #include "ice_sriov.h"

68 #include "ice_ptp.h"

69 #include "ice_fdir.h"

70 #include "ice_xsk.h"

71 #include "ice_arfs.h"

72 #include "ice_repr.h"

73 #include "ice_eswitch.h"

74 #include "ice_lag.h"

75 #include "ice_vsi_vlan_ops.h"

76 #include "ice_gnss.h"

78 #define ICE_BAR0 0

79 #define ICE_REQ_DESC_MULTIPLE 32

80 #define ICE_MIN_NUM_DESC 64

81 #define ICE_MAX_NUM_DESC 8160

82 #define ICE_DFLT_MIN_RX_DESC 512

83 #define ICE_DFLT_NUM_TX_DESC 256

84 #define ICE_DFLT_NUM_RX_DESC 2048

86 #define ICE_DFLT_TRAFFIC_CLASS BIT(0)

87 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16)

88 #define ICE_AQ_LEN 192

89 #define ICE_MBXSQ_LEN 64

90 #define ICE_SBQ_LEN 64

91 #define ICE_MIN_LAN_TXRX_MSIX 1

92 #define ICE_MIN_LAN_OICR_MSIX 1

93 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)

94 #define ICE_FDIR_MSIX 2

95 #define ICE_RDMA_NUM_AEQ_MSIX 4

96 #define ICE_MIN_RDMA_MSIX 2

97 #define ICE_ESWITCH_MSIX 1

98 #define ICE_NO_VSI 0xffff

99 #define ICE_VSI_MAP_CONTIG 0

100 #define ICE_VSI_MAP_SCATTER 1

101 #define ICE_MAX_SCATTER_TXQS 16

102 #define ICE_MAX_SCATTER_RXQS 16

103 #define ICE_Q_WAIT_RETRY_LIMIT 10

104 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT)

105 #define ICE_MAX_LG_RSS_QS 256

106 #define ICE_RES_VALID_BIT 0x8000

107 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1)

108 #define ICE_RES_RDMA_VEC_ID (ICE_RES_MISC_VEC_ID - 1)

109 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */

110 #define ICE_RES_VF_CTRL_VEC_ID (ICE_RES_RDMA_VEC_ID - 1)

111 #define ICE_INVAL_Q_INDEX 0xffff

112

113 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */

114

115 #define ICE_CHNL_START_TC 1

116

117 #define ICE_MAX_RESET_WAIT 20

118

119 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4)

120

121 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)

122

123 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)

124

125 #define ICE_UP_TABLE_TRANSLATE(val, i) \

126 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \

127 ICE_AQ_VSI_UP_TABLE_UP##i##_M)

128

129 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))

130 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))

131 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))

132 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))

133

134 /* Minimum BW limit is 500 Kbps for any scheduler node */

135 #define ICE_MIN_BW_LIMIT 500

136 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes.

137 * use it to convert user specified BW limit into Kbps

138 */

139 #define ICE_BW_KBPS_DIVISOR 125

140

141 /* Macro for each VSI in a PF */

142 #define ice_for_each_vsi(pf, i) \

143 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)

144

145 /* Macros for each Tx/Xdp/Rx ring in a VSI */

146 #define ice_for_each_txq(vsi, i) \

147 for ((i) = 0; (i) < (vsi)->num_txq; (i)++)

148

149 #define ice_for_each_xdp_txq(vsi, i) \

150 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++)

151

152 #define ice_for_each_rxq(vsi, i) \

153 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)

154

155 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */

156 #define ice_for_each_alloc_txq(vsi, i) \

157 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)

158

159 #define ice_for_each_alloc_rxq(vsi, i) \

160 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)

161

162 #define ice_for_each_q_vector(vsi, i) \

163 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)

164

165 #define ice_for_each_chnl_tc(i) \

166 for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++)

167

168 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX)

169

170 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \

171 ICE_PROMISC_UCAST_RX | \

172 ICE_PROMISC_VLAN_TX | \

173 ICE_PROMISC_VLAN_RX)

174

175 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)

176

177 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \

178 ICE_PROMISC_MCAST_RX | \

179 ICE_PROMISC_VLAN_TX | \

180 ICE_PROMISC_VLAN_RX)

181

182 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev))

183

184 enum ice_feature {

185 ICE_F_DSCP,

186 ICE_F_SMA_CTRL,

187 ICE_F_GNSS,

188 ICE_F_MAX

189 };

190

191 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key);

192

193 struct ice_channel {

194 struct list_head list;

195 u8 type;

196 u16 sw_id;

197 u16 base_q;

198 u16 num_rxq;

199 u16 num_txq;

200 u16 vsi_num;

201 u8 ena_tc;

202 struct ice_aqc_vsi_props info;

203 u64 max_tx_rate;

204 u64 min_tx_rate;

205 atomic_t num_sb_fltr;

206 struct ice_vsi *ch_vsi;

207 };

208

209 struct ice_txq_meta {

210 u32 q_teid; /* Tx-scheduler element identifier */

211 u16 q_id; /* Entry in VSI's txq_map bitmap */

212 u16 q_handle; /* Relative index of Tx queue within TC */

213 u16 vsi_idx; /* VSI index that Tx queue belongs to */

214 u8 tc; /* TC number that Tx queue belongs to */

215 };

216

217 struct ice_tc_info {

218 u16 qoffset;

219 u16 qcount_tx;

220 u16 qcount_rx;

221 u8 netdev_tc;

222 };

223

224 struct ice_tc_cfg {

225 u8 numtc; /* Total number of enabled TCs */

226 u16 ena_tc; /* Tx map */

227 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];

228 };

229

230 struct ice_res_tracker {

231 u16 num_entries;

232 u16 end;

233 u16 list[];

234 };

235

236 struct ice_qs_cfg {

237 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */

238 unsigned long *pf_map;

239 unsigned long pf_map_size;

240 unsigned int q_count;

241 unsigned int scatter_count;

242 u16 *vsi_map;

243 u16 vsi_map_offset;

244 u8 mapping_mode;

245 };

246

247 struct ice_sw {

248 struct ice_pf *pf;

249 u16 sw_id; /* switch ID for this switch */

250 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */

251 struct ice_vsi *dflt_vsi; /* default VSI for this switch */

252 u8 dflt_vsi_ena:1; /* true if above dflt_vsi is enabled */

253 };

254

255 enum ice_pf_state {

256 ICE_TESTING,

257 ICE_DOWN,

258 ICE_NEEDS_RESTART,

259 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */

260 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */

261 ICE_PFR_REQ, /* set by driver */

262 ICE_CORER_REQ, /* set by driver */

263 ICE_GLOBR_REQ, /* set by driver */

264 ICE_CORER_RECV, /* set by OICR handler */

265 ICE_GLOBR_RECV, /* set by OICR handler */

266 ICE_EMPR_RECV, /* set by OICR handler */

267 ICE_SUSPENDED, /* set on module remove path */

268 ICE_RESET_FAILED, /* set by reset/rebuild */

269 /* When checking for the PF to be in a nominal operating state, the

270 * bits that are grouped at the beginning of the list need to be

271 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will

272 * be checked. If you need to add a bit into consideration for nominal

273 * operating state, it must be added before

274 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position

275 * without appropriate consideration.

276 */

277 ICE_STATE_NOMINAL_CHECK_BITS,

278 ICE_ADMINQ_EVENT_PENDING,

279 ICE_MAILBOXQ_EVENT_PENDING,

280 ICE_SIDEBANDQ_EVENT_PENDING,

281 ICE_MDD_EVENT_PENDING,

282 ICE_VFLR_EVENT_PENDING,

283 ICE_FLTR_OVERFLOW_PROMISC,

284 ICE_VF_DIS,

285 ICE_CFG_BUSY,

286 ICE_SERVICE_SCHED,

287 ICE_SERVICE_DIS,

288 ICE_FD_FLUSH_REQ,

289 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */

290 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */

291 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */

292 ICE_LINK_DEFAULT_OVERRIDE_PENDING,

293 ICE_PHY_INIT_COMPLETE,

294 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */

295 ICE_STATE_NBITS /* must be last */

296 };

297

298 enum ice_vsi_state {

299 ICE_VSI_DOWN,

300 ICE_VSI_NEEDS_RESTART,

301 ICE_VSI_NETDEV_ALLOCD,

302 ICE_VSI_NETDEV_REGISTERED,

303 ICE_VSI_UMAC_FLTR_CHANGED,

304 ICE_VSI_MMAC_FLTR_CHANGED,

305 ICE_VSI_VLAN_FLTR_CHANGED,

306 ICE_VSI_PROMISC_CHANGED,

307 ICE_VSI_STATE_NBITS /* must be last */

308 };

309

310 /* struct that defines a VSI, associated with a dev */

311 struct ice_vsi {

312 struct net_device *netdev;

313 struct ice_sw *vsw; /* switch this VSI is on */

314 struct ice_pf *back; /* back pointer to PF */

315 struct ice_port_info *port_info; /* back pointer to port_info */

316 struct ice_rx_ring **rx_rings; /* Rx ring array */

317 struct ice_tx_ring **tx_rings; /* Tx ring array */

318 struct ice_q_vector **q_vectors; /* q_vector array */

319

320 irqreturn_t (*irq_handler)(int irq, void *data);

321

322 u64 tx_linearize;

323 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS);

324 unsigned int current_netdev_flags;

325 u32 tx_restart;

326 u32 tx_busy;

327 u32 rx_buf_failed;

328 u32 rx_page_failed;

329 u16 num_q_vectors;

330 u16 base_vector; /* IRQ base for OS reserved vectors */

331 enum ice_vsi_type type;

332 u16 vsi_num; /* HW (absolute) index of this VSI */

333 u16 idx; /* software index in pf->vsi[] */

334

335 struct ice_vf *vf; /* VF associated with this VSI */

336

337 u16 ethtype; /* Ethernet protocol for pause frame */

338 u16 num_gfltr;

339 u16 num_bfltr;

340

341 /* RSS config */

342 u16 rss_table_size; /* HW RSS table size */

343 u16 rss_size; /* Allocated RSS queues */

344 u8 *rss_hkey_user; /* User configured hash keys */

345 u8 *rss_lut_user; /* User configured lookup table entries */

346 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */

347

348 /* aRFS members only allocated for the PF VSI */

349 #define ICE_MAX_ARFS_LIST 1024

350 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1)

351 struct hlist_head *arfs_fltr_list;

352 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;

353 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */

354 atomic_t *arfs_last_fltr_id;

355

356 u16 max_frame;

357 u16 rx_buf_len;

358

359 struct ice_aqc_vsi_props info; /* VSI properties */

360

361 /* VSI stats */

362 struct rtnl_link_stats64 net_stats;

363 struct ice_eth_stats eth_stats;

364 struct ice_eth_stats eth_stats_prev;

365

366 struct list_head tmp_sync_list; /* MAC filters to be synced */

367 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */

368

369 u8 irqs_ready:1;

370 u8 current_isup:1; /* Sync 'link up' logging */

371 u8 stat_offsets_loaded:1;

372 struct ice_vsi_vlan_ops inner_vlan_ops;

373 struct ice_vsi_vlan_ops outer_vlan_ops;

374 u16 num_vlan;

375

376 /* queue information */

377 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */

378 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */

379 u16 *txq_map; /* index in pf->avail_txqs */

380 u16 *rxq_map; /* index in pf->avail_rxqs */

381 u16 alloc_txq; /* Allocated Tx queues */

382 u16 num_txq; /* Used Tx queues */

383 u16 alloc_rxq; /* Allocated Rx queues */

384 u16 num_rxq; /* Used Rx queues */

385 u16 req_txq; /* User requested Tx queues */

386 u16 req_rxq; /* User requested Rx queues */

387 u16 num_rx_desc;

388 u16 num_tx_desc;

389 u16 qset_handle[ICE_MAX_TRAFFIC_CLASS];

390 struct ice_tc_cfg tc_cfg;

391 struct bpf_prog *xdp_prog;

392 struct ice_tx_ring **xdp_rings; /* XDP ring array */

393 unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */

394 u16 num_xdp_txq; /* Used XDP queues */

395 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */

396

397 struct net_device **target_netdevs;

398

399 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */

400

401 /* Channel Specific Fields */

402 struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC];

403 u16 cnt_q_avail;

404 u16 next_base_q; /* next queue to be used for channel setup */

405 struct list_head ch_list;

406 u16 num_chnl_rxq;

407 u16 num_chnl_txq;

408 u16 ch_rss_size;

409 u16 num_chnl_fltr;

410 /* store away rss size info before configuring ADQ channels so that,

411 * it can be used after tc-qdisc delete, to get back RSS setting as

412 * they were before

413 */

414 u16 orig_rss_size;

415 /* this keeps tracks of all enabled TC with and without DCB

416 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue

417 * information

418 */

419 u8 all_numtc;

420 u16 all_enatc;

421

422 /* store away TC info, to be used for rebuild logic */

423 u8 old_numtc;

424 u16 old_ena_tc;

425

426 struct ice_channel *ch;

427

428 /* setup back reference, to which aggregator node this VSI

429 * corresponds to

430 */

431 struct ice_agg_node *agg_node;

432 } ____cacheline_internodealigned_in_smp;

433

434 /* struct that defines an interrupt vector */

435 struct ice_q_vector {

436 struct ice_vsi *vsi;

437

438 u16 v_idx; /* index in the vsi->q_vector array. */

439 u16 reg_idx;

440 u8 num_ring_rx; /* total number of Rx rings in vector */

441 u8 num_ring_tx; /* total number of Tx rings in vector */

442 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */

443 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this

444 * value to the device

445 */

446 u8 intrl;

447

448 struct napi_struct napi;

449

450 struct ice_ring_container rx;

451 struct ice_ring_container tx;

452

453 cpumask_t affinity_mask;

454 struct irq_affinity_notify affinity_notify;

455

456 struct ice_channel *ch;

457

458 char name[ICE_INT_NAME_STR_LEN];

459

460 u16 total_events; /* net_dim(): number of interrupts processed */

461 } ____cacheline_internodealigned_in_smp;

462

463 enum ice_pf_flags {

464 ICE_FLAG_FLTR_SYNC,

465 ICE_FLAG_RDMA_ENA,

466 ICE_FLAG_RSS_ENA,

467 ICE_FLAG_SRIOV_ENA,

468 ICE_FLAG_SRIOV_CAPABLE,

469 ICE_FLAG_DCB_CAPABLE,

470 ICE_FLAG_DCB_ENA,

471 ICE_FLAG_FD_ENA,

472 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */

473 ICE_FLAG_PTP, /* PTP is enabled by software */

474 ICE_FLAG_ADV_FEATURES,

475 ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */

476 ICE_FLAG_CLS_FLOWER,

477 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,

478 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,

479 ICE_FLAG_NO_MEDIA,

480 ICE_FLAG_FW_LLDP_AGENT,

481 ICE_FLAG_MOD_POWER_UNSUPPORTED,

482 ICE_FLAG_PHY_FW_LOAD_FAILED,

483 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */

484 ICE_FLAG_LEGACY_RX,

485 ICE_FLAG_VF_TRUE_PROMISC_ENA,

486 ICE_FLAG_MDD_AUTO_RESET_VF,

487 ICE_FLAG_VF_VLAN_PRUNING,

488 ICE_FLAG_LINK_LENIENT_MODE_ENA,

489 ICE_FLAG_PLUG_AUX_DEV,

490 ICE_FLAG_GNSS, /* GNSS successfully initialized */

491 ICE_PF_FLAGS_NBITS /* must be last */

492 };

493

494 struct ice_switchdev_info {

495 struct ice_vsi *control_vsi;

496 struct ice_vsi *uplink_vsi;

497 bool is_running;

498 };

499

500 struct ice_agg_node {

501 u32 agg_id;

502 #define ICE_MAX_VSIS_IN_AGG_NODE 64

503 u32 num_vsis;

504 u8 valid;

505 };

506

507 struct ice_pf {

508 struct pci_dev *pdev;

509

510 struct devlink_region *nvm_region;

511 struct devlink_region *sram_region;

512 struct devlink_region *devcaps_region;

513

514 /* devlink port data */

515 struct devlink_port devlink_port;

516

517 /* OS reserved IRQ details */

518 struct msix_entry *msix_entries;

519 struct ice_res_tracker *irq_tracker;

520 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the

521 * number of MSIX vectors needed for all SR-IOV VFs from the number of

522 * MSIX vectors allowed on this PF.

523 */

524 u16 sriov_base_vector;

525

526 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */

527

528 struct ice_vsi **vsi; /* VSIs created by the driver */

529 struct ice_sw *first_sw; /* first switch created by firmware */

530 u16 eswitch_mode; /* current mode of eswitch */

531 struct ice_vfs vfs;

532 DECLARE_BITMAP(features, ICE_F_MAX);

533 DECLARE_BITMAP(state, ICE_STATE_NBITS);

534 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);

535 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */

536 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */

537 unsigned long serv_tmr_period;

538 unsigned long serv_tmr_prev;

539 struct timer_list serv_tmr;

540 struct work_struct serv_task;

541 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */

542 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */

543 struct mutex tc_mutex; /* lock to protect TC changes */

544 u32 msg_enable;

545 struct ice_ptp ptp;

546 struct tty_driver *ice_gnss_tty_driver;

547 struct tty_port gnss_tty_port;

548 struct gnss_serial *gnss_serial;

549 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */

550 u16 rdma_base_vector;

551

552 /* spinlock to protect the AdminQ wait list */

553 spinlock_t aq_wait_lock;

554 struct hlist_head aq_wait_list;

555 wait_queue_head_t aq_wait_queue;

556 bool fw_emp_reset_disabled;

557

558 wait_queue_head_t reset_wait_queue;

559

560 u32 hw_csum_rx_error;

561 u16 oicr_idx; /* Other interrupt cause MSIX vector index */

562 u16 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */

563 u16 max_pf_txqs; /* Total Tx queues PF wide */

564 u16 max_pf_rxqs; /* Total Rx queues PF wide */

565 u16 num_lan_msix; /* Total MSIX vectors for base driver */

566 u16 num_lan_tx; /* num LAN Tx queues setup */

567 u16 num_lan_rx; /* num LAN Rx queues setup */

568 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */

569 u16 num_alloc_vsi;

570 u16 corer_count; /* Core reset count */

571 u16 globr_count; /* Global reset count */

572 u16 empr_count; /* EMP reset count */

573 u16 pfr_count; /* PF reset count */

574

575 u8 wol_ena : 1; /* software state of WoL */

576 u32 wakeup_reason; /* last wakeup reason */

577 struct ice_hw_port_stats stats;

578 struct ice_hw_port_stats stats_prev;

579 struct ice_hw hw;

580 u8 stat_prev_loaded:1; /* has previous stats been loaded */

581 u8 rdma_mode;

582 u16 dcbx_cap;

583 u32 tx_timeout_count;

584 unsigned long tx_timeout_last_recovery;

585 u32 tx_timeout_recovery_level;

586 char int_name[ICE_INT_NAME_STR_LEN];

587 struct auxiliary_device *adev;

588 int aux_idx;

589 u32 sw_int_count;

590 /* count of tc_flower filters specific to channel (aka where filter

591 * action is "hw_tc <tc_num>")

592 */

593 u16 num_dmac_chnl_fltrs;

594 struct hlist_head tc_flower_fltr_list;

595

596 __le64 nvm_phy_type_lo; /* NVM PHY type low */

597 __le64 nvm_phy_type_hi; /* NVM PHY type high */

598 struct ice_link_default_override_tlv link_dflt_override;

599 struct ice_lag *lag; /* Link Aggregation information */

600

601 struct ice_switchdev_info switchdev;

602

603 #define ICE_INVALID_AGG_NODE_ID 0

604 #define ICE_PF_AGG_NODE_ID_START 1

605 #define ICE_MAX_PF_AGG_NODES 32

606 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES];

607 #define ICE_VF_AGG_NODE_ID_START 65

608 #define ICE_MAX_VF_AGG_NODES 32

609 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];

610 };

611

612 struct ice_netdev_priv {

613 struct ice_vsi *vsi;

614 struct ice_repr *repr;

615 /* indirect block callbacks on registered higher level devices

616 * (e.g. tunnel devices)

617 *

618 * tc_indr_block_cb_priv_list is used to look up indirect callback

619 * private data

620 */

621 struct list_head tc_indr_block_priv_list;

622 };

623

624 /**

625 * ice_vector_ch_enabled

626 * @qv: pointer to q_vector, can be NULL

627 *

628 * This function returns true if vector is channel enabled otherwise false

629 */

630 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv)

631 {

632 return !!qv->ch; /* Enable it to run with TC */

633 }

634

635 /**

636 * ice_irq_dynamic_ena - Enable default interrupt generation settings

637 * @hw: pointer to HW struct

638 * @vsi: pointer to VSI struct, can be NULL

639 * @q_vector: pointer to q_vector, can be NULL

640 */

641 static inline void

642 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,

643 struct ice_q_vector *q_vector)

644 {

645 u32 vector = (vsi && q_vector) ? q_vector->reg_idx :

646 ((struct ice_pf *)hw->back)->oicr_idx;

647 int itr = ICE_ITR_NONE;

648 u32 val;

649

650 /* clear the PBA here, as this function is meant to clean out all

651 * previous interrupts and enable the interrupt

652 */

653 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |

654 (itr << GLINT_DYN_CTL_ITR_INDX_S);

655 if (vsi)

656 if (test_bit(ICE_VSI_DOWN, vsi->state))

657 return;

658 wr32(hw, GLINT_DYN_CTL(vector), val);

659 }

660

661 /**

662 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev

663 * @netdev: pointer to the netdev struct

664 */

665 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)

666 {

667 struct ice_netdev_priv *np = netdev_priv(netdev);

668

669 return np->vsi->back;

670 }

671

672 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)

673 {

674 return !!vsi->xdp_prog;

675 }

676

677 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring)

678 {

679 ring->flags |= ICE_TX_FLAGS_RING_XDP;

680 }

681

682 /**

683 * ice_xsk_pool - get XSK buffer pool bound to a ring

684 * @ring: Rx ring to use

685 *

686 * Returns a pointer to xdp_umem structure if there is a buffer pool present,

687 * NULL otherwise.

688 */

689 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring)

690 {

691 struct ice_vsi *vsi = ring->vsi;

692 u16 qid = ring->q_index;

693

694 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps))

695 return NULL;

696

697 return xsk_get_pool_from_qid(vsi->netdev, qid);

698 }

699

700 /**

701 * ice_tx_xsk_pool - get XSK buffer pool bound to a ring

702 * @ring: Tx ring to use

703 *

704 * Returns a pointer to xdp_umem structure if there is a buffer pool present,

705 * NULL otherwise. Tx equivalent of ice_xsk_pool.

706 */

707 static inline struct xsk_buff_pool *ice_tx_xsk_pool(struct ice_tx_ring *ring)

708 {

709 struct ice_vsi *vsi = ring->vsi;

710 u16 qid;

711

712 qid = ring->q_index - vsi->num_xdp_txq;

713

714 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps))

715 return NULL;

716

717 return xsk_get_pool_from_qid(vsi->netdev, qid);

718 }

719

720 /**

721 * ice_get_main_vsi - Get the PF VSI

722 * @pf: PF instance

723 *

724 * returns pf->vsi[0], which by definition is the PF VSI

725 */

726 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)

727 {

728 if (pf->vsi)

729 return pf->vsi[0];

730

731 return NULL;

732 }

733

734 /**

735 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv.

736 * @np: private netdev structure

737 */

738 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np)

739 {

740 /* In case of port representor return source port VSI. */

741 if (np->repr)

742 return np->repr->src_vsi;

743 else

744 return np->vsi;

745 }

746

747 /**

748 * ice_get_ctrl_vsi - Get the control VSI

749 * @pf: PF instance

750 */

751 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)

752 {

753 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */

754 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)

755 return NULL;

756

757 return pf->vsi[pf->ctrl_vsi_idx];

758 }

759

760 /**

761 * ice_is_switchdev_running - check if switchdev is configured

762 * @pf: pointer to PF structure

763 *

764 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV

765 * and switchdev is configured, false otherwise.

766 */

767 static inline bool ice_is_switchdev_running(struct ice_pf *pf)

768 {

769 return pf->switchdev.is_running;

770 }

771

772 /**

773 * ice_set_sriov_cap - enable SRIOV in PF flags

774 * @pf: PF struct

775 */

776 static inline void ice_set_sriov_cap(struct ice_pf *pf)

777 {

778 if (pf->hw.func_caps.common_cap.sr_iov_1_1)

779 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);

780 }

781

782 /**

783 * ice_clear_sriov_cap - disable SRIOV in PF flags

784 * @pf: PF struct

785 */

786 static inline void ice_clear_sriov_cap(struct ice_pf *pf)

787 {

788 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);

789 }

790

791 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256

792 #define ICE_FD_STAT_PF_IDX(base_idx) \

793 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)

794 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)

795 #define ICE_FD_STAT_CH 1

796 #define ICE_FD_CH_STAT_IDX(base_idx) \

797 (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH)

798

799 /**

800 * ice_is_adq_active - any active ADQs

801 * @pf: pointer to PF

802 *

803 * This function returns true if there are any ADQs configured (which is

804 * determined by looking at VSI type (which should be VSI_PF), numtc, and

805 * TC_MQPRIO flag) otherwise return false

806 */

807 static inline bool ice_is_adq_active(struct ice_pf *pf)

808 {

809 struct ice_vsi *vsi;

810

811 vsi = ice_get_main_vsi(pf);

812 if (!vsi)

813 return false;

814

815 /* is ADQ configured */

816 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC &&

817 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))

818 return true;

819

820 return false;

821 }

822

823 bool netif_is_ice(struct net_device *dev);

824 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);

825 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);

826 int ice_vsi_open_ctrl(struct ice_vsi *vsi);

827 int ice_vsi_open(struct ice_vsi *vsi);

828 void ice_set_ethtool_ops(struct net_device *netdev);

829 void ice_set_ethtool_repr_ops(struct net_device *netdev);

830 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);

831 u16 ice_get_avail_txq_count(struct ice_pf *pf);

832 u16 ice_get_avail_rxq_count(struct ice_pf *pf);

833 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx);

834 void ice_update_vsi_stats(struct ice_vsi *vsi);

835 void ice_update_pf_stats(struct ice_pf *pf);

836 int ice_up(struct ice_vsi *vsi);

837 int ice_down(struct ice_vsi *vsi);

838 int ice_vsi_cfg(struct ice_vsi *vsi);

839 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);

840 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi);

841 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog);

842 int ice_destroy_xdp_rings(struct ice_vsi *vsi);

843 int

844 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,

845 u32 flags);

846 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);

847 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);

848 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed);

849 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed);

850 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);

851 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);

852 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);

853 int ice_plug_aux_dev(struct ice_pf *pf);

854 void ice_unplug_aux_dev(struct ice_pf *pf);

855 int ice_init_rdma(struct ice_pf *pf);

856 const char *ice_aq_str(enum ice_aq_err aq_err);

857 bool ice_is_wol_supported(struct ice_hw *hw);

858 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi);

859 int

860 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,

861 bool is_tun);

862 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);

863 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);

864 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);

865 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);

866 int

867 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,

868 u32 *rule_locs);

869 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx);

870 void ice_fdir_release_flows(struct ice_hw *hw);

871 void ice_fdir_replay_flows(struct ice_hw *hw);

872 void ice_fdir_replay_fltrs(struct ice_pf *pf);

873 int ice_fdir_create_dflt_rules(struct ice_pf *pf);

874 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout,

875 struct ice_rq_event_info *event);

876 int ice_open(struct net_device *netdev);

877 int ice_open_internal(struct net_device *netdev);

878 int ice_stop(struct net_device *netdev);

879 void ice_service_task_schedule(struct ice_pf *pf);

880

881 /**

882 * ice_set_rdma_cap - enable RDMA support

883 * @pf: PF struct

884 */

885 static inline void ice_set_rdma_cap(struct ice_pf *pf)

886 {

887 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {

888 set_bit(ICE_FLAG_RDMA_ENA, pf->flags);

889 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);

890 }

891 }

892

893 /**

894 * ice_clear_rdma_cap - disable RDMA support

895 * @pf: PF struct

896 */

897 static inline void ice_clear_rdma_cap(struct ice_pf *pf)

898 {

899 ice_unplug_aux_dev(pf);

900 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);

901 }

902 #endif /* _ICE_H_ */