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drm/msm/mdp5: rework CTL START signal handling
authorRob Clark <robdclark@gmail.com>
Mon, 19 Feb 2018 13:17:06 +0000 (08:17 -0500)
committerRob Clark <robdclark@gmail.com>
Mon, 19 Mar 2018 10:33:37 +0000 (06:33 -0400)
commitf9cb8d8d836e155f361c3f1bbe0802ae1f98a17e
tree21ebe84591bc219d7a362b4347bab42b228ab709
parent79d57bf6fa3bcc0ec5fc3b8140c4df1d696f593b
drm/msm/mdp5: rework CTL START signal handling

For DSI cmd-mode and writeback, we need to write the CTL's START
register to kick things off, but we only want to do that once both
the encoder and the crtc have a chance to write their corresponding
flush bits.  The difficulty is that when there is a full modeset
(ie. encoder state has changed) we want to defer the start until
encoder->enable().  But if only plane's have changed, we want to do
this from crtc->commit().

The start_mask was a previous attempt to handle this, but it didn't
really do the right thing since atomic conversion.

Instead track in the crtc state that the start should be deferred,
set to try from encoder's (or in future writeback's) atomic_check().
This way the state is part of the atomic state, and rollback can
work properly if an atomic test fails.

Signed-off-by: Rob Clark <robdclark@gmail.com>
drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c
drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.h
drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h
drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c