From 087dfd4e89ba64b597bffacaee8559145cdae41f Mon Sep 17 00:00:00 2001 From: Yoshinori Sato Date: Wed, 30 Dec 2015 18:31:16 +0900 Subject: [PATCH] rx: Add TKDN-RX62N-BRD support. Signed-off-by: Yoshinori Sato --- arch/rx/boot/dts/Makefile | 1 + arch/rx/boot/dts/tkdn_rx62n.dts | 97 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 98 insertions(+) create mode 100644 arch/rx/boot/dts/tkdn_rx62n.dts diff --git a/arch/rx/boot/dts/Makefile b/arch/rx/boot/dts/Makefile index 39e9b60dab17..5231b2aee003 100644 --- a/arch/rx/boot/dts/Makefile +++ b/arch/rx/boot/dts/Makefile @@ -5,6 +5,7 @@ endif obj-y += $(BUILTIN_DTB) dtb-$(CONFIG_RX_SIM) := rx_sim.dtb +dtb-$(CONFIG_TKDN_RX62N) := tkdn-rx62n.dtb dtstree := $(srctree)/$(src) dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts)) diff --git a/arch/rx/boot/dts/tkdn_rx62n.dts b/arch/rx/boot/dts/tkdn_rx62n.dts new file mode 100644 index 000000000000..4ab59c26835d --- /dev/null +++ b/arch/rx/boot/dts/tkdn_rx62n.dts @@ -0,0 +1,97 @@ +/dts-v1/; +/ { + compatible = "tokuden,ultimate62n"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&rxicu>; + + chosen { + bootargs = "earlycon=sci,0x88240 console=ttySC0,38400"; + stdout-path = <&sci0>; + }; + aliases { + serial0 = &sci0; + serial1 = &sci1; + }; + + xclk: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <12000000>; + clock-output-names = "xtal"; + }; + iclk: iclk { + compatible = "renesas,rx-mul-clock"; + clocks = <&xclk>; + #clock-cells = <0>; + reg = <0x00080020 4>; + renesas,offset = <24>; + renesas,maxfreq = <100000000>; + }; + pclk: pclk { + compatible = "renesas,rx-mul-clock"; + clocks = <&xclk>; + #clock-cells = <0>; + reg = <0x00080020 4>; + renesas,offset = <8>; + renesas,maxfreq = <50000000>; + }; + bclk: bclk { + compatible = "renesas,rx-mul-clock"; + clocks = <&xclk>; + #clock-cells = <0>; + reg = <0x00080020 4>; + renesas,offset = <16>; + renesas,maxfreq = <50000000>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + compatible = "renesas,rx"; + clock-frequency = <96000000>; + mem-cycle = <6>; + }; + }; + memory@08000000 { + device_type = "memory"; + reg = <0x08000000 0x01000000>; + }; + + rxicu: interrupt-controller@87000 { + compatible = "renesas,rx-icu"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0x00087000 0x600>; + }; + + mtu: timer@00088780 { + compatible = "renesas,rx-mtu2"; + reg = <0x00088780 0x100>, <0x0008860a 1>; + clocks = <&pclk>; + clock-names = "fck"; + }; + cmt: timer@00088000 { + compatible = "renesas,rx-cmt"; + reg = <0x00088000 0x70>; + clocks = <&pclk>; + interrupts = <28 0>; + }; + + sci0: serial@00088240 { + compatible = "renesas,sci"; + reg = <0x00088240 8>; + interrupts = <214 0>, <215 0>, <216 0>, <217 0>; + clocks = <&pclk>; + clock-names = "sci_ick"; + }; + + sci1: serial@00088248 { + compatible = "renesas,sci"; + reg = <0x00088248 8>; + interrupts = <218 0>, <219 0>, <220 0>, <221 0>; + clocks = <&pclk>; + clock-names = "sci_ick"; + }; +}; -- 2.11.0